ONSEMI 74VCX16245

74VCX16245
Low−Voltage 1.8/2.5/3.3V
16−Bit Transceiver
With 3.6 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
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The 74VCX16245 is an advanced performance, non−inverting
16−bit transceiver. It is designed for very high−speed, very low−power
operation in 1.8 V, 2.5 V or 3.3 V systems.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3 V busses. It is guaranteed to be overvoltage tolerant to 3.6 V.
The VCX16245 is designed with byte control. It can be operated as
two separate octals, or with the controls tied together, as a 16−bit wide
function. The Transmit/Receive (T/Rn) inputs determine the direction
of data flow through the bi−directional transceiver. Transmit
(active−HIGH) enables data from A ports to B ports; Receive
(active−LOW) enables data from B to A ports. The Output Enable
inputs (OEn), when HIGH, disable both A and B ports by placing them
in a HIGH Z condition.
48
1
TSSOP−48
DT SUFFIX
CASE 1201
Features
• Designed for Low Voltage Operation: VCC = 1.65−3.6 V
• 3.6 V Tolerant Inputs and Outputs
• High Speed Operation: 2.5 ns max for 3.0 to 3.6 V
•
•
•
•
•
•
MARKING DIAGRAM
48
3.0 ns max for 2.3 to 2.7 V
6.0 ns max for 1.65 to 1.95 V
Static Drive: ±24 mA Drive at 3.0 V
±18 mA Drive at 2.3 V
±6 mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
Near Zero Static Supply Current in All Three Logic States (20 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds ±250 mA @ 125°C
ESD Performance: Human Body Model >2000 V;
Machine Model >200 V
VCX16245
AWLYYWW
1
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Package
Shipping †
74VCX16245DT
TSSOP
39 / Rail
74VCX16245DTR
TSSOP
2500/Tape & Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 7
1
Publication Order Number:
74VCX16245/D
74VCX16245
T/R1 1
48 OE1
B0 2
47 A0
B1 3
46 A1
GND 4
1
T/R1
OE1
24
T/R2
48
OE2
25
45 GND
B2 5
44 A2
B3 6
43 A3
VCC 7
42 VCC
B4 8
41 A4
B5 9
40 A5
GND 10
A0:7
B0:7
A8:15
B8:15
One of Eight
39 GND
B6 11
38 A6
B7 12
37 A7
B8 13
36 A8
B9 14
35 A9
GND 15
34 GND
B10 16
33 A10
B11 17
32 A11
VCC 18
31 VCC
B12 19
30 A12
B13 20
29 A13
GND 21
28 GND
B14 22
27 A14
B15 23
26 A15
T/R2 24
25 OE2
Figure 2. Logic Diagram
1
EN1
EN2
EN3
EN4
T/R1
48
OE1
25
OE2
24
T/R2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
Figure 1. 48−Lead Pinout
(Top View)
47
1
46
1∇
2
3
5
44
43
41
1
2∇
6
8
40
9
38
11
37
36
1
3∇
12
13
35
14
33
16
32
30
1
4∇
17
19
29
20
27
22
26
23
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
Figure 3. IEC Logic Diagram
Table 1. PIN NAMES
Pins
Function
OEn
T/Rn
A0−A15
B0−B15
Output Enable Inputs
Transmit/Receive Inputs
Side A Inputs or 3−State Outputs
Side B Inputs or 3−State Outputs
TRUTH TABLE
Inputs
Inputs
OE1
T/R1
Outputs
OE2
T/R2
Outputs
L
L
Bus B0:7 Data to Bus A0:7
L
L
Bus B8:15 Data to Bus A8:15
L
H
Bus A0:7 Data to Bus B0:7
L
H
Bus A8:15 Data to Bus B8:15
H
X
High Z State on A0:7, B0:7
H
X
High Z State on A8:15, B8:15
H = High Voltage Level
L = Low Voltage Level
X = High or Low Voltage Level and Transitions Are Acceptable
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2
74VCX16245
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Parameter
Value
DC Supply Voltage
Condition
Unit
−0.5 to +4.6
V
V
VI
DC Input Voltage
−0.5 ≤ VI ≤ +4.6
VO
DC Output Voltage
−0.5 ≤ VO ≤ +4.6
Output in 3−State
V
−0.5 ≤ VO ≤ VCC + 0.5
Note 1; Outputs Active
V
−50
VI < GND
mA
−50
VO < GND
mA
+50
VO > VCC
mA
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current Per Ground Pin
±100
mA
TSTG
Storage Temperature Range
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Supply Voltage
Operating
Data Retention Only
VI
Input Voltage
VO
Output Voltage
IOH
HIGH Level Output Current, VCC = 3.0 V − 3.6 V
(Active State)
(3−State)
Min
Typ
Max
Unit
1.65
1.2
3.3
3.3
3.6
3.6
V
−0.3
3.6
V
0
0
VCC
3.6
V
−24
mA
IOL
LOW Level Output Current, VCC = 3.0 V − 3.6 V
24
mA
IOH
HIGH Level Output Current, VCC = 2.3 V − 2.7 V
−18
mA
IOL
LOW Level Output Current, VCC = 2.3 V − 2.7 V
18
mA
IOH
HIGH Level Output Current, VCC = 1.65 V − 1.95 V
−6
mA
IOL
LOW Level Output Current, VCC = 1.65 V − 1.95 V
6
mA
TA
Operating Free−Air Temperature
−40
+85
°C
0
10
ns/V
Dt/DV
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
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3
74VCX16245
DC ELECTRICAL CHARACTERISTICS
TA = −40°C to +85°C
Symbol
VIH
VIL
Condition
Min
1.65 V ≤ VCC < 2.3 V
0.65 x VCC
2.3 V ≤ VCC ≤ 2.7 V
1.6
2.7 V < VCC ≤ 3.6 V
2.0
Characteristic
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
VOL
HIGH Level Output Voltage
LOW Level Output Voltage
Unit
V
1.65 V ≤ VCC < 2.3 V
0.35 x VCC
2.3 V ≤ VCC ≤ 2.7 V
0.7
2.7 V < VCC ≤ 3.6 V
VOH
Max
V
0.8
1.65 V ≤ VCC ≤ 3.6 V; IOH = −100 mA
VCC − 0.2
VCC = 1.65 V; IOH = −6 mA
1.25
VCC = 2.3 V; IOH = −6 mA
2.0
VCC = 2.3 V; IOH = −12 mA
1.8
VCC = 2.3 V; IOH = −18 mA
1.7
VCC = 2.7 V; IOH = −12 mA
2.2
VCC = 3.0 V; IOH = −18 mA
2.4
VCC = 3.0 V; IOH = −24 mA
2.2
V
1.65 V ≤ VCC ≤ 3.6 V; IOL = 100 mA
0.2
VCC = 1.65 V; IOL = 6 mA
0.3
VCC = 2.3 V; IOL = 12 mA
0.4
VCC = 2.3 V; IOL = 18 mA
0.6
VCC = 2.7 V; IOL = 12 mA
0.4
VCC = 3.0 V; IOL = 18 mA
0.4
V
VCC = 3.0 V; IOL = 24 mA
0.55
II
Input Leakage Current
1.65 V ≤ VCC ≤ 3.6 V; 0 V ≤ VI ≤ 3.6 V
±5.0
mA
IOZ
3−State Output Current
1.65 V ≤ VCC ≤ 3.6 V; 0 V ≤ VO ≤ 3.6 V;
VI = VIH or VIL
±10
mA
IOFF
Power−Off Leakage Current
VCC = 0 V; VI or VO = 3.6 V
10
mA
ICC
Quiescent Supply Current (Note 3)
DICC
1.65 V ≤ VCC ≤ 3.6 V; VI = GND or VCC
20
mA
1.65 V ≤ VCC ≤ 3.6 V; 3.6 V ≤ VI, VO ≤ 3.6 V
±20
mA
2.7 V < VCC ≤ 3.6 V; VIH = VCC − 0.6 V
750
mA
Increase in ICC per Input
2. These values of VI are used to test DC electrical characteristics only.
3. Outputs disabled or 3−state only.
AC CHARACTERISTICS (Note 4; tR = tF = 2.0 ns; CL = 30 pF; RL = 500 W)
TA = −40°C to +85°C
VCC = 3.0 V to 3.6 V
Symbol
Parameter
VCC = 2.3 V to 2.7 V
VCC = 1.65 V to1.95 V
Waveform
Min
Max
Min
Max
Min
Max
Unit
tPLH
tPHL
Propagation Delay
Input−to−Output
1
0.8
0.8
2.5
2.5
1.0
1.0
3.0
3.0
1.5
1.5
6.0
6.0
ns
tPZH
tPZL
Output Enable Time to
High and Low Level
2
0.8
0.8
3.8
3.8
1.0
1.0
4.9
4.9
1.5
1.5
9.3
9.3
ns
tPHZ
tPLZ
Output Disable Time From
High and Low Level
2
0.8
0.8
3.7
3.7
1.0
1.0
4.2
4.2
1.5
1.5
7.6
7.6
ns
0.75
0.75
ns
tOSHL
tOSLH
Output−to−Output Skew
(Note 5)
0.5
0.5
0.5
0.5
4. For CL = 50 pF, add approximately 300 ps to the AC maximum specification.
5. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
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4
74VCX16245
AC CHARACTERISTICS (tR = tF = 2.0 ns; CL = 50 pF; RL = 500 W)
TA = −40°C to +85°C
VCC = 3.0 V to 3.6V
Symbol
Parameter
Waveform
Min
Max
VCC = 2.7 V
Min
Max
Unit
tPLH
tPHL
Propagation Delay
Input−to−Output
3
1.0
1.0
3.0
3.0
3.6
3.6
ns
tPZH
tPZL
Output Enable Time to
High and Low Level
4
1.0
1.0
4.4
4.4
5.4
5.4
ns
tPHZ
tPLZ
Output Disable Time From
High and Low Level
4
1.0
1.0
4.1
4.1
4.6
4.6
ns
0.5
0.5
0.5
0.5
ns
tOSHL
tOSLH
Output−to−Output Skew
(Note 6)
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
Symbol
VOLP
VOLV
VOHV
Condition
Typ
Unit
VCC = 1.8 V, CL = 30 pF, VIH = VCC, VIL = 0 V
0.25
V
VCC = 2.5 V, CL = 30 pF, VIH = VCC, VIL = 0 V
0.6
Characteristic
Dynamic LOW Peak Voltage
(Note 7)
Dynamic LOW Valley Voltage
(Note 7)
Dynamic HIGH Valley Voltage
(Note 8)
VCC = 3.3 V, CL = 30 pF, VIH = VCC, VIL = 0 V
0.8
VCC = 1.8 V, CL = 30 pF, VIH = VCC, VIL = 0 V
−0.25
VCC = 2.5 V, CL = 30 pF, VIH = VCC, VIL = 0 V
−0.6
VCC = 3.3 V, CL = 30 pF, VIH = VCC, VIL = 0 V
−0.8
VCC = 1.8 V, CL = 30 pF, VIH = VCC, VIL = 0 V
1.5
VCC = 2.5 V, CL = 30 pF, VIH = VCC, VIL = 0 V
1.9
VCC = 3.3 V, CL = 30 pF, VIH = VCC, VIL = 0 V
2.2
V
V
7. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
8. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the HIGH state.
CAPACITIVE CHARACTERISTICS
Symbol
CIN
Parameter
Input Capacitance
COUT
Output Capacitance
CPD
Power Dissipation Capacitance
Condition
Typical
Unit
Note 9
6
pF
Note 9
7
pF
Note 9, 10 MHz
20
pF
9. VCC = 1.8 V, 2.5 V or 3.3 V; VI = 0 V or VCC.
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5
74VCX16245
Vm
OEn, T/Rn
An, Bn
Vm
tPLH
Bn, An
0V
tPHL
Vm
tPZH
VIH
Vm
tPHZ
tPLZ
≈ VCC
Vm
An, Bn
0V
Vy
≈ 0V
tPZL
VOL
VIH
VOH
Vm
An, Bn
VOH
Vm
Vm
Vx
VOL
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 4. AC Waveforms
Table 2. AC WAVEFORMS
VCC
Symbol
3.3 V ± 0.3 V
2.5 V ± 0.2 V
1.8 V ± 0.15 V
VIH
2.7 V
VCC
VCC
Vm
1.5 V
VCC/2
VCC/2
Vx
VOL + 0.3 V
VOL + 0.15 V
VOL + 0.15 V
Vy
VOH − 0.3 V
VOH − 0.15 V
VOH − 0.15 V
VCC
PULSE
GENERATOR
RL
DUT
RT
CL
RL
Figure 5. Test Circuit
Table 3. TEST CIRCUIT
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
6 V at VCC = 3.3 ± 0.3 V;
VCC × 2 at VCC = 2.5 ± 0.2 V; 1.8 ± 0.15 V
tPZH, tPHZ
GND
CL = 30 pF or equivalent (Includes jig and probe capacitance)
RL = 500 W or equivalent
RT = ZOUT of pulse generator (typically 50 W)
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6
6V or VCC × 2
OPEN
GND
74VCX16245
VIH
Vm
OEn, T/Rn
VIH
An, Bn
Vm
Vm
tPLH
Bn, An
Vm
tPZH
0V
tPHL
VOL
Vy
Vm
tPZL
≈ 0V
tPLZ
≈ VCC
Vm
An, Bn
0V
VOH
tPHZ
An, Bn
VOH
Vm
Vm
Vx
VOL
WAVEFORM 3 − PROPAGATION DELAYS
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
WAVEFORM 4 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 6. AC Waveforms
Table 4. AC WAVEFORMS
VCC
Symbol
3.3 V ± 0.3 V
2.7 V
VIH
2.7 V
2.7 V
Vm
1.5 V
1.5 V
Vx
VOL + 0.3 V
VOL + 0.3 V
Vy
VOH − 0.3 V
VOH − 0.3 V
VCC
PULSE
GENERATOR
RL
DUT
RT
CL
6V or VCC × 2
OPEN
GND
RL
Figure 7. Test Circuit
Table 5. TEST CIRCUIT
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
6 V at VCC = 3.3 ± 0.3 V;
VCC × 2 at VCC = 2.5 ± 0.2 V; 1.8 ± 0.15 V
tPZH, tPHZ
GND
CL = 50 pF or equivalent (Includes jig and probe capacitance)
RL = 500 W or equivalent
RT = ZOUT of pulse generator (typically 50W)
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74VCX16245
PACKAGE DIMENSIONS
TSSOP
DT SUFFIX
CASE 1201−01
ISSUE A
48X
K REF
0.12 (0.005)
M
T U
S
V
S
T U
S
J J1
25
0.254 (0.010)
M
48
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÇÇÇ
ÉÉÉ
SECTION N−N
B
−U−
L
N
1
24
A
−V−
PIN 1
IDENT.
N
F
DETAIL E
D
0.076 (0.003)
−T− SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSIONS A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
K
K1
C
M
0.25 (0.010)
−W−
G
H
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
12.40
12.60
6.00
6.20
−−−
1.10
0.05
0.15
0.50
0.75
0.50 BSC
0.37
−−−
0.09
0.20
0.09
0.16
0.17
0.27
0.17
0.23
7.95
8.25
0_
8_
INCHES
MIN
MAX
0.488
0.496
0.236
0.244
−−− 0.043
0.002
0.006
0.020
0.030
0.0197 BSC
0.015
−−−
0.004
0.008
0.004
0.006
0.007
0.011
0.007
0.009
0.313
0.325
0_
8_
DETAIL E
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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74VCX16245/D