DIODES ZVNL110G

SOT223 N-CHANNEL ENHANCEMENT MODE
LOW THRESHOLD VERTICAL DMOS FET
ISSUE 2 - FEBRUARY 1996
FEATURES
* LOW RDS(ON) - 3Ω
ZVNL110G
✪
D
PARTMARKING DETAIL - ZVNL110
S
D
G
ABSOLUTE MAXIMUM RATINGS.
PARAMETER
SYMBOL
Drain-Source Voltage
V DS
VALUE
100
UNIT
V
Continuous Drain Current at T amb=25°C
ID
600
mA
A
Pulsed Drain Current
I DM
6
Gate-Source Voltage
V GS
± 20
V
Power Dissipation at T amb=25°C
P tot
2
W
Operating and Storage Temperature Range
T j:T stg
-55 to +150
°C
ELECTRICAL CHARACTERISTICS (at Tamb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN.
Drain-Source Breakdown
Voltage
BV DSS
Gate-Source Threshold Voltage V GS(th)
MAX. UNIT CONDITIONS.
100
I D=1mA, V GS=0V
1.5
V
I D =1mA, V DS= V GS
Gate-Body Leakage
I GSS
100
nA
V GS=± 20V, V DS=0V
Zero Gate Voltage Drain
Current
I DSS
10
100
µA
µA
V DS=100V, V GS=0V
V DS=80V, V GS=0V, T=125°C (2)
On-State Drain Current(1)
I D(on)
Static Drain-Source On-State
Resistance (1)
R DS(on)
Forward Transconductance(1)(2) g fs
0.75
V
750
mA
V DS=25V, V GS=5V
4.5
3.0
Ω
Ω
V GS=5V, I D=250mA
V GS=10V, I D=500mA
mS
V DS=25V, I D=500mA
225
Input Capacitance (2)
C iss
75
pF
Common Source Output
Capacitance (2)
C oss
25
pF
Reverse Transfer Capacitance (2) Crss
8
pF
Turn-On Delay Time (2)(3)
t d(on)
7
ns
Rise Time (2)(3)
tr
12
ns
Turn-Off Delay Time (2)(3)
t d(off)
15
ns
Fall Time (2)(3)
tf
13
ns
V DS=25V, V GS=0V, f=1MHz
V DD≈25V, I D=1A, V GS =10V
(1) Measured under pulsed conditions. Width=300µs. Duty cycle ≤2% (2) Sample test.
(3) Switching times measured with 50Ω source impedance and <5ns rise time on a pulse generator
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