NCP5500, NCV5500, NCP5501, NCV5501 500 mA Linear Regulator These linear regulators provide up to 500 mA over a user−adjustable output range of 1.25 V to 5.0 V, or at a fixed output voltage of 1.5 V or 5.0 V*, with typical output voltage accuracy better than 3%. NCV versions are qualified for demanding automotive applications that require site and change control. NCP5500 and NCV5500 versions include an Enable/Shutdown function and are available in a DPAK−5L power package. In shutdown, current consumption is reduced to 30 mA. An internal PNP pass transistor permits low dropout voltage and operation at full load current at the minimum input voltage. NCP5501 and NCV5501 versions are available in DPAK−3L for applications that do not require logical on/off control. This regulator family is ideal for applications that require a broad input voltage range, including both automotive and portable battery powered devices. Integral protection features include short circuit current and thermal shutdown. http://onsemi.com 4 1 1 2 5 DPAK 5 CENTER LEAD CROP CASE 175AA • • Output Current up to 500 mA 2.9% Output Voltage Accuracy Low Dropout Voltage Enable Control Pin (NCP5500 / NCV5500) Reverse Bias Protection Short Circuit Protection Thermal Shutdown Operating Temperature Range of −40°C to +125°C (NCV5500 / NCV5501) NCV Prefix for Applications that Require Site and Change Control These are Pb−Free Devices Typical Applications • • • • Automotive Industrial and Consumer Post SMPS Regulation Point of Use Regulation IN Input 2 100 nF OFF ON EN 4 OUT 1 3 5 Pin 1. EN 2. IN TAB, 3. GND 4. OUT 5. NC/ADJ P5500xG ALYWW 1 5 DPAK 5 Pin 1. IN TAB, 2. GND 3. OUT V5501xG ALYWW 1 3 DPAK P or V = P (NCP), V (NCV) 5500/1 = Device Code x = Output Voltage = L = 1.5 V = U = 5.0 V = W = Adjustable G = Pb−Free Package A = Assembly Location L = Wafer Lot Y = Year WW = Work Week *Contact ON Semiconductor for other fixed voltages. Output 4.7 mF NCP5500 NCV5500 DPAK SINGLE GAUGE CASE 369C MARKING DIAGRAMS Features • • • • • • • • 3 ORDERING INFORMATION ADJ RL See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. GND Figure 1. Typical Application Circuit © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 3 1 Publication Order Number: NCP5500/D NCP5500, NCV5500, NCP5501, NCV5501 PIN FUNCTION DESCRIPTIONS Pin No. Symbol Description NCP5500 / NCV5500 − DPAK 5 Lead Center Lead Crop 1 EN Output Enable; high level turns on the output. 2 IN Input; battery/unregulated supply input voltage. 3, TAB GND Ground; Pin 3 connected internally to the Tab heat sink. 4 OUT Output; bypass to ground. 5 NC / ADJ No connection (Fixed output versions only). Voltage−adjust input. Use an external voltage divider to set the output voltage over a range of 1.25 V to 5.0 V. Adjustable version only. NCP5501 / NCV5501 − DPAK 3 Lead 1 IN Input; battery/unregulated supply input voltage. 2, TAB GND Ground; Pin 3 connected internally to the Tab heat sink. 3 OUT Output; bypass to ground. IN OUT Bandgap Reference Error Amplifier Current Limit and Saturation Sense − + Thermal Shutdown Connection for Fixed Output EN GND Connection for Enable EN and ADJ Pins are applicable to NCP5500 / NCV5500 only. Connection for Adjustable Output NC / ADJ Figure 2. Block Diagram http://onsemi.com 2 NCP5500, NCV5500, NCP5501, NCV5501 ABSOLUTE MAXIMUM RATINGS TA = −40°C to +85°C (NCP5500, NCP5501), TA = −40°C to +125°C (NCV5500, NCV5501), unless otherwise noted. Pin Symbol, Parameter Symbol Min Max Units VIN −7.0 +18 V OUT, EN, VOUT, VEN, DC Voltage V −0.3 +16 VIN + 0.3 (Note 4) V Junction Temperature TJ +150 °C PD Internally Limited RqJA RqJC 75 8.0 IN, VIN, DC Input Voltage Package Dissipation DPAK 5 Power Dissipation at TA = 25°C Thermal Resistance, Junction−to−Air Thermal Resistance, Junction−to−Case DPAK Power Dissipation at TA = 25°C Thermal Resistance, Junction−to−Air Thermal Resistance, Junction−to−Case PD Internally Limited RqJA RqJC 101 6.6 Storage Temperature TStg Moisture Sensitivity Level MSL ESD Capability, Human Body Model (Note 1) ESDHBM −55 +150 1 °C/W °C − 4000 − V ESD Capability, Machine Model (Note 1) ESDMM 200 − V ESD Capability, Charged Device Model (Note 1) ESDCDM 1000 − V Lead Temperature Soldering Reflow (SMD Styles Only), Pb−Free Versions (Note 3) Tsld 265 Peak °C OPERATING RANGES IN, VIN, Operating DC Input Voltage OUT, VOUT Adjust Range (adjustable version only) VIN VOUT + VDO, 2.5 V (Note 5) 16 V VOUT 1.25 5.0 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115) ESD Charged Device Model tested per EIA/JES D22/C101, Field Induced Charge Model 2. Latch−up Current Maximum Rating: ≤ 100 mA per JEDEC standard: JESD78. 3. Pb−Free, 60 sec –150 sec above 217°C, 40 sec max at peak temperature 4. Maximum = +16 V or (VIN +0.3 V), whichever is lower. 5. Minimum VIN = 2.5 V or (VOUT + VDO), whichever is higher. http://onsemi.com 3 NCP5500, NCV5500, NCP5501, NCV5501 ELECTRICAL CHARACTERISTICS VIN = 2.5 V or (VOUT + 1.0 V), whichever is higher, CO = 4.7 mF, −40°C < TA < 85°C (<125°C for NCV versions), TJ < 150°C unless otherwise noted. Characteristic Symbol Test Conditions Min Typ Max Unit OUTPUT Output Voltage (Note 6) VOUT V Fixed Output Versions TA = 25°C, IO = 50 mA ±2.9% Adjustable Voltage Versions TA = 25°C, IO = 50 mA ±2.9% Output Voltage (Notes 6 and 7) VOUT 1.0 mA < IO < 500 mA −4.9% +4.9% V Line Regulation (Note 7) REGLINE IO = 50 mA 2.5 V or (VOUT + 1.0 V) < VIN < 16 V 0.1 1.0 % Load Regulation (Note 7) REGLOAD 1.0 mA < IO < 500 mA 0.35 1.0 % Dropout Voltage Fixed Output Versions VDO (Note 8) IO = 1.0 mA, DVOUT = −2% IO = 500 mA, DVOUT = −2% 20 300 90 700 mV Dropout Voltage Adjustable Output Versions VDO (Note 9) IO = 1.0 mA, DVOUT = −2% IO = 500 mA, DVOUT = −2% 20 300 90 700 mV IGND IO = 100 mA IO = 500 mA (Note 7) 300 10 500 20 mA mA Iq Adjustable and 1.5 V versions All other versions 30 40 50 50 mA IOUT(LIM) VOUT = 0 V (Note 7) 700 900 mA Ripple Rejection Ratio RR f = 120 Hz 75 Output Noise Voltage (Note 10) Vn f = 10 Hz to 100 kHz, VIN = 2.5 V VOUT = 1.25 V, IO = 1.0 mA 20 f = 10 Hz to 100 kHz, VIN = 2.5 V VOUT = 1.25 V, IO = 100 mA 34 Ground Current Quiescent Current in Shutdown (NCP5500, NCV5500) Current Limit Minimum Output Capacitance / ESR for Stability COUT / ESR 5.0 mA < IO < 500 mA TA = 25°C VENoff VENon OFF (shutdown) State ON (enabled) State IEN VEN = VIN, VIN = 2.5 V, IO = 1.0 mA IADJ VEN = VIN, VADJ = 1.25 V, VOUT = 1.25 V TSD IO = 100 mA 500 dB mVrms 4.7 mF / 3 W ENABLE (NCP5500, NCV5500 Only) Enable Voltage Enable Pin Bias Current 0.4 V − 1.0 mA − 60 nA − 210 °C 2.0 ADJUST Adjust Pin Current (Note 11) THERMAL SHUTDOWN Thermal Shutdown Temperature (Note 11) 150 6. Deviation from nominal. For adjustable versions, Pin ADJ connected to OUT. 7. Use pulse loading to limit power dissipation (duration < 100 mS and duty cycle < 1%). 8. VDO = VIN − VOUT. For <2.5 V versions, VDO will be constrained by the minimum input voltage of 2.5 V. 9. VDO = VIN − VOUT. For output voltage set to <2.5 V, VDO will be constrained by the minimum input voltage. 10. Vn for other fixed voltage versions, as well as adjustable versions set to other output voltages, can be calculated from the following formula: Vn = Vn(x) * (VOUT − 1.25) / 1.25, where Vn(x) is the typical value from the table above. 11. Not tested in production. Limits are guaranteed by design. http://onsemi.com 4 NCP5500, NCV5500, NCP5501, NCV5501 IIN Input CBulk 10 mF OUT IN CIN 100 nF NCV5500 NCP5500 IOUT COUT Enable EN IEN GND Output ADJ IADJ OUT IOUT RL IGND IQ IIN Input CBulk 10 mF IN CIN 100 nF Output COUT NCV5501 RL GND IGND IQ Figure 3. Measuring Circuits Circuit Description electrolytic capacitor is best, since a film or ceramic capacitor with its almost zero ESR, can cause instability. The aluminum electrolytic capacitor is the least expensive solution. However, if the circuit operates at low temperatures (−25°C to −40°C), both capacitor value and ESR will vary considerably. The capacitor manufacturer’s data sheet usually provides temperature performance data. Stability is guaranteed for COUT = 4.7 mF and ESR < 3 W. The NCP5500/NCP5501/NCV5500/NCV5501 are integrated linear regulators with a DC load current capability of 500 mA. The output voltage is regulated by a PNP pass transistor controlled by an error amplifier and band gap reference. The choice of a PNP pass element provides the lowest possible dropout voltage, particularly at reduced load currents. Pass transistor base drive current is controlled to prevent oversaturation. The regulator is internally protected by both current limit and thermal shutdown. Thermal shutdown occurs when the junction temperature exceeds 150°C. The NCV5500 includes an enable/shutdown pin to turn off the regulator to a low current drain standby state. Enable Input (NCP5500, NCV5500) The enable pin is used to turn the regulator on or off. By holding the pin at a voltage less than 0.5 V, the output of the regulator will be turned off to a minimal current drain state. When the voltage at the Enable pin is greater than 2.0 V, the output of the regulator will be enabled and rise to the regulated output voltage. The Enable pin may be connected directly to the input pin to provide a constant enable to the regulator. Regulator The error amplifier compares the reference voltage to a sample of the output voltage (VOUT) and drives the base of a PNP series pass transistor via a buffer. The reference is a bandgap design for enhanced temperature stability. Saturation control of the PNP pass transistor is a function of the load current and input voltage. Oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized. Active Load Protection in Shutdown (NCP5500, NCV5500) When a linear regulator is disabled (shutdown), the output (load) voltage should be zero. However, stray PC board leakage paths, output capacitor dielectric absorption, and inductively coupled power sources can cause an undesirable regulator output voltage if load current is low or zero. The NCV5500 features a load protection network that is active only during Shutdown mode. This network switches in a shunt current path (~500 mA) from VOUT to Ground. This feature also provides a controlled (“soft”) discharge path for the output capacitor after a transition from Enable to Shutdown. Regulator Stability Considerations The input capacitors (CBULK and CIN) are necessary to stabilize the input impedance to reduce transient line influences. The output capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum http://onsemi.com 5 NCP5500, NCV5500, NCP5501, NCV5501 DEFINITION OF TERMS Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated: Dropout Voltage: The input−to−output voltage differential at which the circuit ceases to regulate against further reduction input voltage. Measured when the output voltage has dropped 2% relative to the value measured at 6.0 V input, dropout voltage is dependent upon load current and junction temperature. Input Voltage: The DC voltage applied to the input terminals with respect to ground. Line Regulation: The change in output voltage for a change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected. Load Regulation: The change in output voltage for a change in load current at constant chip temperature. Pulse loading techniques are employed such that the average chip temperature is not significantly affected. Quiescent Current: The part of the positive input current that does not contribute to the positive load current. The regulator ground pin current with no load. Ripple Rejection: The ratio of the peak−to−peak input ripple voltage to the peak−to−peak output ripple voltage. Current Limit: Peak current that can be delivered to the output. R qJA + ǒ150°C * T AǓ PD (eq. 2) The value of RqJA can then be compared with those in the package section of the data sheet. Those packages with RqJA less than the calculated value in Equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heat sink will be required. Heat sinks A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RqJA: R qJA + R qJC ) R qCS ) R qSA (eq. 3) where RqJC is the junction−to−case thermal resistance, RqCS is the case−to−heatsink thermal resistance, RqSA is the heatsink−to−ambient thermal resistance. RqJC appears in the package section of the data sheet. Like RqJA, it too is a function of package type. RqCS and RqSA are functions of the package type, heat sink and the interface between them. These values appear in data sheets of heat sink manufacturers. Thermal, mounting, and heat sink considerations are further discussed in ON Semiconductor Application Note AN1040/D. Calculating Power Dissipation The maximum power dissipation for a single output regulator (Figure 3) is: P D(max) + ƪV IN(max) * V OUT(min)ƫI OUT(max) ) V IN(max)I q (eq. 1) Where VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, IGND is the ground current at IOUT(max). http://onsemi.com 6 NCP5500, NCV5500, NCP5501, NCV5501 ORDERING INFORMATION Nominal Output Voltage Package Marking 1.5 Package Shipping † P5500LG DPAK−5 (Pb−Free) 2500 / Tape & Reel NCV5500DT15RKG V5500LG DPAK−5 (Pb−Free) 2500 / Tape & Reel NCP5501DT15RKG P5501LG DPAK (Pb−Free) 2500 / Tape & Reel NCP5501DT15G P5501LG DPAK (Pb−Free) 75 Units / Rail NCV5501DT15RKG V5501LG DPAK (Pb−Free) 2500 / Tape & Reel NCV5501DT15G V5501LG DPAK (Pb−Free) 75 Units / Rail P5500UG DPAK−5 (Pb−Free) 2500 / Tape & Reel NCP5501DT50RKG P5501UG DPAK (Pb−Free) 2500 / Tape & Reel NCP5501DT50G P5501UG DPAK (Pb−Free) 75 Units / Rail P5500WG DPAK−5 (Pb−Free) 2500 / Tape & Reel Device NCP5500DT15RKG NCP5500DT50RKG NCP5500DTADJRKG 5.0 Adjustable †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 7 NCP5500, NCV5500, NCP5501, NCV5501 PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE O −T− C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. SEATING PLANE E R 4 Z A S 1 2 DIM A B C D E F G H J K L R S U V Z 3 U K F J L H D 2 PL G 0.13 (0.005) M T RECOMMENDED FOOTPRINT 6.20 0.244 2.58 0.101 5.80 0.228 3.0 0.118 1.6 0.063 6.172 0.243 SCALE 3:1 http://onsemi.com 8 mm Ǔ ǒinches INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.180 0.215 0.025 0.040 0.020 −−− 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.57 5.45 0.63 1.01 0.51 −−− 0.89 1.27 3.93 −−− NCP5500, NCV5500, NCP5501, NCV5501 PACKAGE DIMENSIONS DPAK 5, CENTER LEAD CROP CASE 175AA−01 ISSUE A −T− C B V E R DIM A B C D E F G H J K L R R1 S U V Z R1 Z A S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. SEATING PLANE 1 2 3 4 5 U K F J L H D G 5 PL 0.13 (0.005) M INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.020 0.028 0.018 0.023 0.024 0.032 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.045 BSC 0.170 0.190 0.185 0.210 0.025 0.040 0.020 −−− 0.035 0.050 0.155 0.170 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.51 0.71 0.46 0.58 0.61 0.81 4.56 BSC 0.87 1.01 0.46 0.58 2.60 2.89 1.14 BSC 4.32 4.83 4.70 5.33 0.63 1.01 0.51 −−− 0.89 1.27 3.93 4.32 T SOLDERING FOOTPRINT* 6.4 0.252 2.2 0.086 0.34 5.36 0.013 0.217 5.8 0.228 10.6 0.417 0.8 0.031 SCALE 4:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: [email protected] http://onsemi.com 9 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NCP5500/D