ONSEMI NIF9N05CLT3

NIF9N05CL
Protected Power MOSFET
2.6 A, 52 V, N−Channel, Logic Level,
Clamped MOSFET w/ ESD Protection
in a SOT−223 Package
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Benefits
• High Energy Capability for Inductive Loads
• Low Switching Noise Generation
Features
•
•
•
•
•
Diode Clamp Between Gate and Source
ESD Protection − HBM 5000 V
Active Over−Voltage Gate to Drain Clamp
Scalable to Lower or Higher RDS(on)
Internal Series Gate Resistance
VDSS
(Clamped)
RDS(ON) TYP
ID MAX
52 V
107 mΩ
2.6 A
Drain
(Pins 2, 4)
Gate
(Pin 1)
Applications
• Automotive and Industrial Markets:
RG
MPWR
Overvoltage
Protection
ESD Protection
Solenoid Drivers, Lamp Drivers, Small Motor Drivers
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage Internally Clamped
VDSS
52−59
V
Gate−to−Source Voltage − Continuous
VGS
±15
V
Drain Current
− Continuous @ TA = 25°C
− Single Pulse (tp = 10 s) (Note 1)
ID
IDM
2.6
10
A
Total Power Dissipation @ TA = 25°C (Note 1)
PD
1.69
W
TJ, Tstg
−55 to
150
°C
EAS
110
mJ
Rating
Operating and Storage Temperature Range
Thermal Resistance
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from Case for 10 s
SOT−223
CASE 318E
STYLE 3
MARKING DIAGRAM
1
GATE
2
DRAIN
°C/W
RJA
RJA
74
169
TL
260
F9N05
AWW
Single Pulse Drain−to−Source
Avalanche Energy (VDD = 50 V, ID(pk) = 1.17 A,
VGS = 10 V, L = 160 mH, RG = 25 )
Source
(Pin 3)
4
DRAIN
3
SOURCE
(Top View)
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. When surface mounted to an FR4 board using 1″ pad size, (Cu area 1.127 in2)
2. When surface mounted to an FR4 board using minimum recommended pad
size, (Cu area 0.412 in2)
F9N05
A
WW
= Specific Device Code
= Assembly Location
= Work Week
ORDERING INFORMATION
Package
Shipping†
NIF9N05CLT1
SOT−223
1000/Tape & Reel
NIF9N05CLT3
SOT−223
4000/Tape & Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
 Semiconductor Components Industries, LLC, 2004
July, 2004 − Rev. 3
1
Publication Order Number:
NIF9N05CL/D
NIF9N05CL
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
52
50.8
55
54
−9.3
59
59.5
V
V
mV/°C
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3)
(VGS = 0 V, ID = 1.0 mA, TJ = 25°C)
(VGS = 0 V, ID = 1.0 mA, TJ = −40°C to 125°C)
Temperature Coefficient (Negative)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = 40 V, VGS = 0 V)
(VDS = 40 V, VGS = 0 V, TJ = 125°C)
IDSS
Gate−Body Leakage Current
(VGS = ±8 V, VDS = 0 V)
(VGS = ±14 V, VDS = 0 V)
IGSS
A
10
25
±22
±10
A
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
(VDS = VGS, ID = 100 A)
Threshold Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−Resistance (Note 3)
(VGS = 3.5 V, ID = 0.6 A)
(VGS = 4.0 V, ID = 1.5 A)
(VGS = 10 V, ID = 2.6 A)
RDS(on)
1.3
Forward Transconductance (Note 3) (VDS = 15 V, ID = 2.6 A)
1.75
−4.1
2.5
190
165
107
380
200
125
V
mV/°C
m
gFS
3.8
Mhos
Ciss
155
250
Coss
60
100
Crss
25
40
Ciss
170
Coss
70
Crss
30
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
VDS = 35 V, VGS = 0 V,
f = 10 kHz
Transfer Capacitance
Input Capacitance
Output Capacitance
VDS = 25 V, VGS = 0 V,
f = 10 kHz
Transfer Capacitance
3. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
pF
pF
NIF9N05CL
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
td(on)
275
465
ns
tr
1418
2400
td(off)
780
1320
tf
1120
1900
td(on)
242
tr
1165
td(off)
906
tf
1273
td(on)
107
tr
290
td(off)
1540
tf
1000
QT
4.5
Q1
0.9
Q2
2.6
QT
3.9
Q1
1.0
Q2
1.7
VSD
0.81
0.66
trr
730
ta
200
tb
530
QRR
6.3
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
VGS = 4.5 V, VDD = 40 V,
ID = 2.6 A, RD = 15.4 Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
VGS = 4.5 V, VDD = 40 V,
ID = 1.0 A, RD = 40 Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
VGS = 10 V, VDD = 15 V,
ID = 2.6 A, RD = 5.8 Fall Time
Gate Charge
VGS = 4.5 V, VDS = 40 V,
ID = 2.6 A (Note 3)
Gate Charge
VGS = 4.5 V, VDS = 15 V,
ID = 1.5 A (Note 3)
ns
ns
7.0
nC
nC
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
IS = 2.6 A, VGS = 0 V (Note 3)
IS = 2.6 A, VGS = 0 V, TJ = 125°C
Reverse Recovery Time
IS = 1.5 A, VGS = 0 V,
dIs/dt = 100 A/s (Note 3)
Reverse Recovery Stored Charge
1.5
V
ns
C
ESD CHARACTERISTICS
Electro−Static Discharge
Capability
ESD
Human Body Model (HBM)
Machine Model (MM)
5000
500
3. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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3
V
NIF9N05CL
TYPICAL PERFORMANCE CURVES
3.8 V
VGS = 10, 5 & 4 V
6
TJ = 25°C
VDS ≥ 10 V
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
6
3.6 V
4
3.4 V
3.2 V
2
3V
2.8 V
2.6 V
2.4 V
0
0
5
4
3
TJ = −55°C
2
TJ = 25°C
1
TJ = 100°C
0
2
1
3
4
5
6
7
8
9
10
4
2
3
5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
1
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
Figure 2. Transfer Characteristics
0.4
ID = 2 A
TJ = 25°C
0.3
0.2
0.1
0
2
8
10
4
6
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
12
0.24
TJ = 25°C
0.2
VGS = 4 V
0.16
0.12
VGS = 10 V
0.08
1
3
2
4
5
6
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1000000
1.9
ID = 2.6 A
VGS = 12 V
1.7
IDSS, LEAKAGE (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
Figure 1. On−Region Characteristics
6
1.5
1.3
1.1
0.9
100000
TJ = 150°C
TJ = 100°C
10000
0.7
0.5
−50
−25
0
25
50
75
100
125
1000
30
150
35
40
45
50
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
55
NIF9N05CL
TJ = 25°C
C, CAPACITANCE (pF)
Ciss
400 VDS = 0 V
VGS = 0 V
Crss
300
200
Ciss
100
Coss
Crss
0
10
5
VGS
0
VDS
5
10
15
20
25
30
35
5
50
QT
VDS
4
QGS
3
30
2
20
1
10
ID = 2.6 A
TJ = 25°C
0
0
1
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
2
4
3
QG, TOTAL GATE CHARGE (nC)
0
5
Figure 8. Gate−to−Source Voltage vs. Total
Gate Charge
Figure 7. Capacitance Variation
100000
3
IS, SOURCE CURRENT (AMPS)
VDD = 40 V
ID = 2.6 A
VGS = 10 V
10000
t, TIME (ns)
40
VGS
QGD
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
500
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES
td(off)
tf
1000
tr
td(on)
100
10
1
10
100
VGS = 0 V
TJ = 25°C
2
1
0
0.5
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE ()
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistance Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
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5
1
NIF9N05CL
PACKAGE DIMENSIONS
SOT−223
CASE 318E−04
ISSUE K
A
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
S
B
1
2
3
D
L
G
J
C
0.08 (0003)
H
M
K
INCHES
DIM MIN
MAX
A
0.249
0.263
B
0.130
0.145
C
0.060
0.068
D
0.024
0.035
F
0.115
0.126
G
0.087
0.094
H 0.0008 0.0040
J
0.009
0.014
K
0.060
0.078
L
0.033
0.041
M
0
10 S
0.264
0.287
STYLE 3:
PIN 1.
2.
3.
4.
MILLIMETERS
MIN
MAX
6.30
6.70
3.30
3.70
1.50
1.75
0.60
0.89
2.90
3.20
2.20
2.40
0.020
0.100
0.24
0.35
1.50
2.00
0.85
1.05
0
10 6.70
7.30
GATE
DRAIN
SOURCE
DRAIN
ON Semiconductor and
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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NIF9N05CL/D