PLC MIMO Line Driver ISL15110 Features The ISL15110 is a dual port differential line driver developed for Power Line Communication (PLC) Multi Input Multi Output (MIMO) applications. MIMO PLC requires transmission on one or two pairs of Phase, Neutral, and Ground wires. The device is designed to drive heavy line loads, while maintaining a high level of linearity required in OFDM PLC modem links. With 15.5dBm of total MIMO transmit signal power (12.5dBm per each pair) into a 50Ω line load, the drivers deliver -50dB average MTPR distortion across the output spectrum. • Dual differential drivers Each of the two differential drivers has a control pin used to enable/disable its differential output. These controls allow for independent TDM operation of the two differential drivers, as required in ITU-T MIMO G.hn and related standard based PLC applications. In disable mode, the line driver output maintains a high impedance characteristic to not affect TDM receive signal integrity. • Enable port control voltage <0.7V • 50MHz broadband PLC G.hn • Enable/disable control pins for TDM operation • -50dBc average MTPR distortion • Single supply +12V nominal operation • Enhanced surge current handling capability • Thermally enhanced 20 Ld QFN package • Disable port control voltage >1.7V Applications • Home networking over power lines • ITU-T G.hn (G.9963) MIMO PLC The ISL15110 includes an external IBIAS pin for quiescent current flexibility. Grounding the pin in single supply designs gives the nominal currents in the “Electrical Specifications” table on page 6, while inserting a resistor from pin to ground can be used to scale down the quiescent current for both ports. The ISL15110 is available in the thermally-enhanced 20 Ld QFN and is specified for operation over the full -40°C to +85°C temperature range. +VS -35 GND -40 OUTC OUTB + + FBA + + FBD OUTA OUTD R R ENAB 6.2k Ω +VS 6.2k Ω R -45 FBC MTPR (dBc) FBB -50 11PT RUNNING AVERAGE -55 R ENCD 6.2k Ω 6.2k Ω -60 -65 0 INB INA IBIAS INC IND FIGURE 1. BLOCK DIAGRAM January 31, 2013 FN8282.0 1 10M 20M 30M FREQUENCY (Hz) 40M 50M FIGURE 2. SISO 15.5dBm, 2MHz TO 50MHz MTPR TEST CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2013. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL15110 Typical Application Circuit + +12V +VS INA 4.7µF 0.1µF + 100nF ¼ ISL15110 3.9 OUTA 6.2k 500 1:1.7 0.44VP-P +Vs/2 FBA 7.8VP-P 60.4 200 ZLINE 100 21.2VP-P MAXIMUM FBB 6.2k ¼ ISL15110 500 OUTB 0.4dB INSERTION LOSS 3.9 100nF INB + PLINE = 15.5dBm [SISO] CF = 5.62VP-P/VRMS RL(DIFF) = 29.5 Ω at Transformer inputs ENAB IBIAS FIGURE 3. TYPICAL APPLICATION CIRCUIT (1 of 2 PORTS) For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 2 FN8282.0 January 31, 2013