HITACHI HD74HC299

HD74HC299
8-bit Universal Shift/Storage Register (with 3-state outputs)
Description
The HD74HC299 features multiplexed inputs/outputs to achieve full 8-bit data handling in a single 20-pin
package. Due to the large output drive capability and 3-state feature, this device is ideally suited for
interfacing with bus lines in a bus oriented system. Two function select inputs and two output control
inputs are used to choose the mode of operation as listed in the function table. Synchronous parallel
loading is accomplished by taking both function select lines S0 and S 1 high. This places the 3-state outputs
in a high impedance state, which permits data applied to the input/output lines to be clocked into the
register. Reading out of the register can be done while the outputs are enabled in any mode. A direct
overriding clear input is provided to clear the register whether the outputs are enabled or disabled.
Features
•
•
•
•
•
High Speed Operation
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
HD74HC299
Function Table
Inputs
Function
Select
Output
Control
Serial Inputs/Outputs
Outputs
Mode
Clear
S1
S0
G1† G2†
Clock SL SR A/QA B/QB C/QC D/QD E/QE F/QF G/Q G H/QH QA’
QH’
Clear
L
X
L
L
L
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
X
L
L
X
X
X
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
X
X
X
QA0
QB0
QC0
QD0
QE0
QF0
QG0
QH0
QA0
QH0
H
X
X
L
L
L
X
X
QA0
QB0
QC0
QD0
QE0
QF0
QG0
QH0
QA0
QH0
Shift
H
L
H
L
L
X
H
H
QAn
QBn
QCn
QDn
QEn
QFn
QGn
H
QGn
Right
H
L
H
L
L
X
L
L
QAn
QBn
QCn
QDn
QEn
QFn
QGn
L
QGn
Shift
H
H
L
L
L
H
X
QBn
QCn
QDn
QEn
QFn
QGn
QHn
H
QBn
H
Left
H
H
L
L
L
L
X
QBn
QCn
QDn
QEn
QFn
QGn
QHn
L
QBn
L
Load
H
H
H
X
X
X
X
a
b
c
d
e
f
g
h
a
h
Hold
Notes: 1. a to h; the level of steady-state input at inputs A through H, respectively. These data are
loaded into the flip-flop outputs are isolated from the input/output terminals.
2. QA0 to Q H0; the level of QA through QH , respectively, before the indicated steady-state input
conditions were established.
3. QAn to Q Hn; the level of QA through QH , respectively, before the most-recent
transition of the
clock.
4. † = ; When one or both output controls are high the eight input/output terminals are desabled to
the high-impedance state, however, sequential operation or clearing of the register is not
affected.
5. When clear is low, outputs of Q A’ and QH’ are low, in spite of other inputs.
2
HD74HC299
Pin Arrangement
S0
Output
controls
G1
1
20 VCC
S0
2
S1
19 S1
SL
18
17 QH
G
Shift left
SL
G2
3
G/QC
4
G/QG
QH
E/QE
5
E/QE
H/QH
16 H/QH
C/QC
6
C/QC
F/QF
15 F/QF
A/QA
7
A/QA
D/QD
14 D/QD
QA
8
QA
B/QB
13 B/QB
Clear
9
Clear
SR
CK
12 Clock
11 Shift right
SR
GND 10
(Top view)
Absolute Maximum Ratings
Item
Symbol
Rating
Unit
Supply voltage range
VCC
–0.5 to +7.0
V
Input voltage
VIN
–0.5 to VCC + 0.5
V
Output voltage
VOUT
–0.5 to VCC + 0.5
V
Output current
I OUT
±35
mA
DC current drain per VCC, GND
I CC, I GND
±75
mA
DC input diode current
I IK
±20
mA
DC output diode current
I OK
±20
mA
Power dissipation per package
PT
500
mW
Storage temperature
Tstg
–65 to +150
°C
3
HD74HC299
Block Diagram
Sift
right
serial-input
S1
Sift
left
serial-input
S0
D
Clear
D
D
D
D
D
D
D
Q
Q
Q
Q
Q
Q
Q
Q
C C CLR
C C CLR
C C CLR
C C CLR
C C CLR
C C CLR
C C CLR
C C CLR
Clock
G2
G1
QA
4
A QA
B QB
C QC
D QD
E QE
F QF
G QG QH
H QH
HD74HC299
DC Characteristics
Ta = –40 to
+85°C
Ta = 25°C
Item
Symbol
VCC (V) Min Typ Max Min
Max
Unit Test Conditions
Input voltage
VIH
2.0
1.5 —
—
1.5
—
V
4.5
3.15 —
—
3.15
—
6.0
4.2 —
—
4.2
—
2.0
—
—
0.5
—
0.5
4.5
—
—
1.35 —
1.35
6.0
—
—
1.8
—
1.8
2.0
1.9 2.0 —
1.9
—
4.5
4.4 4.5 —
4.4
—
6.0
5.9 6.0 —
5.9
—
4.5
4.18 —
—
4.13
6.0
5.68 —
—
4.5
4.18 —
6.0
5.68 —
2.0
—
4.5
VIL
Output voltage
VOH
VOL
V
Vin = VIH or VIL
I OH = –20 µA
—
QA’ & QH’
I OH = –4 mA
5.63
—
Outputs
I OH = –5.2 mA
—
4.13
—
A/Q A thru
I OH = –6 mA
—
5.63
—
H/QH Outputs I OH = –7.8 mA
0.0 0.1
—
0.1
—
0.0 0.1
—
0.1
6.0
—
0.0 0.1
—
0.1
4.5
—
—
0.26 —
6.0
—
—
4.5
—
6.0
V
Vin = VIH or VIL
I OL = 20 µA
0.33
QA’ & QH’
I OH = 4 mA
0.26 —
0.33
Outputs
I OH = 5.2 mA
—
0.26 —
0.33
A/Q A thru
I OH = 6 mA
—
—
0.26 —
0.33
H/QH Outputs I OH = 7.8 mA
V
Off-state output
current
I OZ
6.0
—
—
±0.5 —
±5.0
µA
Vin = VIH or VIL,
Vout = VCC or GND
Input current
Iin
6.0
—
—
±0.1 —
±1.0
µA
Vin = VCC or GND
Quiescent supply
current
I CC
6.0
—
—
4.0
40
µA
Vin = VCC or GND, Iout = 0 µA
—
5
HD74HC299
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = –40 to
+85°C
Ta = 25°C
Item
Symbol
VCC (V) Min Typ Max Min
Max
Unit
Maximum clock
f max
2.0
—
—
5
—
4
MHz
4.5
—
—
25
—
20
6.0
—
—
29
—
23
Propagation delay t PLH
2.0
—
—
190 —
240
time
4.5
—
—
38
—
48
6.0
—
—
32
—
41
2.0
—
—
220 —
275
4.5
—
—
44
—
55
6.0
—
—
37
—
47
t PLH
2.0
—
—
190 —
240
t PHL
4.5
—
—
38
—
48
6.0
—
—
32
—
41
2.0
—
—
220 —
275
4.5
—
—
44
—
55
6.0
—
—
37
—
47
frequency
t PHL
t PHL
t PHL
Output enable
t ZH
2.0
—
—
160 —
200
time
t ZL
4.5
—
—
32
—
40
6.0
—
—
27
—
34
Output disable
t HZ
2.0
—
—
160 —
200
time
t LZ
4.5
—
—
32
—
40
6.0
—
—
27
—
34
2.0
100 —
—
125
—
4.5
20
—
—
25
—
6.0
17
—
—
21
—
2.0
5
—
—
5
—
4.5
5
—
—
5
—
6.0
5
—
—
5
—
2.0
50
—
—
65
—
4.5
10
—
—
13
—
6.0
9
—
—
11
—
2.0
80
—
—
100
—
4.5
16
—
—
20
—
6.0
14
—
—
17
—
Setup time
Hold time
Removal time
Pulse width
6
t su
th
t rem
tw
Test Conditions
ns
Clock to QA’ or QH ’
ns
Clear to QA’ or QH ’
ns
Clock to QA – QH
ns
Clear to QA – QH
ns
ns
ns
Select
ns
Select
ns
Clear
ns
HD74HC299
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) (cont)
Ta = –40 to
+85°C
Ta = 25°C
Item
Symbol
VCC (V) Min Typ Max Min
Max
Unit
Test Conditions
Output rise/fall
t TLH
2.0
—
—
60
—
75
ns
A/Q A thru H/QH outputs
time
t THL
4.5
—
—
12
—
15
6.0
—
—
10
—
13
2.0
—
—
75
—
95
ns
QA’ & QH’ outputs
4.5
—
—
15
—
19
6.0
—
—
13
—
16
—
—
5
10
—
10
Input capacitance
Cin
pF
7
Unit: mm
24.50
25.40 Max
6.30
11
1
7.00 Max
20
10
1.30
2.54 ± 0.25
0.48 ± 0.10
0.51 Min
1.27 Max
2.54 Min 5.08 Max
0.89
7.62
+ 0.11
0.25 – 0.05
0° – 15°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-20N
—
Conforms
1.26 g
Unit: mm
12.6
13 Max
11
1
10
1.27
*0.42 ± 0.08
0.40 ± 0.06
0.10 ± 0.10
0.80 Max
*0.22 ± 0.05
0.20 ± 0.04
2.20 Max
5.5
20
0.20
7.80 +– 0.30
1.15
0° – 8°
0.70 ± 0.20
0.15
0.12 M
*Dimension including the plating thickness
Base material dimension
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
FP-20DA
—
Conforms
0.31 g
Unit: mm
12.8
13.2 Max
11
1
10
0.20 ± 0.10
0.935 Max
1.27
*0.42 ± 0.08
0.40 ± 0.06
*0.27 ± 0.05
0.25 ± 0.04
2.65 Max
7.50
20
0.25
10.40 +– 0.40
1.45
0° – 8°
0.57
0.70 +– 0.30
0.15
0.12 M
*Dimension including the plating thickness
Base material dimension
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
FP-20DB
Conforms
—
0.52 g
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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