HD74HC390 Dual Decade Counters Description The HD74HC390 incorporate dual decade counters, each composed of a divide-by-two and a divide-byfive counter. The divide-by-two and divide-by-five counters can be cascaded to form dual decade, dual biquinary, or various combinations up to a single divide-by-100 counter. The HD74HC390 is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. When clear is set high all four bits of each counter are set to a low level. This enables count truncation and allows the implementation of divide-by-N counter configurations. Features • • • • • High Speed Operation: tpd (Clock A to QA) = 11 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Clock A B Clear Operation X X H Clear ÷2 and ÷5 X L Increment ÷2 L Increment ÷5 X HD74HC390 1A 1 16 VCC 1Clear 2 15 2A 1QA Output 3 CLR 1QA 1A 1B 4 1B CLR 2QA 2A 1QB 5 1QB 2B 12 2B 1QC 6 1QC 2QB 11 2QB 1QD 7 1QD 2QC 10 2QC GND 8 14 2Clear 2QD (Top view) 2 13 9 2QA Output 2QD Outputs Outputs Pin Arrangement HD74HC390 Block Diagram (1/2) Clear A CK D Q CK R Q A B CK D Q CK R Q B CK D Q CK R Q C CK D Q CK R Q D 3 HD74HC390 DC Characteristics Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Input voltage VIH 2.0 1.5 — — 1.5 — V 4.5 3.15 — — 3.15 — 6.0 4.2 — — 4.2 — 2.0 — — 0.5 — 0.5 4.5 — — 1.35 — 1.35 6.0 — — 1.8 — 1.8 2.0 1.9 2.0 — 1.9 — 4.5 4.4 4.5 — 4.4 — 6.0 5.9 6.0 — 5.9 — 4.5 4.18 — — 4.13 — I OH = –4 mA 6.0 5.68 — — 5.63 — I OH = –5.2 mA 2.0 — 0.0 0.1 — 0.1 4.5 — 0.0 0.1 — 0.1 6.0 — 0.0 0.1 — 0.1 4.5 — — 0.26 — 0.33 I OL = 4 mA 6.0 — — 0.26 — 0.33 I OL = 5.2 mA VIL Output voltage VOH VOL Test Conditions V V V Vin = VIH or VIL I OH = –20 µA Vin = VIH or VIL I OL = 20 µA Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND Quiescent supply current I CC 6.0 — — 4.0 40 µA Vin = VCC or GND, Iout = 0 µA 4 — HD74HC390 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Maximum clock f max 2.0 — — 5 — 4 MHz 4.5 — — 27 — 21 6.0 — — 32 — 25 Propagation delay t PLH 2.0 — — 120 — 150 time 4.5 — 11 24 — 30 6.0 — — 20 — 26 t PLH 2.0 — — 290 — 365 t PHL 4.5 — 32 58 — 73 6.0 — — 49 — 62 t PLH 2.0 — — 130 — 165 t PHL 4.5 — 16 26 — 33 6.0 — — 22 — 28 t PLH 2.0 — — 185 — 230 t PHL 4.5 — 20 37 — 46 6.0 — — 31 — 39 t PLH 2.0 — — 130 — 165 t PHL 4.5 — 15 26 — 33 6.0 — — 22 — 28 2.0 — — 165 — 205 4.5 — 14 33 — 41 6.0 — — 28 — 35 2.0 80 — — 100 — 4.5 16 8 — 20 — 6.0 14 — — 17 — 2.0 25 — — 31 — 4.5 5 1 — 6 — 6.0 4 — — 5 — frequency t PHL t PHL Pulse width Removal time tw th Output rise/fall t TLH 2.0 — — 75 — 95 time t THL 4.5 — 5 15 — 19 6.0 — — 13 — 16 — — 5 10 — 10 Input capacitance Cin Test Conditions ns Clock A to Q A ns Clock A to Q C (QA connected to Clock B) ns Clock B to Q B ns Clock B to Q C ns Clock B to Q D ns Clear to QA, QB, QC, QD ns ns ns pF 5 Unit: mm 19.20 20.00 Max 1 7.40 Max 9 6.30 16 8 1.3 0.48 ± 0.10 2.54 Min 5.06 Max 2.54 ± 0.25 0.51 Min 1.11 Max 7.62 + 0.13 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 16 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA — Conforms 0.24 g Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.42 ± 0.08 0.40 ± 0.06 0.15 *0.22 ± 0.03 0.20 ± 0.03 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0° – 8° 0.67 0.60 +– 0.20 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Cautions 1. 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