HD74HC4518/HD74HC4520 Dual BCD Use Converters/Dual Binary Up Converters Description The HD74HC4518 dual BCD counter and the HD74HC4520 dual binary counter consist of two identical, independent, internally synchronous 4-stage counters. The counter stages are type D flip-flops, with interchangeable Clock and Enable lines for incrementing on either the positive-going or negative-going transition as required when cascading multiple stages. Each counter can be cleared by applying a high level on the Reset line. In addition, the HD74HC4518 will count out of all undefined states within two clock periods. These complementary MOS up counters find primary use in multi-stage synchronous or ripple counting applications requiring low power dissipation and/or high noise immunity. Features • • • • • High Speed Operation High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Clock Enable Reset Operation H L Increment counter L Increment counter L No change L No change L No change L No change H Q0 to Q 3 = L L X X L H X X HD74HC4518/HD74HC4520 Pin Arrangement Clock A 1 16 VCC Enable A 2 15 Reset B Q0 A 3 C Q0 Q1 A 4 Q2 A R Q3 14 Q3 B Q1 Q2 13 Q2 B 5 Q2 Q1 12 Q1 B Q3 A 6 Q3 R Q0 C 11 Q0 B Reset A 7 10 Enable B GND 8 9 (Top view) 2 Clock B HD74HC4518/HD74HC4520 Timing Diagram 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 6 7 8 9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 Clock Enable Reset 0 1 2 3 4 5 0 Q0 Q1 HD74HC4518 Q2 Q3 Q0 Q1 HD74HC4520 Q2 Q3 3 HD74HC4518/HD74HC4520 Logic Diagram HD74HC4518 Q1 Q0 D C Q D Q C Q2 Q D Q C R R Q3 Q D Q C R Q Q R Reset Enable Clock HD74HC4520 Q1 Q0 D C R Reset Enable Clock 4 Q D Q C R Q2 Q D Q C R Q3 Q D Q C Q Q R HD74HC4518/HD74HC4520 DC Characteristics Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Input voltage VIH 2.0 1.5 — — 1.5 — V 4.5 3.15 — — 3.15 — 6.0 4.2 — — 4.2 — 2.0 — — 0.5 — 0.5 4.5 — — 1.35 — 1.35 6.0 — — 1.8 — 1.8 2.0 1.9 2.0 — 1.9 — 4.5 4.4 4.5 — 4.4 — 6.0 5.9 6.0 — 5.9 — 4.5 4.18 — — 4.13 — I OH = –4 mA 6.0 5.68 — — 5.63 — I OH = –5.2 mA 2.0 — 0.0 0.1 — 0.1 4.5 — 0.0 0.1 — 0.1 6.0 — 0.0 0.1 — 0.1 4.5 — — 0.26 — 0.33 I OL = 4 mA 6.0 — — 0.26 — 0.33 I OL = 5.2 mA VIL Output voltage VOH VOL Test Conditions V V V Vin = VIH or VIL I OH = –20 µA Vin = VIH or VIL I OL = 20 µA Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND Quiescent supply current I CC 6.0 — — 4.0 40 µA Vin = VCC or GND, Iout = 0 µA — 5 HD74HC4518/HD74HC4520 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Maximum clock f max 2.0 — — 5 — 4 MHz 4.5 — — 27 — 21 6.0 — — 32 — 25 Propagation delay t PLH 2.0 — — 190 — 240 time 4.5 — 22 38 — 48 6.0 — — 32 — 41 t PLH 2.0 — — 200 — 250 t PHL 4.5 — 22 40 — 50 6.0 — — 34 — 43 t PLH 2.0 — — 190 — 240 t PHL 4.5 — 17 38 — 48 6.0 — — 32 — 41 2.0 80 — — 100 — 4.5 16 7 — 20 — 6.0 14 — — 17 — frequency Pulse width t PHL tw Output rise/fall t TLH 2.0 — — 75 — 95 time t THL 4.5 — — 15 — 19 6.0 — — 13 — 16 ns Clock to Q ns Reset to Q ns Enable to Q ns ns Input capacitance Cin — — 5 10 — 10 pF Removel time t rem 2.0 0 — — 0 — ns 4.5 0 –3 — 0 — 6.0 0 — — 0 — 6 Test Conditions Reset clock Unit: mm 19.20 20.00 Max 1 7.40 Max 9 6.30 16 8 1.3 0.48 ± 0.10 2.54 Min 5.06 Max 2.54 ± 0.25 0.51 Min 1.11 Max 7.62 + 0.13 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 16 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA — Conforms 0.24 g Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.42 ± 0.08 0.40 ± 0.06 0.15 *0.22 ± 0.03 0.20 ± 0.03 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0° – 8° 0.67 0.60 +– 0.20 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Cautions 1. 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Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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