HD74HC668/HD74HC669 Synchronous UP/Down Decade Counter Synchronous Up/Down 4-bit binary Counter Description This synchronous presettable decade counter features an internal carry look-ahead for cascading in highspeed counting applications. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so instructed by the countenable inputs and internal gating. This mode of operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple-clock) counters. A buffered clock input triggers the four master-slave flip-flops on the rising (positive going) edge of the clock waveform. This counter is fully programmable; that is, the outputs may each be preset to either level. The load input circuitry allows loading with the carry-enable output of cascaded counters. As loading is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the data inputs after the next clock pulse. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count enable inputs and a carry output. Both count enable inputs (P and T) must be low to count. The direction of the count is determined by the level of the up/down input. when the input is high, the counter counts up; when low, it counts down. Input T is fed forward to enable the carry output. The carry output thus enabled will produce a low-level output pulse with a duration approximately equal to the high portion of the Q A output when counting up and approximately equal to the low portion of the QA output when counting down. This low level overflow carry pulse can be used to enable successive cascaded stages. Transitions at the enable P or T inputs are allowed regardless of the level of the clock input. All inputs are diode-clamped to minimize transissionline effects, thereby simplifying system design. This counter features a fully independent clock circuit. Changes at control inputs (enable P, Enable T, load, up/down) that will modify the operating mode have no effect until clocking occurs. The function of the counter (whether enabled, disabled, loading, or counting) will be dictated solely by the conditions meeting the stable setup and hold times. Features • • • • High Speed Operation High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max HD74HC668/HD74HC669 • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Pin Arrangement HD74HC668 Data inputs U/D 1 16 VCC CK 2 15 Ripple carry output A 3 14 QA B 4 13 QB C 5 12 QC D 6 11 QD Enable P 7 10 Enable T GND 8 9 Load Outputs (Top view) 2 HD74HC668/HD74HC669 HD74HC669 Data inputs U/D 1 16 VCC CK 2 15 Ripple carry output A 3 14 QA B 4 13 QB C 5 12 QC D 6 11 QD Enable P 7 10 Enable T GND 8 9 Load Outputs (Top view) 3 HD74HC668/HD74HC669 Logic Diagram HD74HC668 T U/D IN L Q CK QA Q DA Load Enable P T L Q QB Enable T IN CK Q DB T IN DC L Q CK QC Q VCC T IN L Q CK QD Q DD RCO CK 4 HD74HC668/HD74HC669 HD74HC669 U/D T Q IN Q T Q IN Q QA DA Load Enable P QB Enable T DB T Q IN Q T Q IN Q QC DC QD DD RCO VCC CK 5 HD74HC668/HD74HC669 Timing Chart HD74HC668 Load A B Data inputs C D Clock U/D Enable P and T QA QB QC QD Ripple carry output 7 8 9 0 Count up Load 6 1 2 2 Inhibit 2 1 0 9 Count down 8 7 HD74HC668/HD74HC669 HD74HC669 Load A B Data inputs C D Clock U/D P and T QA QB QC QD Ripple carry output 13 14 15 0 Count up 1 2 2 Inhibit 2 1 0 15 14 13 Count down Load 7 HD74HC668/HD74HC669 DC Characteristics Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Input voltage VIH 2.0 1.5 — — 1.5 — V 4.5 3.15 — — 3.15 — 6.0 4.2 — — 4.2 — 2.0 — — 0.5 — 0.5 4.5 — — 1.35 — 1.35 6.0 — — 1.8 — 1.8 2.0 1.9 2.0 — 1.9 — 4.5 4.4 4.5 — 4.4 — 6.0 5.9 6.0 — 5.9 — 4.5 4.18 — — 4.13 — I OH = –4 mA 6.0 5.68 — — 5.63 — I OH = –5.2 mA 2.0 — 0.0 0.1 — 0.1 4.5 — 0.0 0.1 — 0.1 6.0 — 0.0 0.1 — 0.1 4.5 — — 0.26 — 0.33 I OL = 4 mA 6.0 — — 0.26 — 0.33 I OL = 5.2 mA VIL Output voltage VOH VOL Test Conditions V V V Vin = VIH or VIL I OH = –20 µA Vin = VIH or VIL I OL = 20 µA Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND Quiescent supply current I CC 6.0 — — 4.0 40 µA Vin = VCC or GND, Iout = 0 µA 8 — HD74HC668/HD74HC669 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Maximum clock f max 2.0 — — 5 — 4 MHz 4.5 — — 27 — 21 6.0 — — 32 — 25 Propagation delay t PLH 2.0 — — 200 — 250 time 4.5 — — 40 — 50 6.0 — — 34 — 43 t PLH 2.0 — — 225 — 280 t PHL 4.5 — — 45 — 56 6.0 — — 38 — 48 t PLH 2.0 — — 150 — 190 t PHL 4.5 — — 30 — 38 6.0 — — 26 — 33 t PLH 2.0 — — 200 — 250 t PHL 4.5 — — 40 — 50 6.0 — — 34 — 43 2.0 80 — — 100 — 4.5 16 — — 20 — 6.0 14 — — 17 — 2.0 100 — — 125 — 4.5 20 — — 25 — 6.0 17 — — 21 — 2.0 150 — — 190 — 4.5 30 — — 38 — 6.0 26 — — 33 — 2.0 150 — — 190 — 4.5 30 — — 38 — 6.0 26 — — 33 — 2.0 150 — — 190 — 4.5 30 — — 38 — 6.0 26 — — 33 — Frequency Pulse width Setup time t PHL tw t su t su t su t su Test Conditions ns Clock to Ripple carry out ns Clock to Q ns Enable T to Ripple carry out ns U/D to Ripple carry out ns ns Data to Clock ns Enable P, T to Clock ns Loadk to Clock ns U/D to Clock 9 HD74HC668/HD74HC669 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) (cont) Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Hold time th 2.0 5 — — 5 — ns 4.5 5 — — 5 — 6.0 5 — — 5 — Output rise/fall t TLH 2.0 — — 75 — 95 time t THL 4.5 — 5 15 — 19 6.0 — — 13 — 16 — — 5 10 — 10 Input capacitance 10 Cin ns pF Test Conditions Unit: mm 19.20 20.00 Max 1 7.40 Max 9 6.30 16 8 1.3 0.48 ± 0.10 2.54 Min 5.06 Max 2.54 ± 0.25 0.51 Min 1.11 Max 7.62 + 0.13 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 16 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA — Conforms 0.24 g Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.42 ± 0.08 0.40 ± 0.06 0.15 *0.22 ± 0.03 0.20 ± 0.03 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0° – 8° 0.67 0.60 +– 0.20 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 URL NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to: Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Stra§e 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.