Revised November 2002 FSTU32X800 20-Bit Bus Switch with Precharged Outputs and −2V Undershoot Protection General Description Features The Fairchild Switch FSTU32X800 provides 20-bits of high-speed CMOS TTL-compatible bus switching. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The A and B Ports are protected against undershoot to support an extended range to 2.0V below ground. Fairchild’s integrated Undershoot Hardened Circuit (UHC) senses undershoot at the I/O and responds by preventing voltage differentials from developing and turning the switch on. The device also precharges the B Port to a selectable bias voltage (BiasV) to minimize live insertion noise. ■ 4Ω switch connection between two ports ■ Undershoot Hardened to -2.0V ■ Soft enable turn-on to minimize bus-to-bus charge sharing during enable ■ Low lCC ■ Zero bounce in flow-through mode ■ Output precharge to minimize live insertion noise ■ Control inputs compatible with TTL level ■ See Applications Note AN-5008 for details The device is organized as two 10-bit switches with a bus enable (OEn) signal. When OEn is LOW, the switch is ON and Port A is connected to Port B. When OEn is HIGH, the switch is OPEN and the B Port is precharged to BiasV through an equivalent 10-kΩ resistor. Ordering Code: Order Number Package Number Package Description FSTU32X800QSP MQA48A 48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. UHC is a trademark of Fairchild Semiconductor Corporation. © 2002 Fairchild Semiconductor Corporation DS500791 www.fairchildsemi.com FSTU32X800 20-Bit Bus Switch with Precharged Outputs November 2002 FSTU32X800 Logic Diagrams Connection Diagram Pin Descriptions Truth Table Pin Name Description OEn B0–B19 OEn Bus Switch Enable L A0–A19 Connect A Bus A H BiasV Precharge B Bus B BiasVn Bus B Voltage Bias www.fairchildsemi.com 2 Function Recommended Operating Conditions (Note 3) Supply Voltage (VCC) −0.5V to +7.0V DC Switch Voltage (VS) −2.0V to +7.0V Power Supply Operating (VCC) 4.0V to 5.5V Bias V Voltage Range −0.5V to +7.0V Precharge Supply (BiasV) 1.5V to VCC DC Input Voltage (VIN) (Note 2) −0.5V to +7.0V Input Voltage (VIN) 0V to 5.5V 0V to 5.5V DC Input Diode Current (lIK) VIN< 0V −50 mA Output Voltage (VOUT) DC Output (IOUT) Sink Current 128 mA Input Rise and Fall Time (tr, tf) +/− 100 mA DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) Switch Control Input −65°C to +150 °C 0 ns/V to 5 ns/V Switch I/O 0 ns/V to DC −40 °C to +85 °C Free Air Operating Temperature (TA) Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions tables will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VCC (V) TA = −40 °C to +85 °C Min Typ (Note 4) Max −1.2 Units Conditions IIN = −18 mA VIK Clamp Diode Voltage VIH HIGH Level Input Voltage 4.0 - 5.5 VIL LOW Level Input Voltage 4.0 - 5.5 0.8 V II Input Leakage Current 5.5 ±1.0 µA 0 ≤ VIN ≤ 5.5V IO Output Current 4.5 mA BiasV = 2.4V, B = 0 IOZ OFF-STATE Leakage Current 5.5 ±1.0 µA 0 ≤ A ≤ VCC, VIN = VIH RON Switch On Resistance 4.5 4.0 7.0 Ω VS = 0V, IIN = 64 mA (Note 5) 4.5 4.0 7.0 Ω VS = 0V, IIN = 30 mA 4.5 8.0 15.0 Ω VS = 2.4V, IIN = 15 mA 4.0 11.0 4.5 2.0 V V 0.25 20.0 Ω VS = 2.4V, IIN = 15 mA ICC Quiescent Supply Current (Note 6) 5.5 3.0 µA VS = VCC or GND, IOUT = 0 ∆ ICC Increase in ICC per Input 5.5 2.5 mA OE Input at 3.4V (Note 7) Other Inputs at VCC or GND IBIAS Bias Pin Leakage Current 5.5 ±1.0 µA OE = 0V, B = 0V, BiasV = 5.5V IOZU Switch Undershoot Current 5.5 100.0 µA IIN = −20 mA, OE = 5.5V, VOUT ≥ VIH VIKU Voltage Undershoot 5.5 −2.0 V 0.0 mA ≥ IIN ≥ −50 mA, OE = 5.5V Note 4: Typical values are at VCC = 5.0V and TA = +25°C Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. Note 6: Per VCC pin. Note 7: Per TTL driven inputs, control pins only. 3 www.fairchildsemi.com FSTU32X800 Absolute Maximum Ratings(Note 1) FSTU32X800 AC Electrical Characteristics TA = −40 °C to +85 °C, Symbol Parameter CL = 50 pF, RU = RD = 500Ω VCC = 4.5 – 5.5V Min tPHL, Propagation Delay Bus to Bus tPLH (Note 8) tPZH Output Enable Time OE1, OE2, to An, Bn tPZL tPHZ Output Disable Time OE1, OE2, to An, Bn tPLZ VCC = 4.0V Max Min Units Conditions Figure Number Max 0.25 0.25 ns 7.0 30.0 35.0 ns 7.0 30.0 35.0 ns 1.0 6.1 6.5 ns 1.0 7.3 6.8 ns Figures 1, 2 VI = OPEN VI = OPEN BiasV = GND Figures 1, 2 VI = 7V BiasV = 3V VI = OPEN BiasV = GND Figures 1, 2 VI = 7V BiasV = 3V Note 8: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage the source (zero output impedance). Capacitance Symbol (Note 9) Parameter Typ Max Units Conditions CIN Control Pin Input Capacitance 3.0 pF VCC = 5.0V CI/O Input/Output Capacitance 5.0 pF VCC, OE = 5.0V Note 9: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. AC Loading and Waveforms Note: Input driven by 50Ω source terminated in 50Ω, RU = RD = 500Ω Note: CL includes load and stray capacitance, C L= 50 pF Note: Input PRR = 1.0 MHz, tW = 500 ns FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms www.fairchildsemi.com 4 FSTU32X800 20-Bit Bus Switch with Precharged Outputs Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide Package Number MQA48A Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com