Revised June 2005
74VCX16838
Low Voltage 16-Bit Selectable Register/Buffer
with 3.6V Tolerant Inputs and Outputs
General Description
Features
The VCX16838 contains sixteen non-inverting selectable
buffered or registered paths. The device can be configured
to operate in a registered, or flow through buffer mode by
utilizing the register enable (REGE) and Clock (CLK) signals. The device operates in a 16-bit word wide mode. All
outputs can be placed into 3-State through use of the OE
Pin. These devices are ideally suited for buffered or registered 168 pin and 200 pin SDRAM DIMM memory modules.
■ Compatible with PC100 and PC133 DIMM module
specifications
The 74VCX16838 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74VCX16838 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintaining low CMOS power dissipation.
■ 1.65V–3.6V VCC supply operation
■ 3.6V tolerant inputs and outputs
■ tPD (CLK to O n)
3.0 ns max for 3.0V to 3.6V VCC
4.0 ns max for 2.3V to 2.7V VCC
8.0 ns max for 1.65V to 1.95V VCC
■ Power-off high impedance inputs and outputs
■ Supports live insertion and withdrawal (Note 1)
■ Static Drive (IOH/IOL)
r24 mA @ 3.0V VCC
r18 mA @ 2.3V VCC
r6 mA @ 1.65V VCC
■ Uses patented noise/EMI reduction circuitry
■ Ideal for SDRAM DIMM modules
■ Latch-up performance exceeds 300 mA
■ ESD performance:
Human body model ! 2000V
Machine model ! 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
Package Number
Package Description
74VCX16838MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
© 2005 Fairchild Semiconductor Corporation
DS500034
Description
OE
Output Enable Input (Active LOW)
I0–I15
Inputs
O0–O15
Outputs
CLK
Clock Input
REGE
Register Enable Input
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74VCX16838 Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
July 1997
74VCX16838
Connection Diagram
Truth Table
Inputs
Outputs
CLK
REGE
In
OE
On
n
H
H
L
H
n
H
L
L
L
X
L
H
L
H
X
L
L
L
L
X
X
X
H
Z
H Logic HIGH
L Logic LOW
X Don’t Care, but not floating
Z High Impedance
n LOW-to-HIGH Clock Transition
Functional Description
The 74VCX16838 consists of sixteen selectable non-inverting buffers or registers with word wide modes. Mode functionality is selected through operation of the CLK and
REGE pin as shown by the truth table. When REGE is held
at a logic HIGH the device operates as a 16-bit register.
Data is transferred from In to On on the rising edge of the
CLK input. When the REGE pin is held at a logic LOW the
device operates in a flow through mode and data propagates directly from the I to the O outputs. All outputs can be
3-STATE by holding the OE pin at a logic HIGH.
Logic Diagram
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2
Recommended Operating
Conditions (Note 4)
0.5V to 4.6V
0.5V to 4.6V
Supply Voltage (VCC)
DC Input Voltage (VI)
Power Supply
Output Voltage (VO)
Operating
Outputs 3-STATE
Outputs Active (Note 3)
DC Input Diode Current (IIK) VI 0V
0.5V to 4.6V
0.5V to VCC 0.5V
50 mA
Output Voltage (VO)
50 mA
50 mA
VO ! VCC
r50 mA
DC VCC or GND Current per
Supply Pin (ICC or GND)
Storage Temperature Range (TSTG)
Output in Active States
0V to VCC
Output in “OFF” State
0V to 3.6V
Output Current in IOH/IOL
DC Output Source/Sink Current
(IOH/IOL)
1.2V to 3.6V
0.3V to 3.6V
Input Voltage
DC Output Diode Current (IOK)
VO 0V
1.65V to 3.6V
Data Retention Only
r100 mA
65qC to 150qC
VCC
3.0V to 3.6V
VCC
2.3V to 2.7V
VCC
1.65V to 2.3V
Free Air Operating Temperature (TA)
r24 mA
r18 mA
r6 mA
40qC to 85qC
Minimum Input Edge Rate ('t/'V)
VIN
0.8V to 2.0V, VCC
3.0V
10 ns/V
Note 2: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 3: IO Absolute Maximum Rating must be observed.
Note 4: Floating or unused inputs must be held HIGH or LOW.
DC Electrical Characteristics (2.7V VCC d 3.6V)
Symbol
Parameter
Conditions
VCC
(V)
VIH
HIGH Level Input Voltage
2.7–3.6
VIL
LOW Level Input Voltage
2.7–3.6
VOH
HIGH Level Output Voltage
VOL
LOW Level Output Voltage
2.7–3.6
VCC 0.2
IOH
12 mA
2.7
2.2
IOH
18 mA
3.0
2.4
2.2
24 mA
3.0
IOL
100 PA
2.7–3.6
0.2
IOL
12 mA
2.7
0.4
IOL
18 mA
3.0
0.4
IOL
24 mA
IOZ
3-STATE Output Leakage
0V d VO d 3.6V
VI
VIH or VIL
IOFF
Power-OFF Leakage Current
0V d (VI, VO) d 3.6V
ICC
Quiescent Supply Current
VI
VCC or GND
VCC d (VI, VO) d 3.6V (Note 5)
VIH
VCC 0.6V
V
V
IOH
0V d VI d 3.6V
Units
V
0.8
100 PA
Input Leakage Current
Increase in ICC per Input
Max
2.0
IOH
II
'ICC
Min
V
3.0
0.55
2.7–3.6
r5.0
PA
2.7–3.6
r10
PA
0
10
PA
2.7–3.6
2.7–3.6
20
r20
750
PA
PA
Note 5: Outputs disabled or 3-STATE only.
3
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74VCX16838
Absolute Maximum Ratings(Note 2)
74VCX16838
DC Electrical Characteristics (2.3V d VCC d 2.7V)
Symbol
Parameter
VCC
Conditions
(V)
VIH
HIGH Level Input Voltage
2.3–2.7
VIL
LOW Level Input Voltage
2.3–2.7
VOH
HIGH Level Output Voltage
VOL
LOW Level Output Voltage
IOH
100 PA
IOH
IOH
Min
Max
1.6
Units
V
0.7
V
2.3–2.7
VCC 0.2
6 mA
2.3
2.0
12 mA
2.3
1.8
IOH
18 mA
2.3
1.7
IOL
100 PA
2.3–2.7
0.2
IOL
12 mA
2.3
0.4
IOL
18 mA
2.3
0.6
2.3–2.7
r5.0
PA
2.3–2.7
r10
PA
10
PA
II
Input Leakage Current
V0 d VI d 3.6V
IOZ
3-STATE Output Leakage
0V d VO d 3.6V
VI
VIH or VIL
IOFF
Power-OFF Leakage Current
0V d (VI, VO) d 3.6V
ICC
Quiescent Supply Current
VI
VCC or GND
VCC d (VI, VO) d 3.6V (Note 6)
0
V
20
2.3–2.7
r20
V
PA
Note 6: Outputs disabled or 3-STATE only.
DC Electrical Characteristics (1.65V d VCC 2.3V)
Symbol
Parameter
Conditions
VCC
(V)
VIH
HIGH Level Input Voltage
1.65 - 2.3
VIL
LOW Level Input Voltage
1.65 - 2.3
VOH
HIGH Level Output Voltage
VOL
LOW Level Output Voltage
IOH
100 PA
IOH
Max
0.65 u VCC
Units
V
0.35 u V CC
V
1.65 - 2.3
VCC 0.2
6 mA
1.65
1.25
IOL
100 PA
1.65 - 2.3
0.2
IOL
6 mA
1.65
0.3
1.65 - 2.3
r5.0
PA
1.65 - 2.3
r10
PA
0
10
PA
II
Input Leakage Current
0V d VI d 3.6V
IOZ
3-STATE Output Leakage
0V d VO d 3.6V
VI
V IH or VIL
IOFF
Power-OFF Leakage Current
0V d (VI, VO) d 3.6V
ICC
Quiescent Supply Current
VI
V CC or GND
VCC d (VI, VO) d 3.6V (Note 7)
Note 7: Outputs disabled or 3-STATE only.
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Min
4
1.65 - 2.3
V
20
r20
V
PA
TA
Symbol
Parameter
40qC to 85qC, CL
30 pF, RL
VCC
3.3V r 0.3V
VCC
2.5V r 0.2V
Min
Max
Min
Max
500:
VCC
1.8V r 0.15V
Min
fMAX
Maximum Clock Frequency
250
tPHL, tPLH
Propagation Delay In to On
(REGE 0)
0.8
2.5
1.0
3.5
1.5
7.0
ns
tPHL, tPLH
Propagation Delay CLK to On
(REGE 1)
0.8
3.0
1.0
4.0
1.5
8.0
ns
tPHL, tPLH
Propagation Delay REGE to On
0.8
3.0
1.0
4.0
1.5
8.0
ns
tPZL, tPZH
Output Enable Time
0.8
3.5
1.0
4.7
1.5
9.4
ns
tPLZ, tPHZ
Output Disable Time
0.8
3.5
1.0
3.9
1.5
7.0
ns
tS
Setup Time
1.0
1.0
2.5
tH
Hold Time
0.7
0.7
1.0
ns
tW
Pulse Width
1.5
1.5
4.0
ns
tOSHL
Output to Output Skew
tOSLH
(Note 9)
Note 8: For CL
200
Units
Max
100
0.5
MHz
ns
0.5
0.75
ns
50PF, add approximately 300 ps to the AC maximum specification.
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Extended AC Electrical Characteristics (Note 10)
0qC to 85qC, RL
TA
Symbol
CL
Parameter
0)
500: VCC
3.3V r 0.3V
Units
50 pF
Min
Max
1.0
2.8
ns
1.4
3.3
ns
tPHL, tPLH
Propagation Delay In to On (REGE
tPHL, tPLH
Propagation Delay CLK to On (REGE
tPHL, tPLH
Propagation Delay REGE to On
1.0
3.3
ns
tPZL, tPZH
Output Enable Time
1.0
3.8
ns
tPLZ, tPHZ
Output Disable Time
1.0
3.8
ns
tS
Setup Time
1.0
ns
tH
Hold Time
0.7
ns
1)
Note 10: This parameter is guaranteed by characterization but not tested.
Dynamic Switching Characteristics
Symbol
VOLP
VOLV
VOHV
Parameter
Quiet Output Dynamic Peak VOL
Quiet Output Dynamic Valley VOL
Quiet Output Dynamic Valley VOH
VCC
Conditions
CL
CL
CL
30 pF, VIH
30 pF, VIH
30 pF, VIH
VCC, VIL
VCC, VIL
VCC, VIL
0V
0V
0V
TA
25qC
(V)
Typical
1.8
0.25
2.5
0.6
3.3
0.8
1.8
0.25
2.5
0.6
3.3
0.8
1.8
1.5
2.5
1.9
3.3
2.2
Units
V
V
V
Capacitance
Symbol
Parameter
Conditions
CIN
Input Capacitance
VCC
1.8V, 2.5V or 3.3V, VI
COUT
Output Capacitance
VI
0V or VCC, VCC
CPD
Power Dissipation Capacitance
VI
0V or VCC, f
TA
25qC
Typical
Units
0V or VCC
6
pF
1.8V, 2.5V or 3.3V
7
pF
20
pF
10 MHz,
1.8V, 2.5V or 3.3V
VCC
5
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74VCX16838
AC Electrical Characteristics (Note 8)
74VCX16838
AC Loading and Waveforms
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC 3.3 r 0.3V;
VCC x 2 at VCC 2.5 r 0.2V; 1.8V r 0.15V
tPZH, tPHZ
GND
FIGURE 1. AC Test Circuit
FIGURE 2. Waveform for Inverting and Non-Inverting Functions
FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
FIGURE 4. Propagation Delay, Pulse Width and trec Waveforms
FIGURE 5. Setup Time, Hold Time and Recovery Time for Low Voltage Logic
Symbol
VCC
3.3V r 0.3V
2.5V r 0.2V
1.8V r 0.15V
Vmi
1.5V
VCC/2
VCC/2
Vmo
1.5V
VCC/2
VCC/2
VX
VOL 0.3V
VOL 0.15V
VOL 0.15V
VY
VOH 0.3V
VOH 0.15V
VOH 0.15V
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6
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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7
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74VCX16838 Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs
Physical Dimensions inches (millimeters) unless otherwise noted