74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer General Description Features The LVQ138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LVQ138 devices or a 1-of-32 decoder using four LVQ138 devices and one inverter. n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and dynamic threshold performance n Improved latch-up immunity n Guaranteed incident wave switching into 75Ω n 4 kV minimum ESD immunity n Demultiplexing capability n Multiple input enable for each expansion n Active LOW mutually exclusive outputs Ordering Code: Order Number Package Number Package Description 74LVQ138SC M16A 16-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC 74LVQ138SJ M16D 16-Lead Molded Small Outline Package, SOIC EIAJ Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram Pin Assignment for SOIC JEDEC and EIAJ DS011350-1 IEEE/IEC DS011350-2 Pin Descriptions Pin Names DS011350-4 © 1998 Fairchild Semiconductor Corporation DS011350 Description A0–A2 Address Inputs E1–E2 Enable Inputs E3 Enable Input O0–O7 Outputs www.fairchildsemi.com 74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer May 1998 Functional Description of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four LVQ138 devices and one inverter (see Figure 1). The LVQ138 can be used as an 8-output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes. The Enable inputs which are not used must be permanently tied to their appropriate active-HIGH or active-LOW state. The LVQ138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive active-LOW outputs (O0–O7). The LVQ138 features three Enable inputs, two active-LOW (E1, E2) and one active-HIGH (E3). All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion Truth Table Inputs Outputs E1 E2 E3 A0 A1 A2 O0 O1 O2 O3 O4 O5 O6 O7 H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Logic Diagram DS011350-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 FIGURE 1. Expansion to 1-of-32 Decoding DS011350-6 Logic Diagram 3 www.fairchildsemi.com Absolute Maximum Ratings (Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current (ICC or IGND) Storage Temperature (TSTG) DC Latch-Up Source or Sink Current Recommended Operating Conditions (Note 2) −0.5V to +7.0V Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (∆V/∆t) VIN from 0.8V to 2.0V VCC @ 3.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V 2.0V to 3.6V 0V to VCC 0V to VCC −40˚C to +85˚C 125 mV/ns Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. ± 50 mA ± 200 mA −65˚C to +150˚C Note 2: Unused inputs must be held HIGH or LOW. They may not float. ± 300 mA DC Electrical Characteristics Symbol Parameter VCC (V) TA = +25˚C Typ VIH Minimum High Level TA = −40˚C to +85˚C Units Guaranteed Limits 3.0 1.5 2.0 2.0 V VOUT = 0.1V 3.0 1.5 0.8 0.8 V VOUT = 0.1V 3.0 2.99 2.9 2.9 V IOUT = −50 µA 2.58 2.48 V VIN = VIL or VIH (Note 3) 0.1 0.1 V IOUT = 50 µA 3.0 0.36 0.44 V VIN = VIL or VIH (Note 3) 3.6 ± 0.1 ± 1.0 µA VI = VCC, GND VOLD = 0.8V Max (Note 5) Input Voltage VIL Maximum Low Level or VCC − 0.1V or VCC − 0.1V Input Voltage VOH Minimum High Level Output Voltage Conditions 3.0 IOH = −12 mA VOL Maximum Low Level Outut Voltage 3.0 0.002 IOL = 12 mA IIN Maximum Input Leakage Current IOLD Minimum Dynamic (Note 4) 3.6 36 mA IOH Output Current 3.6 −25 mA VOHD = 2.0V Min (Note 5) ICC Maximum Quiescent 3.6 4.0 40.0 µA VIN = VCC 3.3 0.8 V (Notes 6, 7) 3.3 −0.8 V (Notes 6, 7) Supply Current VOLP Quiet Output or GND Maximum Dynamic VOL VOLV Quiet Output Minimum Dynamic VOL VIHD Maximum High Level 3.3 1.7 2.0 V (Notes 6, 8) 3.3 1.7 0.8 V (Notes 6, 8) Dynamic Input Voltage VILD Maximum Low Level Dynamic Input Voltage Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed. Note 6: Worst case package. Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND. Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz. www.fairchildsemi.com 4 AC Electrical Characteristics Symbol tPLH tPLH Min Max 18.3 1.5 21.0 3.3 ± 0.3 1.5 8.5 13.0 1.5 15.0 2.7 1.5 9.6 17.6 1.5 20.0 3.3 ± 0.3 1.5 8.0 12.5 1.5 14.0 2.7 1.5 13.2 21.0 1.5 23.0 3.3 ± 0.3 1.5 11.0 15.0 1.5 16.0 2.7 1.5 11.4 19.0 1.5 21.0 3.3 ± 0.3 1.5 9.5 13.5 1.5 15.0 Propagation Delay E3 to On tPHL Max 10.2 Propagation Delay E1 or E2 to On tPLH Typ 1.5 Propagation Delay E1 or E2 to On tPHL Min Propagation Delay An to On 2.7 1.5 13.2 21.8 1.5 23.5 3.3 ± 0.3 1.5 11.0 15.5 1.5 16.5 2.7 1.5 10.2 18.3 1.5 20.0 3.3 ± 0.3 1.5 8.5 13.0 1.5 14.0 Propagation Delay E3 to On tOSHL, Output to Output Skew (Note 9) tOSLH Data to Output TA = −40˚C to +85˚C CL = 50 pF 2.7 Propagation Delay An to On tPHL TA = +25˚C CL = 50 pF VCC (V) Parameter 2.7 1.0 1.5 1.5 3.3 ± 0.3 1.0 1.5 1.5 Units ns ns ns ns ns ns ns Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design. Capacitance Symbol CIN CPD (Note 10) Typ Units Input Capacitance Parameter 4.5 pF VCC = Open Conditions Power Dissipation 45 pF VCC = 3.3V Capacitance Note 10: CPD is measured at 10 MHz. 5 www.fairchildsemi.com 6 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead (0.150" Wide) Small Outline Integrated Circuit Package Number M16A 7 www.fairchildsemi.com 74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Molded Small Outline Package Package Number M16D LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and (c) whose device or system, or to affect its safety or effectiveness. failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. Fairchild Semiconductor Corporation Americas Customer Response Center Tel: 1-888-522-5372 Fax: 972-910-8036 Fairchild Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: [email protected] Deutsch Tel: +49 (0) 8 141-35-0 English Tel: +44 (0) 1 793-85-68-56 Italy Tel: +39 (0) 2 57 5631 Fairchild Semiconductor Hong Kong Ltd. 8/F Room 808 Empire Centre 68 Mody Road, Tsimshatsui East Kowloon, Hong Kong Tel: 852-2722-8338 Fax: 852-2722-8383 Fairchild Semiconductor Japan Ltd. 4F, Natsume BI, 2-18-6 Yushima, Bunkyo-ku, Tokyo 113-0034, Japan Tel: 81-3-3818-8840 Fax: 81-3-3818-8450 www.fairchildsemi.com Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.