MIC5841/5842 Micrel MIC5841/5842 8-Bit Serial-Input Latched Drivers General Description Features Using BiCMOS technology, the MIC5841/5842 integrated circuits were fabricated to be used in a wide variety of peripheral power driver applications. The devices each have an eight-bit CMOS shift register, CMOS control circuitry, eight CMOS data latches, and eight bipolar current-sink Darlington output drivers. • • • • • • • These two devices differ only in maximum voltage ratings. The MIC5842 offers premium performance with a minimum output breakdown voltage rating of 80V (50V sustaining). The drivers can be operated with a split supply where the negative supply is down to –20V. 3.3 MHz Minimum Data-Input Rate CMOS, PMOS, NMOS, TTL Compatible Internal Pull-Up/Pull-Down Resistors Low-Power CMOS Logic and Latches High-Voltage Current-Sink Outputs Output Transient-Protection Diodes Single or Split Supply Operation Ordering Information The 500 mA outputs, with integral transient-suppression diodes, are suitable for use with lamps, relays, solenoids and other inductive loads. These devices have improved speed characteristics. With a 5V logic supply, they will typically operate faster than 5 MHz. With a 12V supply, significantly higher speeds are obtained. The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS logic levels. TTL or DTL circuits may require the use of appropriate pull-up resistors. By using the serial data output, the drivers can be cascaded for interface applications requiring additional drive lines. Part Number Temperature Range Package MIC5841BN –40°C to +85°C 18-Pin Plastic DIP MIC5841BV –40°C to +85°C 20-Pin PLCC MIC5841BWM –40°C to +85°C 18-Pin Wide SOIC MIC5842BN –40°C to +85°C 18-Pin Plastic DIP MIC5842BV –40°C to +85°C 20-Pin PLCC MIC5842BWM –40°C to +85°C 18-Pin Wide SOIC The MIC5840 family is available in DIP, PLCC, and SOIC packages. Because of limitations on package power dissipation, the simultaneous operation of all drivers at maximum rated current might require a reduction in duty cycle. A copper-alloy lead frame provides for maximum package power dissipation. Functional Diagram 6 8-BIT SERIAL-PARALLEL SHIFT REGISTER 4 VEE MOS Bipolar 2 C SERIAL DATA IN 3 7 8 18 OUT1 17 OUT2 16 OUT3 15 OUT4 14 OUT5 13 OUT6 VDD STROBE LATCHES 1 SUB CLOCK 3 5 VSS SERIAL DATA OUT OUTPUT ENABLE (ACTIVE LOW) VSS 4 VSS VDD 5 VDD SERIAL DATA OUT 6 LATCHES SERIAL DATA IN 1 SHIFT REGISTER CLK Pin Configuration STROBE 7 ST 12 OUT7 OUTPUT ENABLE 8 OE 11 OUT8 9 10 K Sub 9 1 VEE VEE SUB 10 K 18 OUT1 17 16 15 14 13 12 11 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 (DIP, SOIC) 7-42 October 1998 MIC5841/5842 VEE OUT 1 OUT 2 (20-Pin PLCC)Top View. CLOCK Pin Configuration SERIAL DATA IN Micrel 3 2 1 20 19 Absolute Maximum Ratings (Note 1, 2, 3) at 25°C Free-Air Temperature and VSS = 0V NC 4 18 OUT 3 VSS 5 17 OUT 4 VDD 6 16 OUT 5 SERIAL DATA OUT 7 15 OUT 6 NC 8 14 OUT 7 9 10 11 12 13 STROBE OUTPUT EN VEE K OUT 8 MIC5842BV Output Voltage, VCE (MIC5841) 50V (MIC5842) 80V Output Voltage, VCE(SUS) (MIC5841) (Note 1) 35V (MIC5842) 50V Logic Supply Voltage, VDD 15V VDD with Reference to VEE 25V Emitter Supply Voltage, VEE –20V Input Voltage Range, VIN –0.3V to VDD + 0.3V Continuous Output Current, IOUT 500mA Package Power Dissipation, PD (Note 2) 1.82W Operating Temperature Range, TA –55°C to +85°C Storage Temperature Range, TS –65°C to +150°C Note 1: For Inductive load applications. Note 2: Derate at the rate of 18.2mW/°C above TA = 25°C (Plastic DIP) Note 3: CMOS devices have input-static protection but are susceptible to damage when exposed to extremely high static electrical charges. Electrical Characteristics at TA = 25°C VDD = 5V, VSS = VEE = 0V (unless otherwise noted) Applicable Characteristic Output Leakage Current Devices Test Conditions ICEX MIC5841 MIC5842 Collector-Emitter VCE(SAT) Both Saturation Voltage Collector-Emitter Sustaining Voltage Input Voltage Input Resistance Supply Current Max. Unit VOUT = 50V 50 µA VOUT = 50V, TA = +70°C 100 VOUT = 80V 50 VOUT = 80V, TA = +70°C 100 IOUT = 100mA 1.1 IOUT = 200mA 1.3 IOUT = 350mA, VDD = 7.0V 1.6 MIC5841 IOUT = 350mA, L = 2mH 35 (Note 5) MIC5842 IOUT = 350mA, L = 2mH 50 VIN(0) Both VIN(1) Both RIN IDD(ON) IR Leakage Current Clamp Diode Forward Voltage Min. VCE(SUS) IDD(OFF) Clamp Diode Limits Symbol VF Both Both Both V 0.8 VDD = 12V VDD = 10V 8.5 VDD = 5.0V (See Note 4) 3.5 VDD = 12V 50 VDD = 10V 50 VDD = 5.0V 50 kΩ All Drivers ON, VDD = 12V 16 All Drivers ON, VDD = 10V 14 All Drivers ON, VDD = 5.0V 8.0 All Drivers OFF, VDD = 12V 2.9 All Drivers OFF, VDD = 10V 2.5 All Drivers OFF, VDD = 5.0V 1.6 VR = 50V 50 MIC5842 VR = 80V 50 IF = 350mA 2.0 Note 4: Operation of these devices with standard TTL may require the use of appropriate pull-up resistors to insure an input logic HIGH. Note 5: Not 100% tested. Guaranteed by design. October 1998 7-43 V 10.5 MIC5841 Both V mA µA V 7 MIC5841/5842 Micrel Electrical Characteristics TA = –55°C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted) Limits Characteristic Output Leakage Current Collector-Emitter Symbol Test Conditions ICEX VCE(SAT) Saturation Voltage Input Voltage Supply Current Max. Unit VOUT = 80V 50 µA IOUT = 100mA 1.3 V IOUT = 200mA 1.5 IOUT = 350mA, VDD = 7.0V 1.8 VIN(0) 0.8 VIN(1) Input Resistance Min. RIN IDD(ON) IDD(OFF) VDD = 12V 10.5 VDD = 5.0V 3.5 VDD = 12V 35 VDD = 10V 35 VDD = 5.0V 35 V kΩ All Drivers ON, VDD = 12V 16 All Drivers ON, VDD = 10V 14 All Drivers ON, VDD = 5.0V 10 All Drivers OFF, VDD = 12V 3.5 All Drivers OFF, VDD = 5.0V 2.0 mA Electrical Characteristics TA = +125°C, VDD = 5V, VSS = VEE = 0V (unless otherwise noted) Limits Characteristic Output Leakage Current Collector-Emitter Symbol Test Conditions ICEX VCE(SAT) Saturation Voltage Input Voltage Supply Current Current Unit VOUT = 80V 500 µA IOUT = 100mA 1.3 V IOUT = 200mA 1.5 IOUT = 350mA, VDD = 7.0V 1.8 0.8 RIN IDD(ON) IDD(OFF) Clamp Diode Leakage Max. VIN(0) VIN(1) Input Resistance Min. IR VDD = 12V 10.5 VDD = 5.0V 3.5 VDD = 12V 50 VDD = 10V 50 VDD = 5.0V 50 kΩ All Drivers ON, VDD = 12V 16 All Drivers ON, VDD = 10V 14 All Drivers ON, VDD = 5.0V 8 All Drivers OFF, VDD = 12V 2.9 All Drivers OFF, VDD = 5.0V 1.6 MIC5841A VR = 50V 100 MIC5842A VR = 80V 100 7-44 V mA µA October 1998 MIC5841/5842 Micrel CLOCK A D B DATA IN E STROBE F C OUTPUT ENABLE G OUT N Timing Conditions (TA = 25°C Logic Levels are VDD and VSS) A. B. C. D. E. F. G. VDD = 5V Minimum Data Active Time Before Clock Pulse (Data Set-Up Time) ........................................................................ 75 ns Minimum Data Active Time After Clock Pulse (Data Hold Time) .............................................................................. 75 ns Minimum Data Pulse Width ..................................................................................................................................... 150 ns Minimum Clock Pulse Width .................................................................................................................................... 150 ns Minimum Time Between Clock Activation and Strobe ............................................................................................. 300 ns Minimum Strobe Pulse Width ................................................................................................................................... 100 ns Typical Time Between Strobe Activation and Output Transition ............................................................................. 500 ns SERIAL DATA present at the input is transferred to the shift register on the logic “0” to logic “1” transition of the CLOCK input pulse. On succeeding CLOCK pulses, the registers shift data information towards the SERIAL DATA OUTPUT. The SERIAL DATA must appear at the input prior to the rising edge of the CLOCK input waveform. Information present at any register is transferred to its respective latch when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed (STROBE tied high) will require that the ENABLE input be high during serial data entry. When the ENABLE input is high, all of the output buffers are disabled (OFF) without affecting information stored in the latches or shift register. With the ENABLE input low, the outputs are controlled by the state of the latches. MIC5840 Family Truth Table Serial Data Input Shift Register Contents Clock Input I1 I2 I3 H R1 R2 …… R7 R7 L L R1 R2 …… R7 R7 X R1 R2 R3 …… R8 R8 X X X X X P1 P2 P3 …… P8 P8 H …… …… I8 Serial Data Strobe Output Input I2 I3 I3 L R1 R2 R3 …… R8 H P1 P2 P3 …… P8 L P1 P2 P3 …… P8 X X X H H H H …… I8 I1 I2 7-45 …… Output Contents Output Enable I1 L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State October 1998 Latch Contents X …… …… I8 H 7 MIC5841/5842 Micrel Typical Output Driver K OUT N 7.2K 3K VEE SUB Typical Input Circuits V DD V DD CLOCK SERIAL DATA IN STROBE OUTPUT ENABLE V SS V SS Maximum Allowable Duty Cycle (Plastic DIP) VDD = 5.0V Number of Outputs ON (IOUT = 200mA Max. Allowable Duty Cycle at Ambient Temperature of VDD = 5.0V) 25°C 40°C 50°C 60°C 70°C 8 85% 72% 64% 55% 46% 7 97% 82% 73% 63% 53% 6 100% 96% 85% 73% 62% 5 100% 100% 100% 88% 75% 4 100% 100% 100% 100% 93% 3 100% 100% 100% 100% 100% 2 100% 100% 100% 100% 100% 1 100% 100% 100% 100% 100% VDD = 12V Number of Outputs ON (IOUT = 200mA Max. Allowable Duty Cycle at Ambient Temperature of VDD = 12V) 25°C 40°C 50°C 60°C 70°C 8 80% 68% 60% 52% 44% 7 91% 77% 68% 59% 50% 6 100% 90% 79% 69% 58% 5 100% 100% 95% 82% 69% 4 100% 100% 100% 100% 86% 3 100% 100% 100% 100% 100% 2 100% 100% 100% 100% 100% 1 100% 100% 100% 100% 100% 7-46 October 1998 MIC5841/5842 Micrel Typical Applications Relay/Solenoid Driver MIC5842 MIC5841 Hammer Driver +5V +28V µ 22µ +5V -15V 1 18 1 5 V DD DATA OUT 6 STROBE OUTPUT ENABLE (ACTIVE LOW) 17 CLOCK 2 17 16 SERIAL DATA IN 3 16 15 4 VSS 14 5 V DD 13 6 7 ST 12 8 OE 9 LATCHES 4 VSS LATCHES 3 SHIFT REGISTER DATA IN C SHIFT REGISTER 2 18 SUB SUB CLOCK + +30V 15 14 13 7 ST 12 11 8 OE 11 10 9 10 µ 0.1µ SUB 28V SUB –15V MIC5841 Solenoid Driver with Output Enable MIC5841 Level Shifting Lamp Driver with Darlington Emitters Tied to a Negative Supply SERIAL DATA CLOCK +5V -9V +12V µ 22µ + 18 1 18 1 SUB SUB 17 SERIAL DATA IN 3 16 3 16 ENABLE 4 VSS µ 0.1µ 5 V DD 6 4 VSS 15 +5V 14 5 VDD 13 6 15 14 13 7 ST 12 11 8 OE 11 10 9 10 7 ST 12 8 OE 9 0.1µ SUB SUB Solenoids: Guardian Electric LT4X7-C-12V October 1998 LATCHES 2 C SHIFT REGISTER 17 LATCHES 2 SHIFT REGISTER CLOCK + 100µ 7-47 7 MIC5841/5842 Micrel Typical Applications, Continued MIC5842 Negative/Positive Supply PIN Diode Driver Transmit/Receive Switch CLOCK +75V DATA IN 10k STROBE 15 1 18 SUB 3 16 0.01µ 5 VDD 6 LATCHES 17 SHIFT REGISTER 2 C 4 VSS +5V Transmitter RFC 1000p 7 ST D1 Antenna +75V 15 10k 25 D2 14 RFC 1000p 13 RFC +75V 12 10k 25 8 OE 11 Receiver 1000p 100µ 10 9 0.01µ + –5V SUB D1 (Latch 1) Receive OFF Transmit ACTIVE RFC D3 +75V 0.01µ Diode D2 (Latch 5) ACTIVE OFF 7-48 D3 (Latch 8) OFF ACTIVE PIN Diodes: UM9651 October 1998