MIC5891 Micrel, Inc. MIC5891 8-Bit Serial-Input Latched Source Driver General Description Features The MIC5891 latched driver is a high-voltage, high current integrated circuit comprised of eight CMOS data latches, CMOS control circuitry for the common STROBE and OUTPUT ENABLE, and bipolar Darlington transistor drivers for each latch. • • • • • Bipolar/MOS construction provides extremely low power latches with maximum interface flexibility. High-voltage, high-current outputs Output transient protection diodes CMOS-, PMOS-, NMOS-, and TTL-compatible inputs 5MHz typical data input rate Low-power CMOS latches Applications The MIC5891 will typically operate at 5MHz with a 5V logic supply. • • • • The CMOS inputs are compatible with standard CMOS, PMOS, and NMOS logic levels. TTL circuits may be used with appropriate pull-up resistors to ensure a proper logichigh input. Alphanumeric and bar graph displays LED and incandescent displays Relay and solenoid drivers Other high-power loads A CMOS serial data output allows additional drivers to be cascaded when more than 8 bits are required. The MIC5891 has open-emitter outputs with suppression diodes for protection against inductive load transients. The output transistors are capable of sourcing 500mA and will sustain at least 35V in the on-state. Simultaneous operation of all drivers at maximum rated current requires a reduction in duty cycle due to package power limitations. Outputs may be paralleled for higher load current capability. The MIC5891 is available in a 16-pin plastic DIP package (N) and 16-pin wide SOIC package (WM). Functional Diagram CLOCK SERIAL DATA IN 8-BIT SERIAL PARALLEL SHIFT REGISTER STROBE LATCHES GROUND SERIAL DATA OUT OUTPUT ENABLE MOS BIPOLAR OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com May 2006 1 MIC5891 MIC5891 Micrel, Inc. Ordering Information Part Number Temperature Range Package MIC5891YN –40ºC to +85ºC 16-Pin Plastic DIP MIC5891YWM –40ºC to +85ºC 16-Pin Wide SOIC Standard Pb-Free MIC5891BN MIC5891BWM Pin Configuration Typical Circuits GROUND 1 16 SERIAL DATA OUT SHIFT VDD 15 LOGIC SUPPLY REGISTER CLOCK 2 SERIAL DATA IN 3 STROBE 4 OUT1 5 12 OUT8 OUT2 6 11 OUT7 OUT3 7 10 OUT6 OUT4 8 LATCHES OUTPUT ENABLE OE 14 VBB 13 LOAD SUPPLY 9 OUT5 V BB V DD IN V OUT Typical Input Circuit PACKAGE POWER DISSIPATION (W) Typical Output Circuit 2.5 2 1.5 PDIP θJA = 60°C/W 1 0.5 MIC5891 Allowable Package Power Dissipation vs. Temp. CerDIP θJA = 90°C/W 0 25 50 75 100 125 150 AMBIENT TEMPERATURE (°C) 2 May 2006 MIC5891 Micrel, Inc. Allowable Duty Cycles Absolute Maximum Ratings (Notes 1, 2, 3) Output Voltage (VOUT) .................................................50V Logic Supply Voltage Range (VDD) ................ 4.5V to 15V Load Supply Voltage Range (VBB) ................. 5.0V to 50V Input Voltage Range (VIN) ................................... –0.3V to VDD+0.3V Continuous Collector Current (IC) .......................... 500mA Package Power Dissipation .............................. see graph Operating Temperature Range (TA) ....... –55°C to +125°C Storage Temperature Range (TS) .......... –65°C to +150°C Note 1: TA = 25°C Note 2: Derate at the rate of 20mW/°C above TA = 25°C. Note 3: Micrel CMOS devices have input-static protection but are susceptible to damage when exposed to extremely high static electrical charges. Number of Outputs ON at IOUT = –200 mA Max. Allowable Duty Cycles at TA of: 50°C 60°C 70°C 8 53% 47% 41% 7 60% 54% 48% 6 70% 64% 56% 5 83% 75% 67% 4 100% 94% 84% 3 100% 100% 100% 2 100% 100% 100% 1 100% 100% 100% Electrical Characteristics VBB = 50V, VDD = 5V to 12V; TA = +25°C; unless noted. Limits Characteristic Symbol VBB Test Conditions Max. Units Output Leakage Current ICEX 50V TA = +25°C –50 µA TA = +85°C –100 µA IOUT = –100mA, TA = +85°C 1.8 V IOUT = –225mA, TA = +85°C 1.9 V IOUT = –350mA, TA = +85°C 2.0 V Output Saturation Voltage VCE(SAT) 50V Min. Output Sustaining Voltage VCE(SUS) 50V IOUT = –350mA, L = 2mH 35 Input Voltage VIN(1) 50V VDD = 5.0V 3.5 VDD+0.3 V 10.5 VDD+0.3 V VIN(0) 50V VDD = 5V to 12V VSS–0.3 0.8 V Input Current IIN(1) 50V VDD = VIN = 5.0V 50 µA Input Impedance ZIN 50V VDD = 5.0V 100 kΩ VDD = 12V 50 kΩ 3.3 MHz VDD = 12V VDD = 12V Maximum Clock Frequency fc 50V Serial Data Output Resistance ROUT 50V V 240 µA VDD = 5.0V 20 kΩ VDD = 12V 6.0 kΩ Turn-On Delay tPLH 50V Output Enable to Output, IOUT = –350mA 2.0 µs Turnoff Delay tPHL 50V Output Enable to Output, IOUT = –350mA 10 µs Supply Current IBB 50V IDD 50V Diode Leakage Current IH Max Diode Forward Voltage VF Open all outputs on, all outputs open 10 mA all outputs off 200 µA VDD = 5V, all outputs off, inputs = 0V 100 µA VDD = 12V, all outputs off, inputs = 0V 200 µA VDD = 5V, one output on, all inputs = 0V 1.0 mA VDD = 12V, one output on, all inputs = 0V 3.0 mA TA = +25°C 50 µA TA = +85°C 100 µA IF = 350mA 2.0 V Note 4: Positive (negative) current is defined as going into (coming out of) the specified device pin. Note 5: Operation of these devices with standard TTL may require the use of appropriate pull-up resistors. May 2006 3 MIC5891 MIC5891 Micrel, Inc. Timing Conditions A. B. C. D. E. F. G. H. I. (VDD = 5.0V, Logic Levels are VDD and Ground) Minimum data active time before clock pulse (data set-up time).........................................................................75ns Minimum data active time after clock pulse (data hold time) ...............................................................................75ns Minimum data pulse width .................................................................................................................................150ns Minimum clock pulse width ................................................................................................................................150ns Minimum time between clock activation and strobe ..........................................................................................300ns Minimum strobe pulse width ..............................................................................................................................100ns Typical time between strobe activation and output transition .............................................................................1.0µs Turnoff delay ................................................................................................................. see Electrical Characteristics Turn-on delay................................................................................................................ see Electrical Characteristics CLOCK A B D DATA IN E F C STROBE OUTPUT ENABLE G OUT N H I Timing Conditions MIC5891 4 May 2006 MIC5891 Micrel, Inc. Truth Table Serial Data Input Clock Input Shift Register Contents Serial Data Strobe Output Input Latch Contents Output Enable Output Content I1 I2 H R1 R2 … RN-2 RN-1 RN-1 L L R1 R2 … RN-2 RN-1 RN-1 X R1 R2 R3 … RN-1 RN RN X X X … X X L R1 R2 R3 … RN-1 RN P1 P2 P3 … PN-1 PN PN H P1 P2 P3 … PN-1 PN L P1 P2 P3 … PN-1 PN X X X … H L H I3 … IN-1 X IN I1 I2 I3 … IN-1 X In X I1 I2 L I3 … IN-1 In L … L L L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State Applications Information Serial data present at the input is transferred into the shift register on the rising edge of the CLOCK input pulse. Additional CLOCK pulses shift data information towards the SERIAL DATA OUTPUT. The serial data must appear at the input prior to the rising edge of the CLOCK input waveform. long as the STROBE is held high. Most applications where the latching feature is not used (STROBE tied high) require the OUTPUT ENABLE input to be high during serial data entry. Outputs are active (controlled by the latch state) when the OUTPUT ENABLE is low. All Outputs are low (disabled) when the OUTPUT ENABLE is high. OUTPUT ENABLE does not affect the data in the shift register or latch. The 8 bits present in the shift register are transferred to the respective latches when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as May 2006 5 MIC5891 MIC5891 Micrel, Inc. Package Information 0.780 MAX (19.812) LEAD #1 0.030-0.1 10 RAD (0.762-2.794) .250±0.005 (6.350±0.127) 0.025±0.015 (0.635±0.381) 0.040 TYP (1.016) 0.130±0.005 (3.302±0.127) 0.290-0.320 (7.336-8.128) 0.020 (0.508) 0°-10° 0.020 MIN (0.508) 0.009-0.015 (0.229-0.381) 0.018±0.003 (0.457±0.076) 0.100±0.010 (2.540±0.254) 0.125 MIN (3.175) +0.025 –0.015 +0.635 8.255 –0.381 0.325 ( ) 16-Pin Plastic DIP (N) 16-Pin Wide SOIC (WM) MIC5891 6 May 2006 MIC5891 Micrel, Inc. MICREL INC. TEL 2180 FORTUNE DRIVE + 1 (408) 944-0800 FAX SAN JOSE, CA 95131 + 1 (408) 474-1000 WEB USA http://www.micrel.com This information furnished by Micrel in this data sheet is believed to be accurate and reliable. However no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 1997 Micrel, Inc. May 2006 7 MIC5891