MICREL SY100EP14UK4ITR

2.5V/3.3V/5V 1:5 LVPECL/PECL/
ECL/HSTL 2GHz CLOCK DRIVER
WITH 2:1 DIFFERENTIAL INPUT MUX
Micrel
Precision Edge™
PrecisionSY100EP14U
Edge™
SY100EP14U
FEATURES
■ Guaranteed AC parameters over temp/voltage:
• > 2GHz fMAX
• < 25ps within-device skew
• < 275ps tr/tf time
• < 525ps prop delay
■ 2:1 Differential Mux input
■ Flexible supply voltage: 2.5V/3.3V/5V
■ Wide operating temperature range: –40°C to +85°C
■ VBB reference for single-ended or AC-coupled
PECL inputs
■ 100K ECL compatible outputs
■ Inputs accept PECL/LVPECL/ECL/HSTL logic
■ 75kΩ
Ω internal input pull-down resistors
■ Available in a 20-Pin TSSOP package
ECL Pro™
DESCRIPTION
The SY100EP14U is a high-speed, 2GHz differential
PECL/ECL 1:5 fanout buffer optimized for ultra-low skew
applications. Within device skew is guaranteed to be less
than 25ps over temperature and supply voltage. The wide
supply voltage operation allows this fanout buffer to operate
in 2.5V, 3.3V, and 5V systems. A VBB reference is included
for single-supply or AC-coupled PECL/ECL input
applications, thus eliminating resistor networks. When
interfacing to a single-ended or AC-coupled PECL/ECL input
signal, connect the VBB pin to the unused /CLK pin, and
bypass the pin to VCC through a 0.01µF capacitor.
The SY100EP14U features a 2:1 input MUX, making it
an ideal solution for redundant clock switchover applications.
If only one input pair is used, the other pair may be left
floating. In addition, this device includes a synchronous
enable pin that forces the outputs into a fixed logic state.
Enable or disable state is initiated only after the outputs are
in a LOW state, thus eliminating the possibility of a “runt”
clock pulse.
The SY100EP14U I/O are fully differential and 100K ECL
compatible. Differential 10K ECL logic can interface directly
into the SY100EP14U inputs.
The SY100EP14U is part of Micrel’s high-speed clock
synchronization family. For applications that require a
different I/O combination, consult the Micrel website at
www.micrel.com, and choose from a comprehensive product
line of high-speed, low-skew fanout buffers, translators, and
clock generators.
PIN CONFIGURATION/BLOCK DIAGRAM
/CLK1
VBB
CLK0
VCC /EN VCC
CLK1
/CLK0
SEL VEE
20 19 18 17 16 15 14 13 12 11
D
Q
1
Q0
2
/Q0
1
3
Q1
4
/Q1
5
Q2
0
6
/Q2
7
Q3
8
/Q3
9
Q4
10
/Q4
TSSOP
TOP VIEW
Precision Edge and ECL Pro are trademarks of Micrel, Inc.
1
Rev.: D
Amendment: /0
Issue Date:
July 2003
Precision Edge™
SY100EP14U
Micrel
PIN DESCRIPTION
Pin
Function
CLK0, /CLK0
CLK1, /CLK1
PECL, LVPECL, ECL, LVECL, HSTL Clock or Data Inputs.
Internal 75kΩ pull-down resistors on CLK0, CLK1, and internal 75kΩ pull-up and 75kΩ pull-down resistors or
/CLK0, /CLK1. For single-ended applications, connect signal into CLK0 and/or CLK1 inputs. /CLK0, /CLK1
default condition is VCC/2 when left floating. CLK0, CLK1 default condition is LOW when left floating.
Q0 to Q4
/Q0 to /Q4
LVPECL, PECL, ECL Differential Outputs: Terminate with 50Ω to VCC–2V. For single-ended applications,
terminate the unused output with 50Ω to VCC–2V
/EN
LVPECL, PECL, ECL compatible synchronous enable: When /EN goes HIGH, the QOUT will go LOW and
/QOUT will go HIGH on the next LOW input clock transition. Includes a 75kΩ pull-down. Default state is LOW
when left floating. The internal latch is clocked on the falling edge of the input clock (CLK0, CLK1)
SEL
LVPECL, PECL, ECL compatible 2:1 Mux input signal select: When SEL is LOW, CLK0 input pair is selected.
When SEL is HIGH, CLK1 input pair is selected. Includes a 75kΩ pull-down. Default state is LOW and
CLK0 is selected.
VBB
Output Reference Voltage: Equal to VCC–1.7V (approx.), and used for single-ended input signals or
AC-coupled applications. For single-ended PECL, LVPECL applications, bypass with a 0.01µF to VCC.
For single-ended LVTTL inputs, bypass to GND. Max. sink/source current is 0.5mA.
VCC
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors.
VEE
Negative Power Supply: LVPECL, PECL applications, connect to GND.
TRUTH TABLE(1)
FUNCTION TABLE
CLK0
CLK1
CLK_SEL
/EN
Q
CLK_SEL
Active Input
L
X
L
L
L
0
CLK0, /CLK0
H
X
L
L
H
1
CLK1, /CLK1
X
L
H
L
L
X
H
H
L
H
X
X
X
H
L*
Note 1.
On next negative transition of CLK0 or CLK1.
2
Precision Edge™
SY100EP14U
Micrel
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Value
Unit
6.0
V
–6.0 to 0
+6.0 to 0
V
50
100
mA
±0.5
mA
VCC – VEE
Power Supply Voltage
VIN
Input Voltage (VCC = 0V, VIN not more negative than VEE)
Input Voltage (VEE = 0V, VIN not more positive than VCC)
IOUT
Output Current
IBB
VBB Sink/Source Current(2)
TA
Operating Temperature Range
–40 to +85
°C
Tstore
Storage Temperature Range
–65 to +150
°C
ESD
Mil Std. 883 Human Body Model, All Pins
>1.5k
V
θJA
Package Thermal Resistance
(Junction-to-Ambient)
115
75
65
°C/W
θJC
Package Thermal Resistance
(Junction-to-Case)
21
°C/W
–Continuous
–Surge
–Still-Air (single-layer PCB)
–Still-Air (multi-layer PCB)
–500lfpm (multi-layer PCB)
Note 1.
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation
is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM
RATlNG conditions for extended periods may affect device reliability.
Note 2.
Due to the limited drive capability, use for inputs of same package only.
DC ELECTRICAL CHARACTERISTICS(1)
TA = –40°C
Symbol
VCC
TA = +25°C
TA = +85°C
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Power Supply Voltage
(PECL)
(LVPECL)
(ECL)
(LVECL)
4.5
2.37
–4.5
–3.8
5.0
3.3
–5.0
–3.3
5.5
3.8
–5.5
–2.37
4.5
2.37
–4.5
–3.8
5.0
3.3
–5.0
–3.3
5.5
3.8
–5.5
–2.37
4.5
2.37
–4.5
–3.8
5.0
3.3
–5.0
–3.3
5.5
3.8
–5.5
–2.37
Unit
Condition
V
ICC
Power Supply Current
—
—
75
—
68
78
—
—
82
mA
IIH
Input HIGH Current
—
—
150
—
—
150
—
—
150
µA
VIN = VIH
IIL
Input LOW Current
0.5
–150
—
—
—
—
0.5
–150
—
—
—
—
0.5
–150
—
—
—
—
µA
µA
VIN = VIL
VIN = VIL
CIN
Input Capacitance (TSSOP)
—
—
—
—
0.75
—
—
—
—
pF
Note 1.
D
/D
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
3
Precision Edge™
SY100EP14U
Micrel
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 2.5V ±5%, VEE = 0V
TA = –40°C
Symbol
TA = +85°C
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
VIL
Voltage(2)
Input LOW
(Single-ended)
555
—
875
555
—
875
555
—
875
mV
VIH
Input HIGH Voltage(2)
(Single-ended)
1335
—
1620
1335
—
1620
1335
—
1620
mV
VOL
Output LOW Voltage
555
680
805
555
680
805
555
680
805
mV
50Ω to VCC–2V
VOH
Output HIGH Voltage
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
50Ω to VCC–2V
VIHCMR
Input HIGH Voltage
Common Mode Range(3)
1.2
—
VCC
1.2
—
VCC
1.2
—
VCC
V
Note 1.
Parameter
TA = +25°C
Condition
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output varies
1:1 with VCC.
Note 2.
VBB reference is not functional for VCC < 3.0V. External VBB equivalent is required.
Note 3.
VIHCMR (min) varies 1:1 with VEE, VIHCMR (Max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
(100KEP) LVPECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 3.3V ±10%; VEE = 0V
TA = –40°C
Symbol
Parameter
TA = +25°C
TA = +85°C
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
VIL
Input LOW Voltage
(Single-Ended)
1355
—
1675
1355
—
1675
1355
—
1675
mV
VIH
Input HIGH Voltage
(Single-Ended)
2075
—
2420
2075
—
2420
2075
—
2420
mV
VOL
Output LOW Voltage
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
50Ω to VCC–2V
VOH
Output HIGH Voltage
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
50Ω to VCC–2V
VBB
Reference Voltage(2)
1775
1875
1975
1775
1875
1975
1775
1875
1975
mV
VCC = 3.3V
VIHCMR
Input HIGH Voltage
Common Mode Range(3)
1.2
—
VCC
1.2
—
VCC
1.2
—
VCC
V
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output varies
1:1 with VCC.
Note 2.
Single-ended input operation is limited VCC ≥ 3.0V in LVPECL mode. VBB reference varies 1:1 with VCC.
Note 3.
VIHCMR (min) varies 1:1 with VEE, VIHCMR (Max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
4
Precision Edge™
SY100EP14U
Micrel
(100KEP) PECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 5.0V ±10%, VEE = 0V
TA = –40°C
Symbol
TA = +25°C
TA = +85°C
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
Condition
VIL
Input LOW Voltage
(Single-Ended)
3055
—
3375
3055
—
3375
3055
—
3375
mV
VIH
Input HIGH Voltage
(Single-Ended)
3775
—
4120
3775
—
4120
3775
—
4120
mV
VOL
Output LOW Voltage
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
50Ω to VCC–2V
VOH
Output HIGH Voltage
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
50Ω to VCC–2V
VBB
Output Voltage Reference(2)
3475
3575
3675
3475
3575
3675
3475
3575
3675
mV VCC = +5.0V
VIHCMR
Input HIGH Voltage(3)
Common Mode Range
2.0
—
VCC
2.0
—
VCC
2.0
—
VCC
V
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output
parameters are at VCC = 5.0V. They vary 1:1 with VCC.
Note 2.
VBB reference varies 1:1 with VCC.
Note 3.
The VIHCMR range is referenced to the most positive side of the differential input signal. Single-ended input CLK pin operation is limited to VCC
≥ 3.0V in PECL mode.
(100KEP) LVECL DC ELECTRICAL CHARACTERISTICS(1)
VEE = –2.37V to –3.8V; VCC = 0V
TA = –40°C
Symbol
Parameter
TA = +25°C
Min.
Typ.
Typ.
Max.
Unit
VIL
Input LOW Voltage
(Single-ended)
–1945
—
–1625 –1945
—
–1625 –1945
—
–1625
mV
VIH
Input HIGH Voltage
(Single-ended)
–1165
—
–880
—
–880
—
–880
mV
VOL
Output LOW Voltage
–1945 –1820 –1695 –1945 –1820 –1695 –1945 –1820 –1695
mV 50Ω to VCC–2V
VOH
Output HIGH Voltage
–1145 –1020 –0895 –1145 –1020 –0895 –1145 –1020 –0895
mV 50Ω to VCC–2V
–1525 –1425 –1325 –1525 –1425 –1325 –1525 –1425 –1325
mV
Voltage(2)
VBB
Output Reference
VIHCMR
Input HIGH Voltage
Common Mode Range(3)
VEE +1.2
Max.
Min.
–1165
0.0
Typ.
TA = +85°C
VEE +1.2
Max.
0.0
Min.
–1165
VEE +1.2
0.0
Condition
V
Note 1.
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output
parameters vary 1:1 with VCC.
Note 2.
Single-ended input operation is limited VEE ≤ –3.0V in ECL/LVECL mode. VBB reference varies 1:1 with VCC.
Note 3.
VIHCMR (min) varies 1:1 with VEE, VIHCMR (max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the
differential input signal.
5
Precision Edge™
SY100EP14U
Micrel
(100K) ECL/LVECL DC ELECTRICAL CHARACTERISTICS(1)
VCC = 0V, VEE = –5.5V to –3.0V
TA = –40°C
Symbol
Parameter
Min.
Typ.
TA = +25°C
Max.
Min.
Typ.
TA = +85°C
Max.
Min.
Typ.
Max.
Unit
Condition
VIL
Input LOW Voltage
–1945
—
–1625 –1945
—
–1625 –1945
—
–1625
mV
VIH
Input HIGH Voltage
–1225
—
–880
—
–880
—
–880
mV
VOL
Output LOW Voltage(2)
–1945 –1820 –1695 –1945 –1820 –1695 –1945 –1820 –1695
mV
50Ω to VCC–2V
VOH
Output HIGH Voltage(2)
–1145 –1020
–895
mV
50Ω to VCC–2V
VBB
Output Reference Voltage(3) –1525 –1425 –1325 –1525 –1425 –1325 –1525 –1425 –1325
mV
VIHCMR
Input HIGH Voltage
Common Mode Range(4)
Note 1.
–895
VEE +1.2
–1225
–1145 –1020
0.0
VEE +1.2
–895
–1225
–1145 –1020
0.0
VEE +1.2
0.0
V
10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit
is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output parameters
vary 1:1 with VCC.
Note 2.
All loading with 50Ω to VCC –2.0V.
Note 3.
Single-ended input operation is limited VEE ≤–3.0V in ECL/LVECL mode. VBB reference varies 1:1 with VCC.
Note 4.
VIHCMR (min) varies 1:1 with VEE, (max) varies 1:1 with VCC. The VIHCMR is referenced to the most positive side of the differential input signal.
HSTL INPUT DC ELECTRICAL CHARACTERISTICS
VCC = 2.37V to 3.8V; VEE = 0V
TA = –40°C
Symbol
Parameter
Min.
Typ.
TA = +25°C
Max.
Min.
Typ.
TA = +85°C
Max.
Min.
Typ.
Max.
Unit
VIH
Input HIGH Voltage
1200
—
—
1200
—
—
1200
—
—
mV
VIL
Input LOW Voltage
—
—
400
—
—
400
—
—
400
mV
VX
Input Crossover Voltage
680
—
900
680
—
900
680
—
900
mV
6
Precision Edge™
SY100EP14U
Micrel
AC ELECTRICAL CHARACTERISTICS
LVPECL: VCC = 2.37V to 2.625V, VEE = 0V; PECL: VCC = 4.50V to 5.50V, VEE = 0V;
ECL: VEE = –4.50V to –5.5V, VCC = 0V; LVECL:VEE = –2.37V to –3.8V, VCC = 0V
TA = –40°C
Symbol
Parameter
TA = +25°C
TA = +85°C
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
2
—
—
2
—
—
2
—
—
GHz
fMAX
Maximum Frequency(1)
tPLH
tPHL
PECL/ECL (VCC = 5V)
PropagationDelay to Output
IN (Differential)
IN (Single-Ended)
250
—
330
—
400
—
250
—
330
355
450
—
250
—
330
—
600
—
ps
ps
LVPECL/LVECL (VCC = 2.37V to 3.8V)
Propagation Delay to Output
IN (Differential)
IN (Single-Ended)
275
—
350
—
425
—
275
—
350
375
475
—
275
—
350
—
525
—
ps
ps
PECL/ECL (VCC = 5V)
Within-Device Skew (Diff.)
Part-to-Part Skew (Diff.)
—
—
25
100
35
125
—
—
30
150
45
175
—
—
40
175
50
200
ps
ps
LVPECL/LVECL (VCC = 2.37V to 3.8V)
Within-Device Skew (Diff.)
Part-to-Part Skew (Diff.)
—
—
10
100
25
125
—
—
15
150
25
175
—
—
15
200
25
225
ps
ps
/EN to CLK
100
50
—
100
50
—
100
50
—
ps
/EN to CLK
200
140
—
200
140
—
200
140
—
ps
—
0.2
<1
—
0.2
<1
—
0.2
<1
ps
tSKEW(2)
tS
Set-Up Time(3)
Time(3)
tH
Hold
tJITTER
Cycle-to-Cycle Jitter (rms)
VPP
Minimum Input Swing
150
800
1200
150
800
1200
150
800
1200
mV
t r, t f
PECL/ECL Output Rise/Fall Times
(20% to 80%)
LVPECL/LVECL (VCC = 2.37V to 3.8V)
100
90
180
130
240
225
105
95
180
130
270
250
110
100
225
150
300
275
ps
ps
Note 1.
fMAX is defined as the maximum toggle frequency. Measured with 750mV input signal, 50% duty cycle, all loading with 50W to VCC–2V.
Note 2.
Skew is measured between outputs under identical transitions.
Note 3.
Set-up and hold times apply to synchronous applications that intend to enable/disable before then ext clock cycle. For asynchronous applications, set-up and hold time does not apply.
PRODUCT ORDERING CODE
Ordering
Code
Package
Type
Operating
Range
Marking
Code
SY100EP14UK4C
K4-20-1
Commercial
XEP14U
SY100EP14UK4CTR(1)
K4-20-1
Commercial
XEP14U
SY100EP14UK4I(2)
K4-20-1
Industrial
XEP14U
SY100EP14UK4ITR(1,2)
K4-20-1
Industrial
XEP14U
Note 1.
Tape and Reel.
Note 2.
Recommended for new designs.
7
Precision Edge™
SY100EP14U
Micrel
TERMINATION RECOMMENDATIONS
+3.3V
+3.3V
ZO = 50Ω
R1
130Ω
R1
130Ω
+3.3V
R2
82Ω
R2
82Ω
Vt = VCC –2V
ZO = 50Ω
Figure 1. Parallel Termination–Thevenin Equivalent
Note 1.
For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω
Note 2.
For +5.0V systems: R1 = 82Ω, R2 = 130Ω
+3.3V
+3.3V
Z = 50Ω
Z = 50Ω
50Ω
50Ω
“source”
“destination”
50Ω
Rb
Figure 2. Three-Resistor “Y–Termination”
Note 1.
Power-saving alternative to Thevenin termination.
Note 2.
Place termination resistors as close to destination inputs as possible.
Note 3.
Rb resistor sets the DC bias voltage, equal to Vt. For +3.3V systems Rb = 46Ω to 50Ω. For +5V systems, Rb = 110Ω.
+3.3V
+3.3V
+3.3V
R1
130Ω
Q
R1
130Ω
ZO = 50Ω
+3.3V
50Ω
/Q
VBB
Vt = VCC –2V
R2
82Ω
R2
82Ω
0.01µF
+3.3V
Figure 3. Terminating Unused I/O
Note 1.
Unused output (/Q) must be terminated to balance the output.
Note 2.
Micrel's differential I/O logic devices include a VBB reference pin .
Note 3.
Connect unused input through 50Ω to VBB. Bypass with a 0.01µF capacitor to VCC, not GND.
Note 4.
For +2.5V systems: R1 = 250Ω, R2 = 62.5Ω.
8
Precision Edge™
SY100EP14U
Micrel
20 LEAD TSSOP (K4-20-1)
± .05
± 0.002
± .10
± .004
+ .10
– .00
+ .004
– .000
± .10
± .004
+ .10
– .00
+ .004
– .000
Rev. 01
Package Notes:
Note 1. Package meets Level 1 moisture sensitivity.
MICREL, INC.
TEL
1849 FORTUNE DRIVE SAN JOSE, CA 95131
+ 1 (408) 944-0800
FAX
+ 1 (408) 944-0970
WEB
USA
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2003 Micrel, Incorporated.
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