MITSUBISHI<Dig.Ana.INTERFACE> M62366GP 3V TYPE 8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS PIN CONFIGURATION (TOP VIEW) DESCRIPTION VSS 1 (VrefL) Ao3 2 20 GND 19 Ao2 Ao4 3 18 Ao1 Ao5 4 17 DI Ao6 5 16 CLK Ao7 6 15 LD Ao8 7 14 Do Ao9 8 13 Ao12 Ao10 9 12 Ao11 VDD 10 (VrefU) 11 Vcc The M62366GP is a CMOS semiconductor IC,containing 12 channels of 8-bit D-A converters,with a high-performance buffer operational amplifier provided in the output of each channel. It is operable with a low supply voltage between 2.7~3.6V,and is easy to use due to serial data input,and 3-pin(DI,CLK,LD)connection with microcomputer. The IC also contains Do pin terminal,enabling cascade connection.The built-in buffer operational amplifiers are of full-swing design with a wide operating supply voltage range for input/output voltage.In addition,this IC provides improved stability against a capacitive load,and therefore is suitable for application to electronic volume(VCA)control,substitute for adjustment semi-fixed resistor,etc. FEATURES •Operable with a low voltage between 2.7~3.6V •12-bit serial data input(connected via 3 pins:DI,CLK,LD) •12 channels of R-2R and segment type high-performance 8-bit D-A converters •12 buffer operational amplifiers with full swing of output voltage between Vcc and GND. •High oscillation stability against the capacitive load of buffer operational amplifiers. Outline 20P2E-A APPLICATION Adjustment/control of industrial or home-use electric equipment,such as VTR camera,VTR set,TV,and CRT display. BLOCK DIAGRAM GND Ao2 Ao1 DI CLK LD Do Ao12 Ao11 Vcc 20 19 18 17 16 15 14 13 12 11 - - - 12-BIT SHIFT REGISTER 8-BIT R-2R + SEGMENT D-A CONVERTER D-A D-A D0 1 2 3 4 5 6 D7 1 Ch2 8-BIT LATCH (8) 8-BIT LATCH 1 Vss (VrefL) - L L 5 4 D-A 11 L L ..... (12) 8-BIT R-2R + SEGMENT D-A CONVERTER 12 ADDRESS DECODER (12) BUFFER OPERATIONAL AMPLIFIER D8 9 10 D11 L ..... Ch3 - L 6 (12) L L 8 7 L L 10 9 D-A D-A D-A D-A D-A D-A D-A - - - - - - - 2 3 4 5 6 7 8 9 10 Ao3 Ao4 Ao5 Ao6 Ao7 Ao8 Ao9 Ao10 VDD (VrefU) MITSUBISHI ELECTRIC ( 1 / 5 ) MITSUBISHI<Dig.Ana.INTERFACE> M62366GP 3V TYPE 8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS EXPLANATION OF TERMINALS Pin No. 17 14 16 Function Serial data input terminal to input 12-bit long serial data Terminal to output MSB data of 12-bit shift register Symbol DI Do CLK 15 Shift clock input terminal.Input signal at DI pin is input to 12-bit shift register at rise of shift clock pulse When H-level signal is input to this terminal,the value stored in 12-bit shift register is loaded in decoder and D-A converter output register LD Ao1 18 19 Ao2 Ao3 2 3 4 Ao4 Ao5 Ao6 Ao7 Ao8 5 6 7 8 8-bit D-A converter output terminal Ao9 Ao10 Ao11 Ao12 9 12 13 11 20 VCC GND 10 1 VDD VSS Power supply terminal GND terminal D-A converter upper reference voltage input terminal D-A converter lower reference voltage input terminal BLOCK DIAGRAM FOR EXPLANATION OF TERMINALS DI Vcc GND 11 20 17 12-BIT SHIFT REGISTER CLK 16 D0 D1 D2 D3 D4 D5 D6 14 Do D7 D8 D9 D10 D11 ADDRESS DECODER 8 ............... 12 D0 ............ 8-BIT LATCH 1 8-BIT R-2R + SEGMENT D-A CONVERTER 1 2 3 4 D7 12 D0 ..............................................12 .............................................. ................................................................................................... - 15 LD ............ 8-BIT LATCH 8-BIT R-2R + SEGMENT D-A CONVERTER - 10 18 13 VDD (VrefU) Ao1 Ao12 MITSUBISHI ELECTRIC D7 1 Vss (VrefL) ( 2 / 5 ) MITSUBISHI<Dig.Ana.INTERFACE> M62366GP 3V TYPE 8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS DIGITAL DATA FORMAT FIRST MSB LAST LSB DAC DATA DAC SELECT DATA D0 0 D1 D2 D3 D4 D5 D6 D7 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 (VrefU-VrefL) / 256 X 3 +VrefL 1 1 0 0 0 0 0 0 (VrefU-VrefL) / 256 X 4 +VrefL 0 1 1 1 1 1 1 1 (VrefU-VrefL) / 256 X 255 +VrefL 1 1 1 1 1 1 1 1 D8 D9 D10 D11 0 0 0 0 DAC selection Don‘t care 0 0 0 1 Ao1 selection 0 0 1 0 Ao2 0 1 0 1 Ao3 0 0 1 0 Ao4 Ao5 0 0 1 1 0 1 1 1 0 1 0 1 Ao6 Ao7 0 Ao8 0 0 1 Ao9 1 1 0 1 0 Ao10 0 1 1 Ao11 1 1 1 0 0 Ao12 1 0 1 Don‘t care 1 1 1 0 Don‘t care 1 1 1 1 Don‘t care 0 0 1 1 D-A output (VrefU-VrefL) / 256 X 1 +VrefL (VrefU-VrefL) / 256 X 2 +VrefL VrefU * VrefU=VDD VrefL=Vss TIMING CHART (MODEL) MSB DI D11 LSB D10 D9 D8 D2 D1 D0 CLK LD D-A OUTPUT MITSUBISHI ELECTRIC ( 3 / 5 ) MITSUBISHI<Dig.Ana.INTERFACE> M62366GP 3V TYPE 8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS ABSOLUTE MAXIMUM RATINGS Symbol Vcc VDD VIN Vo Pd Topr Tstg Conditions Parameter Supply voltage Upper reference voltage of D-A converter Input voltage Output voltage Power dissipation Operating temperature Storage tempareture Ratings Unit -0.3~+7.0 -0.3~+7.0 V -0.3~VCC+0.3 -0.3~VCC+0.3 150 -20~+85 V V V mW °C -55~+150 °C ELECTRICAL CHARACTERISTICS Digital part(VCC,VrefU=+3V±10%, VCC≥VrefU,GND,VrefL=0V,Ta=-20 ~ +85°C,unless otherwise noted) Symbol VCC Supply voltage Icc Circuit current Input leak current IILK VIL Test conditions Parameter Min. 2.7 CLK=1MHz operation,Vcc=3V,IAO=0µA VIN=0~VCC VIH Input low voltage Input high voltage VOL Output low voltage IOL=2.5mA VOH Output high voltage IOH=-400µA Limits Typ. 3.0 -10 Max. Unit 3.6 V 3.5 10 mA 0.2VCC V µA 0.8VCC V 0.4 V V VCC-0.4 Note:The standard values are obtaind at Ta=25°C Analog part(VCC,VrefU=+3V±10%, VCC≥VrefU,Ta=-20 ~ +85°C,unless otherwise noted) Symbol IrefU VrefU VrefL VAO IAO SDL SL SZERO SFULL Co Ro Parameter Test conditions Current dissipation VrefU=3V,VrefL=0V Data condition:maximum current D-A converter upper reference voltage range D-A converter lower reference voltage range Reference voltage can not always be set to any value in this range,because it is restricted to the buffer amplifier output voltage range Buffer amplifier output driver voltage IAO=±100µA IAO=+500µA range -200µA Upper saturation voltage=0.4V Buffer amplifier output voltage Lower saturation voltage=0.4V range Differential nonlinearity error Vcc=2.760V Nonlinearity error VrefU=2.610V Zero code error VrefL=0.050V(10mV/LSB) Without load(IAO=±0) Full scale error Limits Typ. Max. 1.4 2.5 mA 0.7Vcc Vcc V GND 0.3Vcc V 0.1 Vcc-0.1 0.2 Vcc-0.2 V -0.3 1 mA -1.0 -1.5 -2 -2 1.0 1.5 2 2 LSB LSB LSB LSB 0.1 µF Min. Output capacitative load Buffer amplifier output impedance Unit Ω 5 MITSUBISHI ELECTRIC ( 4 / 5 ) MITSUBISHI<Dig.Ana.INTERFACE> M62366GP 3V TYPE 8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS AC CHARACTERISTICS(VCC,VrefU=+5V±10%, VCC≥VrefU,GND,VrefL=0V,Ta=-20 ~ +85°C,unless otherwise noted) Parameter Symbol tCKL tCKH tCR tCF tDCH tCHD tCHL tLDC tLDH tDo tLDD Test conditions Min 200 200 Clock "L"pulse width Clock "H"pulse width Clock rise time Clock fall time Data set up time Data hold time Limits Typ Max Unit 200 ns ns ns ns ns ns ns 100 100 ns ns 200 200 30 60 LD set up time LD hold time LD "H" pulse duration Data output delay time CL=100pF 70 CL≥100pF,VAO:0.1 2.6V The time until the output becomes the final value of 1/2 LSB D-A output setting time 350 ns 300 µs TIMING CHART tCKH tCR tCF CLK tCKL DI tDCH tLDC tCHD tLDH tCHL LD tLDD D-A OUTPUT tDo Do OUTPUT MITSUBISHI ELECTRIC ( 5 / 5 )