M62352AGP 8-bit 12ch D/A Converter with Buffer Amplifiers REJ03D0867-0300 Rev.3.00 Mar 25, 2008 Description M62352A is a CMOS structured semiconductor integrated circuit integrating 12 channels of built-in D/A converters with high performance buffer operational amplifier or each channel output. The 3-wire serial interface (DI, CLK, LD) method is used for the transfer format or digital data to allow connection with microcomputer with minimum wiring. DO terminal is provided to allow cascading serial use. Built-in buffer operational amplifiers are designed to operate or full swing in the whole voltage range from VCC to GND for each input/output. And their higher stability for capacitive load perfectly fits in to the use for electronic volume (VCA) or the replacement for semi-variable resistor for tuning. Features • • • • • 12-bit serial data input (3 wire serial data transfer method, DI, CLK, LD) Corresponds to TTL input for digital input (VINH ≥ 2 V, VINL ≤ 0.8 V) R-2R + segment method high performance 12ch 8-bit D/A converters 12ch buffer operational amplifiers operating in the whole voltage range from VCC to GND Buffer operational amplifiers with high oscillation stability for capacitive load Application Adjustment or control of industrial or home-use electronic equipments such as VTR camera, VTR set, TV, and CRT display. Block Diagram GND AO2 AO1 DI CLK LD DO AO12 AO11 VCC 20 19 18 17 16 15 14 13 12 11 12 11 D/A 8-bit latch L Address decoder (8) ........ .... + − D0 1 2 3 4 5 6 D7 D8 9 10 D11 1 8-bit R-2R + segment D/A converter + − + − + − Ch2 12-bit shift register D/A D/A L L (12) (12) 8-bit latch Ch3 L 4 L 6 L 7 L 8 L 9 L 10 D/A D/A D/A D/A + − + − + − + − D/A + − D/A + − + − D/A + − 8-bit R-2R + segment D/A converter L 5 (12) 1 2 3 4 5 6 7 8 9 10 VSS (VrefL) AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 VDD (VrefU) REJ03D0867-0300 Rev.3.00 Mar 25, 2008 Page 1 of 8 M62352AGP Pin Arrangement M62352AGP VSS (VrefL) AO3 1 20 2 19 GND AO2 AO4 3 18 AO1 AO5 4 17 DI AO6 5 16 CLK AO7 6 15 LD AO8 7 14 AO9 8 13 DO AO12 AO10 9 12 AO11 VDD (VrefU) 10 11 VCC (Top view) Outline: 20P2E-A Pin Description Pin No. Pin Name 17 14 16 DI DO CLK 15 18 19 2 3 4 5 6 7 8 9 12 13 11 20 10 1 LD AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 AO11 AO12 VCC GND VDD VSS Function Serial data input terminal. 12-bit serial data is input to this terminal. Serial data output terminal. Serial data of 12-bit shift register is output from this terminal. Serial clock input terminal. Input signal from DI terminal is input to 12-bit shift register upon the rise of shift clock. Data is loaded to register when "H" is input to LD terminal. 8-bit D/A converter output terminal. Built-in buffer amp. is connected to VCC. D/A converted voltage between VDD and VSS is output to each terminal. Power supply terminal. Digital and analog common GND D/A converter high level reference voltage input terminal. D/A converter low level reference voltage input terminal. REJ03D0867-0300 Rev.3.00 Mar 25, 2008 Page 2 of 8 M62352AGP Block Diagram for Explanation of Terminals DI CLK VCC GND 11 20 17 12-bit shift register 16 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 Decoder (8) (12) 14 DO 15 LD 1 2 3 4 5 6 7 8 9 10 11 12 ..... ..... ..... ..... ..... 8-bit latch 8-bit latch 8-bit latch ........... 8-bit latch 8-bit latch 8-bit latch 8-bit D/A converter 8-bit D/A converter 8-bit D/A converter ........... 8-bit D/A converter 8-bit D/A converter 8-bit D/A converter + − + − + − + − + − + − ..... A1 A4 A5 ........... 10 18 AO1 VDD (VrefU) 19 2 AO2 AO3 A10 ............. A11 A12 9 12 13 AO10 AO11 AO12 1 VSS (VrefL) Absolute Maximum Rating Item Supply voltage D/A converter High level reference voltage Digital input voltage Output voltage Power dissipation Operating temperature Storage temperature REJ03D0867-0300 Rev.3.00 Mar 25, 2008 Page 3 of 8 Symbol VCC VDD VIN Vout Pd Topr Tstg Ratings –0.3 to +7.0 –0.3 to +7.0 –0.3 to VCC + 0.3 –0.3 to VCC + 0.3 150 –20 to +85 –40 to +125 Unit V V V V mW °C °C M62352AGP Electrical Characteristics Digital Part (VCC, VrefU = 5 V ± 10%, VCC ≥ VrefU, GND, VrefL = 0.0 V, Ta = –20 to +85°C, unless otherwise specified.) Symbol Min Limits Typ Max Unit Supply voltage Supply current VCC ICC 4.5 — 5.0 1.5 5.5 3.5 V mA Input leak current Digital input Low voltage Digital input High voltage Digital output Low voltage Digital output High voltage IILK VIL VIH VOL VOH –10 — 2.0 — VCC – 0.4 — — — — — 10 0.8 — 0.4 — µA V V V V Item Note: Conditions CLK = 1 MHz operation VCC = 5 V, IAO = 0 µA VIN = 0 to VCC IOL = 2.5 mA IOH = –400 µA Changes from M62352GP: Digital input voltage corresponds to TTL spec. Analog Part (VCC, VrefU = 5 V ± 10%, VCC ≥ VrefU, GND, VrefL = 0.0 V, Ta = –20 to +85°C, unless otherwise specified.) Item Symbol Min Limits Typ Max Unit Reference voltage pin current IrefU — 1.5 3.5 mA D/A converter High level reference voltage range VDD (VrefU) 3.5 — VCC V D/A converter Low level reference voltage range VSS (VrefL) GND — VCC – 3.5 Buffer amplifier output drive range VAO Buffer amplifier output dive range IAO 0.1 0.2 –1 — — — VCC – 0.1 VCC – 0.2 1 mA Differential nonlinearity Nonlinearity Zero code error Full scale error Output capacitive load SDL SL SZERO SFULL CO Buffer amplifier output impedance RO –1.0 –1.5 –2.0 –2.0 — — — — — — — 5 1.0 1.5 2.0 2.0 0.1 — LSB LSB LSB LSB µF Ω REJ03D0867-0300 Rev.3.00 Mar 25, 2008 Page 4 of 8 V Conditions VrefU = 5 V, VrefL = 0 V, IAO = 0 µA Data condition: at maximum current The output does not necessarily be the Values within the reference voltage setting range. The output value is determined by the buffer amplifier output voltage range (VAO). IAO = ±100 µA IAO = ±500 µA Upper side saturation voltage = 0.3 V Lower side saturation voltage = 0.2 V VrefU = 4.79 V VrefL = 0.95 V (15 mV/LSB) VCC = 5.5 V Without load (IAO = +0 µA) M62352AGP AC Characteristics (VCC, VrefU = 5 V ± 10%, VCC ≥ VrefU, GND, VrefL = 0.0 V, Ta = –20 to +85°C, unless otherwise specified.) Symbol Min Limits Typ Max Unit Clock "L" pulse width Clock "H" pulse width Clock rise time tCKL tCKH tCR 200 200 — — — — ns ns — — 200 ns Clock fall time tCF Data setup time Data hold time LD setup time LD hold time LD "H" hold time Data output delay time D/A output setting time tDCH tCHD tCHL tLDC tLDH tDO tLDD 30 60 200 100 100 70 — — — — — — — — — — — — — 350 300 ns ns ns ns ns ns µs Item Conditions CL ≤ 100 pF CL ≤ 100 pF, VAO: 0.5 ↔ 4.5 V The time until the output becomes the final value of 1/2 LSB Measurement Circuit Input Output DUT CL ≤ 100 pF Timing Chart tCR tCKH tCF tCHL CLK tCKL tLDC DI tDCH tCHD tLDH tCHL LD tLDD AO1 to AO12 output tDO DO output REJ03D0867-0300 Rev.3.00 Mar 25, 2008 Page 5 of 8 tDO M62352AGP Digital Data Format First MSB Last LSB D0 D1 D2 D3 D4 D5 D6 D7 D8 DAC data D9 D10 D11 DAC select data DAC Data D0 0 1 0 1 : 0 1 D1 0 0 1 1 : 1 1 D2 0 0 0 0 : 1 1 D3 0 0 0 0 : 1 1 D4 0 0 0 0 : 1 1 D5 0 0 0 0 : 1 1 D6 0 0 0 1 : 1 1 D7 0 0 0 0 : 1 1 D/A Output (VrefU – VrefL) / 256 × 1 + VrefL [V] (VrefU – VrefL) / 256 × 2 + VrefL [V] (VrefU – VrefL) / 256 × 3 + VrefL [V] (VrefU – VrefL) / 256 × 4 + VrefL [V] : (VrefU – VrefL) / 256 × 255 + VrefL [V] VrefU [V] Note: VrefU = VDD, VrefL = VSS DAC Select Data D8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D10 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DAC Selection Don’t care AO1 select AO2 select AO3 select AO4 select AO5 select AO6 select AO7 select AO8 select AO9 select AO10 select AO11 select AO12 select Don’t care Don’t care Don’t care Timing Chart (Model) CLK SI D11 D10 D9 D8 LD AO1 to AO12 REJ03D0867-0300 Rev.3.00 Mar 25, 2008 Page 6 of 8 D7 D6 D5 D4 D3 D2 D1 D0 (1 LSB) (2 LSB) (3 LSB) (4 LSB) (255 LSB) (256 LSB) M62352AGP Typical Application 11 10 VCC VDD (VrefU) AO1 18 AO2 19 AO3 2 AO4 3 AO5 4 AO6 5 AO7 6 AO8 7 AO9 8 AO10 9 18 DI 17 CLK MCU 16 LD 15 DO AO11 12 AO12 13 GND VSS (VrefL) 20 1 Precaution for Use M62352AGP has 3 terminals (VDD, VCC, and VSS) to which constant voltage is to be applied. Ripple voltage or spike noise to these terminals may worsen converting precision or cause erroneous operations. So be sure to use this device by putting capacitor between each terminal and GND to get D/A conversion operation stabilized. Output buffer amplifiers have high oscillation stability against capacitive load. This means that jitters by wirings around output terminals or capacitor between output and GND (0.1 µF Max.) do not cause any problems with DAC operations. Connect capacitor (0.1 µF or around) between output and GND for protection from spark discharge when this device is used under such high electric field as that for instance of instruments with cathode ray tube. REJ03D0867-0300 Rev.3.00 Mar 25, 2008 Page 7 of 8 M62352AGP Package Dimensions 20P2E-A Plastic 20pin 225mil SSOP EIAJ Package Code SSOP20-P-225-0.65 Weight(g) 0.08 JEDEC Code — e b2 11 E HE e1 I2 20 Lead Material Alloy 42 F Recommended Mount Pad Symbol 1 10 A D G b e x A2 M A1 L L1 y c z Z1 Detail G REJ03D0867-0300 Rev.3.00 Mar 25, 2008 Page 8 of 8 Detail F A A1 A2 b c D E e HE L L1 z Z1 x y b2 e1 I2 Dimension in Millimeters Min Nom Max — — 1.45 0 0.1 0.2 — — 1.15 0.17 0.32 0.22 0.13 0.15 0.2 6.4 6.5 6.6 4.3 4.4 4.5 — — 0.65 6.2 6.4 6.6 0.3 0.5 0.7 — — 1.0 0.325 — — 0.475 — — 0.13 — — — — 0.1 — 0° 10° — — 0.35 — — 5.8 — — 1.0 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including, but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples. 3. You should not use the products or the technology described in this document for the purpose of military applications such as the development of weapons of mass destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws and regulations, and procedures required by such laws and regulations. 4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document, please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com ) 5. Renesas has used reasonable care in compiling the information included in this document, but Renesas assumes no liability whatsoever for any damages incurred as a result of errors or omissions in the information included in this document. 6. When using or otherwise relying on the information in this document, you should evaluate the information in light of the total system before deciding about the applicability of such information to the intended application. Renesas makes no representations, warranties or guaranties regarding the suitability of its products for any particular application and specifically disclaims any liability arising out of the application and use of the information in this document or Renesas products. 7. With the exception of products specified by Renesas as suitable for automobile applications, Renesas products are not designed, manufactured or tested for applications or otherwise in systems the failure or malfunction of which may cause a direct threat to human life or create a risk of human injury or which require especially high quality and reliability such as safety systems, or equipment or systems for transportation and traffic, healthcare, combustion control, aerospace and aeronautics, nuclear power, or undersea communication transmission. If you are considering the use of our products for such purposes, please contact a Renesas sales office beforehand. Renesas shall have no liability for damages arising out of the uses set forth above. 8. Notwithstanding the preceding paragraph, you should not use Renesas products for the purposes listed below: (1) artificial life support devices or systems (2) surgical implantations (3) healthcare intervention (e.g., excision, administration of medication, etc.) (4) any other purposes that pose a direct threat to human life Renesas shall have no liability for damages arising out of the uses set forth in the above and purchasers who elect to use Renesas products in any of the foregoing applications shall indemnify and hold harmless Renesas Technology Corp., its affiliated companies and their officers, directors, and employees against any and all damages arising out of such applications. 9. You should use the products described herein within the range specified by Renesas, especially with respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas shall have no liability for malfunctions or damages arising out of the use of Renesas products beyond such specified ranges. 10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. Among others, since the evaluation of microcomputer software alone is very difficult, please evaluate the safety of the final products or system manufactured by you. 11. In case Renesas products listed in this document are detached from the products to which the Renesas products are attached or affixed, the risk of accident such as swallowing by infants and small children is very high. You should implement safety measures so that Renesas products may not be easily detached from your products. Renesas shall have no liability for damages arising out of such detachment. 12. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written approval from Renesas. 13. Please contact a Renesas sales office if you have any questions regarding the information contained in this document, Renesas semiconductor products, or if you have any other inquiries. http://www.renesas.com RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900 Renesas Technology (Shanghai) Co., Ltd. Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120 Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7858/7898 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2377-3473 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: <886> (2) 2715-2888, Fax: <886> (2) 3518-3399 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 Renesas Technology Korea Co., Ltd. Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145 Renesas Technology Malaysia Sdn. Bhd Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: <603> 7955-9390, Fax: <603> 7955-9510 © 2008. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .7.2