MITSUBISHI M65830

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M65830BP/FP
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Not param
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DIGITAL DELAY
DESCRIPTION
The M65830B is a CMOS IC developed to produce surround effects on TV sets and video
disc players.Among the series,it has the highest degree of freedom in the selection of
delay time,so it permits fine adjustments when mounted on a set.
Outline
FEATURES
•Selection of delay time in a range between 0.5msec and
32.0msec in 64 increments of 0.5msec
•Selection of delay time is controlled by serial data
•Built-in A-D, D-A converters,input/output low-pass filter,
and 16K bit memory
•High sound quality is assured by simple system
construction,due to A-D, D-A converters with ADM
(Adaptive Delta Modulation) system
Output noise voltage : -95dBV (typ)
Total harmonic distortion : 0.2% (typ)
Outline 24P4 (BP)
2.54mm pitch 600mil DIP
(13.0mm X 31.1mm X 3.8mm)
RECOMMENDED OPERATING CONDITIONS
Supply voltage range
VCC,VDD=4.5 to 5.5V
Rated supply voltage
VCC,VDD=5V
Outline 24P2W-A(BFP)
1.27mm pitch 450mil SOP
(8.4mm X15.0mm X2.0mm)
SYSTEM CONFIGURATION
BUFFER
Lch In
∑
Lch Out
M65830BP / FP
*1
MODE SWITCH
∆
+
DIGITAL
DELAY
-1
SLch Out
-1
∑
SRch Out
EFFECT
VOLUME
BUFFER
*2
EFFECT SWITCH
∑
Rch In
Notes
*1 Mode switch : ∆ L-R Stereo input
Mode switch : ∑ L+R Monaural input
*2 Effect switch ON: Surround output disabled ( 2 loudspeakers )
OFF:Surround output enabled( 4 loudspeakers )
MITSUBISHI
ELECTRIC
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Rch Out
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P R E; This isicnolitmits are s
M65830BP/FP
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Not param
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DIGITAL DELAY
Pin Configuration
1
24
Vcc
XIN
2
23
LPF1 IN
XOUT
3
22
LPF1 OUT
REQ
4
21 OP1 OUT
SCK
5
DATA
6
IDSW
7
IDFLAG
8
TEST1
9
M65843FP
VDD
20 OP1 IN
19
REF
18
CC1
17
CC2
16
OP2 IN
TEST2 10
15
OP2 OUT
D-GND 11
14
LPF2 IN
A-GND 12
13
LPF2 OUT
Outline 24P4 (BP)
24P2W-A (BFP)
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M65830BP/FP
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DIGITAL DELAY
BLOCK DIAGRAM
LPF1
IN
LPF1
OUT
OP1
OUT
23
22
21
4.7k
OP1
IN
CC1
CC2
OP2
IN
20
18
17
16
MOD
DEM
OP1
LPF1
REF
4.7k
OP2 LPF2
OUT IN
LPF2
OUT
15 14
13
OP2
LPF2
COMP
19
1/2 Vcc
RESET
DO0
OSCILLATOR
3
XIN XOUT
DO1
DO1
MAIN CONTROL
CLOCK
AUTO
RESET
2
D1
16K-bit
SRAM
MO
MI
DELC
DELAY TIME
CONTROL
4
5
REQ
6
8
7
DATA
9
IDFLAG
SCK
IDSW
10
11
TEST2
TEST1
12
1
24
A-GND VDD Vcc
D-GND
Unit Resistance: Ω
NC : NO CONNECTION
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ELECTRIC
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MITSUBISHI SOUND PROCESSOR ICS
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M65830BP/FP
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DIGITAL DELAY
PIN DESCRIPTION
NO. Symbol
Name
1
VDD
Digital VDD
2
XIN
Oscillator input
3
XOUT
Oscillator output
4
5
6
7
REQ
SCK
DATA
IDSW
Request
Shift clock
Serial data
ID switch
8
IDFLAG
ID flag
I/O
Function
— Supply voltage
Connects ceramic filter or inputs an external
I clock
Connects ceramic filter/
O Set to open when external is used
I Input request data from µ -COM
I Input shift clock from µ -COM
I Input serial data from µ -COM
Controls ID code
I
Outputs pulse at setting function
O
mode and function mode data
TEST1
TEST2
D-GND
A-GND
LPF2 OUT
LPF2 IN
OP2 OUT
OP2 IN
CC2
CC1
REF
OP1 IN
OP1 OUT
LPF1 OUT
LPF1 IN
VCC
Test 1
Test 2
Digital GND
Analog GND
Lowpass filter2 output
Lowpass filter2 input
OP-AMP2 output
OP-AMP2 input
Current control 2
Current control 1
Reference
OP-AMP1 input
OP-AMP1 output
Lowpass filter1 output
Lowpass filter1 input
Analog VCC
—
—
—
—
O
I
O
I
—
—
—
I
O
O
I
—
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
L=normal mode
L=normal mode
Connects to analog GND at one point
Forms low pass filter with external C,R
Forms integrator with external C
Demodulator ADM control
Modulator ADM control
1/2VCC
Forms integrator with external C,R
Forms low pass filter with external C,R
Supply voltage
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DIGITAL DELAY
ABSOLUTE MAXIMUM RATINGS
(Ta=25°C,unless otherwise noted)
Symbol
Parameter
Conditions
Vcc
Supply voltage
Icc
Circuit current
M65830BP
M65830BFP
Ratings
Units
6.5
V
100
mA
1
0.8
W
Pd
Power dissipation
Topr
Operating temperature
-20~+75
°C
Tstg
Storage temperature
-40~+125
°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Conditions
Min
Limits
Typ
Max
Units
Vcc
Supply voltage
4.5
5
5.5
V
VDD
Supply voltage
4.5
5
5.5
V
Vcc-VDD
Difference voltage
-0.3
0
0.3
V
fck
Clock frequency
1
2
3
MHz
VIH
High input voltage
0.7VDD
—
VDD
V
VIL
Low input voltage
0
—
0.3VDD
V
f sck
Serial clock
—
—
4.0
MHz
POWER DISSIPATION Pd (W)
THERMAL DERATING
(MAXIMUM RATING)
1.2
1.0
0.8
BP
BFP
0.6
0.4
0.2
0
25
50
75
100
125
150
AMBIENT TEMPERATURE Ta(°C)
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P R E; This isicnolitmits are s
M65830BP/FP
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Not param
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DIGITAL DELAY
ELECTRICAL CHARACTERISTICS
(Vcc=5V,f=1kHz,Vi=100mV(rms),Ta=25°C,unless otherwise noted)
Limits
Symbol
Parameter
Test conditions
Min
Typ
Max
Units
16
35
mA
2.5
dB
Icc
Circuit current
No signal
Gv
Voltage gain
RL=47kΩ
-3.5
-0.5
Vomax
Maximum output voltage
THD=10%
0.7
1
THD
Total harmonic
distortion
30kHz LPF
0.2
1.0
%
No
Output noise voltage DIN-AUDIO
-95
-75
dBV
SVRR
Supply voltage rejection
∆Vcc=-20dBV,f=100Hz
ratio
-40
-25
dB
Iccs
Circuit current
(Sleep Mode)
12
30
mA
Sleep Mode
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ELECTRIC
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V(rms)
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P R E; This isicnolitmits are s
M65830BP/FP
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Not param
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som
DIGITAL DELAY
OPERATION
1)DELAY TIME
D6
D5
D4
D3
D2
D1
Delay time(ms)
L
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
0.5
1.0
1.5
2.0
2.6
3.1
3.6
4.1
4.6
5.1
5.6
6.1
6.7
7.2
7.7
8.2
8.7
9.2
9.7
10.2
10.8
11.3
11.8
12.3
12.8
13.3
13.8
14.3
14.8
15.4
15.9
16.4
L
H
L
L
H
H
L
L
L
H
H
L
H
H
L
L
L
H
L
L
H
H
H
L
L
H
H
H
L
H
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P R E; This isicnolitmits are s
M65830BP/FP
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Not param
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som
D6
DIGITAL DELAY
D5
D4
D3
D2
D1
Delay time(ms)
L
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
16.9
17.4
17.9
18.4
18.9
19.5
20.0
20.5
21.0
21.5
22.0
22.5
23.0
23.6
24.1
24.6
25.1
25.6
26.1
26.6
27.1
27.6
28.2
28.7
29.2
29.7
30.2
30.7
31.2
31.7
32.3
32.8
L
H
L
L
H
H
L
L
L
H
H
L
H
H
H
L
L
H
L
L
H
H
H
L
L
H
H
H
L
H
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MITSUBISHI SOUND PROCESSOR ICS
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P R E; This isicnolitmits are s
M65830BP/FP
etr
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Not param
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som
DIGITAL DELAY
2) SAMPLING FREQUENCY
fs=500kHz (at fck=2MHz)
3) SETTING DELAY TIME
REQ
SCK
SLEEP
DATA
D1 D2 D3 D4 D5 D6
MUTE
ID1 ID2 ID3 ID4
D1~D6 : DELAY TIME ...12-1)
ID1~D4 : ID codes
Timing Diagram
This time chart shows that delay time is set by serial data
from µ -COM.
DATA signal is latches at the falling edge of SCK signal,
and the last twelve data are set at the rising edge of REQ
signal when ID codes are satisfied*.
*
ID1 , ID2 : L
ID3
: H
ID4
: equal to IDSW
Sleep data is
H : clock and RAM stop to reduce circuit current
(sleep mode)
L : normal operation
Mute data is
H : mute
L : not mute
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P R E; This isicnolitmits are s
M65830BP/FP
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Not param
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som
DIGITAL DELAY
4) ID CODE FLAG
When ID codes are satisfied, IDFLAG signal is set on
high-level at rising of REQ signal, and it is set on low-level
at falling of REQ signal.
Each time the REQ signal fall the IDFLAG signal outputs
function mode data (input from DATA signal) at the rising
edge of the SCK signal.
REQ
SCK
DATA
function
ID codes
mode data
IDFLAG
5) SYSTEM RESET
It is automatic power-on reset, and the reset time is about
120ms. Then delay time is set on 20.0ms.
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M65830BP/FP
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DIGITAL DELAY
REQ,SCK,DATA INPUT TIMING
REQ
t6
t4 t5 t6
t1
SCK
t3
t2
ds
DATA
Sleep D1
Symbol
D2
D3
D4
SCK pulse width
ds
SCK pulse duty
t2
DATA setup time
t3
D6 MUTE ID1 ID2
min
Parameter
t1
D5
typ
ID3 ID4
max
Units
ns
250
50
%
100
t1/2
ns
DATA hold time
100
t1/2
ns
t4
REQ hold time
100
ns
t5
REQ pulse width
100
ns
t6
SCK setup time
100
ns
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P R E; This isicnolitmits are s
M65830BP/FP
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Not param
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DIGITAL DELAY
TEST METHODS
Switch condition
No
Parameter
Symbol
Conditions
PIN
4
5
SWITCH
6 S7 S24 S30
1 Circuit current
Icc
No signal
* * * # 2 2
2 Voltage gain
Gv
Gv=20log(Vo/Vi)
* * * # 1 1
3 Delay time
Td
Maximum
* * * # 1 1
4 Output voltage
Vomax
30kHz L.P.F.
THD=10%
* * * # 1 1
5 Total harmonic
THD
30kHz L.P.F.
* * * # 1 1
No
DIN AUDIO
Vi=0mV(rms)
* * * # 1 2
SVRR
∆Vcc=-20dBv,f
=100Hz
* * * # 1 2
Sleep mode
* * * # 1 2
distortion
6 Output noise
voltage
Supply voltage
7 rejection ratio
current
8 Circuit
(Sleep mode)
Iccs
*....Serial Data
"L " or "H"
#.... 1 or 2
MITSUBISHI
ELECTRIC
12
Vcc
S30
2
1
A
S24
IN
2
50
VCC
24
0.1µ
13
MITSUBISHI
ELECTRIC
100p
0.1µ
4
2MHz
1M
100p
4
5
5
DELAY TIME
CONTROL
OSCILLATOR
3
DELC
CLK
2
DO0
MOD
18
6
6
2
1
S07
7
17
0.1µ
8
8
DO1
DEM
0.1µ
4.7k
9
10
MODE
CONTROL
MODE MI
MO
15
OP2
16
13
11
DIG.GND
1µ
2.7k
OUT
0.01µ
Units : Resistance Ω
Capacitance F
12
ANG.GND
16K-bit
SRAM
LPF2
14
560p
10k
5600p
15k
ice
Not param
e
som
1
19
MAIN CONTROL
OP1
4.7k
20
47µ
0.068µ
15k
L
ub
a fi
P R E; This isicnolitmits are s
VDD
AUTO
RESET
30
0.068µ
21
D1
COMP
RESET
LPF1
22
560p
15k
15k
23
10k
5600P
1µ
1/2 Vcc
100µ
1
TEST CIRCUIT
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MITSUBISHI SOUND PROCESSOR ICS
etr
M65830BP/FP
DIGITAL DELAY
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A RpY
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I M nal ject
MITSUBISHI SOUND PROCESSOR ICS
L
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P R E; This isicnolitmits are s
M65830BP/FP
etr
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Not param
e
som
DIGITAL DELAY
APPLICATION EXAMPLE
5600p
5600p
1µ 15k
+
10k
15k
30
+ 47µ
15k
10k
*0.068µ
*0.1µ
*0.1µ
560p
100µ
+
0.01µ
OUT
560p
REF
CC1
CC2
OP2 IN
OP2OUT
LPF2IN
LPF2OUT
IDSW
IDFLAG
TEST1
TEST2
D-GND
A-GND
13
DATA
14
OP1IN
15
SCK
16
OP1OUT
17
REQ
18
LPF1OUT
19
XOUT
20
LPF1IN
21
XIN
22
Vcc
5V
23
VDD
24
1µ 2.7k
15k
*0.068µ
+
IN
1
2
3
4
5
6
7
8
9
10
11
12
1M
0.1µ
100p
2MHz
100p
Units Resistance : Ω
Capacitance : F
microcomputer
CERAMICRESONATOR
(CSA 2.00MG)
MANUFACTURED BY MURATA
MFG CO. LTD.
The relative precision of capacitors marked with a * should be within ±5%
MITSUBISHI
ELECTRIC
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