Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 DESCRIPTION PT2396 is a digital echo/surround processor IC utilizing CMOS Technology. Analog Signal inputted to PT2396 is converted to digital signal by A-D converter and then stored into the internal memory. After a certain delay time, this memory-stored digital signal is converted back into analog signal via the D-A converter. A low cost echo system may be achieved with the PT2396's A-D converter, D-A converter, incorporating ADM (Adaptive Delta Modulation) Algorithm while maintaining lower noise, lower distortion, and higher S/N ratio. PT2396 is functionally compatible with M65831P. If you are replacing M65831P with our PT2396, you must take note that PT2396 does not need to connect an external resistor (30Ω) to Pin 15 and Pin 21. FEATURES • • • • • • • • • CMOS technology Low power consumption Low noise (-92dBV typical) Low distortion (0.5% typical) Built-in 48K memory Automatic reset circuit included A-D, D-A converters (Adaptive delta modulation), 2 LPFs and 48 K-bit memory Sleep mode function Parallel or serial data controlled from micro controller APPLICATIONS • • • • KARAOKE Electronic musical instruments VCD, DVD Radio set PT2396 V1.4 -1- December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 PIN CONFIGURATION PT2396 V1.4 VD D 1 24 VC C OSCI 2 23 LPF 1IN OSCO 3 22 LPF 1OU T DL1/R EQ 4 21 OP1OUT DL2/C LK 5 20 OP1IN DL3/D IN 6 19 RE F DL4/IDS 7 18 CC1 T EST 8 17 CC2 EA SY/(/MCU ) 9 16 OP2IN SLEE P 10 15 OP2OUT DGND 11 14 LPF 2IN AGND 12 13 LPF 2OU T PT23 96 -2- December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 PIN DESCRIPTION Pin Name VDD I/O - OSCI I OSCO O DL1/REQ I DL2/CLK I DL3/DIN I DL4/IDS I TEST I EASY/(/MCU) I SLEEP I DGND - AGND - LPF2OUT O LPF2IN I OP2OUT O OP2IN CC2 I - PT2396 V1.4 Description Digital supply voltage Oscillator input pin This pin connects to 2MHz ceramic resonator or inputs an external clock. Oscillator output pin This pin connects to 2MHz ceramic resonator. Delay1/Request pin Easy Mode: This pin inputs DL1 data. MCU Mode: This pin inputs request data. Delay2/Shift clock pin Easy Mode: This pin inputs DL2 data. MCU Mode: This pin inputs shift clock. Delay 3/Serial data pin. Easy Mode: This pin inputs DL3 data. MCU Mode: This pin inputs serial data. Delay 4/ID switch pin Easy Mode: This pin inputs DL4 data. MCU Mode: This pin controls ID Code. Test pin Normal mode = Low EASY/(/MCU) pin. EASY mode = High MCU mode = Low Sleep pin Sleep mode = High Normal mode = Low Digital GND pin This pin connects to the Analog GND at one external point. Analog GND pin This pin connected to the Analog GND These pins form the low Low Pass Filter 2 output pin pass filter with external Low Pass Filter 2 Input pin C, R. These pins form the OP-AMP2 output pin integrator with external OP-AMP2 input pin C, R. Current control 2 pin -3- Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC Pin Name CC1 I/O - REF - OP1IN - Current control 1 pin. Reference pin. Reference voltage = 1/2 VCC OP-AMP 1 input pin OP1OUT I OP-AMP 1 output pin. LPF1OUT O Low pass filter 1 output pin LPF1IN VCC O I Low pass filter 1 input pin Analog supply voltage pin PT2396 V1.4 PT2396 Description -4- Pin No. 18 19 These pins form the integrator with external C, R. These pins form the low pass filter with external C, R. 20 21 22 23 24 December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 FUNCTIONAL DESCRIPTION DELAY TIME EASY MODE The Easy Mode is activated when the EASY/(/MCU) Pin is in HIGH State. Under the Easy Mode; namely – DL1/REQ, DL2/CLK, DL3/DIN, and DL4/IDS are all used as inputs for Delay Time Data (DL1 ~ DL4). The Delay Pins: namely -- DL1~DL4 determine the amount of time the memory-stored signal would be stored in the 48 K-bit memory (delay time). The following table gives the various Delay Time with reference to the Pins DL1 ~ DL4. fs DL4 DL3 DL2 L L H 500 L L H H L L H 250 H L H H DL1 L H L H L H L H L H L H L H L H Td (ms) 12.3 24.6 36.9 49.2 61.4 73.7 86.0 98.3 110.6 122.9 135.2 147.5 159.7 172.0 184.3 196.6 Notes: 1. fs - sampling frequency (KHz) 2. Td = Delay Time (msec) PT2396 V1.4 -5- December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 MCU MODE The MCU Mode is activated when the EASY/(/MCU) Pin is in Low State. The delay time is set by the serial data from the MCU. Please refer to the timing diagram below: where: Delay time = DL1 ~ DL4 ID code = ID1 ~ ID4 The DIN Signal is shifted in the falling edge of the CLK Signal when the ID Code Bits values are verified as follows: ID1 and ID3 = Low ID2 = High ID4 = IDS Pin then, the last ten data bits are latched at the rising edge of the REQ Signal. When 2 pieces of PT2396 are used, Pin 7 determines which PT2396 is in control. Pin 7 may be pulled High or Low. Please refer to below: IDS Pin 0 1 PT2396 V1.4 ID1 0 0 ID2 1 1 -6- ID3 0 0 ID4 0 1 December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 SLEEP MODE FUNCTION EASY MODE Also under this mode, the SLEEP Mode may be activated when the SLEEP Pin is in High State; otherwise, the Normal Mode applies. MCU MODE The Sleep Mode is activated when the SLEEP Pin is set to HIGH. At this point, the clock and the RAM stops in order to reduce the circuit current. When the SLEEP Pin is set to LOW, there is normal operation. SYSTEM RESET PT2396 features an auto-rest function. The reset time is approximately 120 msec and the delay time is set at 147.5msec if MCU Mode is enabled. PT2396 V1.4 -7- December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 MUTE FUNCTION EASY MODE Under the EASY Mode, the mute function is automatically activated under the following conditions: 1. 2. 3. Delay Time is changed. SLEEP Mode is canceled. Power is turned ON. Condition 1: Automatic Mute Function Diagram 1 -- Delay Time Change Condition 2: Automatic Mute Function Diagram 2 -- SLEEP Mode is canceled. Condition 3: Automatic Mute Function Diagram 3 -- During Power ON PT2396 V1.4 -8- December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 MCU MODE From the DIN signal (DL3 Pin), if the Mute bit is read as Low, then an automatic muting function can be used (also see EASY Mode Section). Please refer to the diagrams below. However, if this Mute bit (from the DIN Pin) is read High, then normal muting function can be performed (see figure below). PT2396 V1.4 -9- December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 ABSOLUTE MAXIMUM RATING (Unless otherwise specified, Ta=25℃) Parameter Supply voltage Operating current Power dissipation Operating temperature Storage temperature Symbol Vcc Icc Pd Topr Tstg Ratings 5.5 100 1 -40 ~ +85 -65 ~ +150 Unit V mA W ℃ ℃ RECOMMENDED OPERATING CONDITIONS Parameter Supply voltage Clock frequency High input voltage Low input voltage Symbol Vcc Fck VIH VIL Min. 4.5 0.7VDD 0 Typ. 5 2 - Max. 5.2 VDD 0.3VDD Unit V MHz V V ELECTRICAL CHARACTERISTICS (Unless otherwise specified, Vcc=5V, f=1KHz, Vi=100mVrms, Ta=25℃) Parameter Symbol Test Conditions Min. Operating current Icc RL=47KΩ Voltage gain Gv THD=10% 30KHz LPF fs=500 KHz Output distortion THD Vi=1Vrms fs=250 KHz Output noise voltage Supply voltage rejection ratio Mute time Operating current (Sleep mode) PT2396 V1.4 VNo SVRR TMUTE Iccs DIN=0V Vcc=5V, Vp-p=100mV, f=100Hz Upon Changing Delay Time Upon canceling Sleep Mode Sleep Mode - 10 - Typ. 16.0 -0.5 0.3 0.5 Max. 40.0 1.2 1.5 Unit mA dB % - -92 -75 dBV - -40 -25 dB - 525 525 - ms - 12.0 30.0 mA December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 APPLICATION CIRCUITS EASY MODE IN OUT + + + 100P LPF2OUT AGND CC2 TEST LPF2IN CC1 Dl4 DGND REF Dl3 OP2OUT OP1IN Dl2 SLEEP OP1OUT Dl1 +5V 1M 2MHz 0.1µ OP2IN LPF1OUT 2 OSCO LPF1IN OSCI 1 13 DGND AGND SLEEP SW 100µ + VDD VCC 14 100P Setting Delay Time Note: 1. Every Digital GND must be connected to the Analog GND at one Point. 2. When replacing M65831 with PT2396, please take note that PT2396 does not need to connect an external resistor (30 Ohms) to Pin 15 and Pin 21. PT2396 V1.4 - 11 - December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 MCU MODE IN OUT + + + 100P OP2 OUT LPF2 IN LPF2 OUT SLEEP DGND AGND CC2 TEST OP2 IN CC1 OP1 IN SCK IDS OP1 OUT REQ +5V 1M 2MHz 0.1µ 13 DGND AGND SLEEP SW 100µ + REF LPF1 OUT OSCO 2 DATA LPF1 IN OSCI 1 V CC V DD 14 100P Microcomputer 5V Note: 1. Every Digital GND must be connected to the Analog GND at one Point. 2. For the DL4/IDs Pin (Pin No. 7), please refer below: IDS Pin 0 1 PT2396 V1.4 ID1 0 0 ID2 1 1 - 12 - ID3 0 0 ID4 0 1 December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 SURROUND APPLICATION CIRCUIT IN OUT + + + + 1M 2MHz 0.1µ 100P OP2 OUT LPF2 IN LPF2 OUT SLEEP DGND AGND OP2 IN CC2 TEST OP1 IN SCK CC1 OP1 OUT REQ IDS LPF1 OUT OSCO REF LPF1 IN OSCI 2 DATA VCC 1 13 +5V SLEEP SW 100µ VDD 14 100P Microcomputer DGND AGND 5V Notes: 1. Every Digital GND must be connected to the Analog GND at one Point. 2. For the DL4/IDs Pin (Pin No. 7), please refer below: IDS Pin 0 1 PT2396 V1.4 ID1 0 0 ID2 1 1 - 13 - ID3 0 0 ID4 0 1 December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 ORDER INFORMATION Valid Part Number PT2396 PT2396-S PT2396 V1.4 Package Type 24 pins, DIP, 600mil 24 pins, SOP, 300mil - 14 - Top Code PT2396 PT2396-S December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 PACKAGE INFORMATION 24 PINS, DIP, 600 MIL PT2396 V1.4 - 15 - December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC Symbol A A1 A2 B B1 C D D1 E E1 e eA eB L Min. 0.39 3.18 0.356 0.77 0.204 29.3 0.13 15.24 12.32 2.93 PT2396 Nom. 2.54 BAS. 15.24 BAS. - Max. 6.35 4.95 0.558 1.77 0.381 32.7 15.87 14.73 17.78 5.08 Notes: 1. Controlling dimension: MILLIMETER 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimensions A, A1 and L are measured with the package seated in JEDEC Seating Plane Gauge GS-3. 4. “D” & “E1” dimensions, for ceramic packages, include allowance for glass overrun and meniscus and lid to base mismatch. 5. “D” & “E1” dimensions for plastic package, do not includes mold flash or protrusion. Mold flash or protrusions shall not exceed 0.01 inch. (0.25mm). 6. “E” and “eA” measured with the leads constrained to be perpendicular to plane T. 7. “eB” and “eC” are measured at the lead tips with the loads un-constrained. “eC” must be zero or greater. 8. “N” is the maximum quantity of lead positions. (N=24) 9. Corner leads (1, N, N/2, and N/2+1) may be configured as shown in Figure 2. 10. Pointed our rounded leads tips are preferred to ease insertion. 11. For automatic insertion, any rained irregularity on the top surface (step, mess, etc.) shall b symmetrical about the lateral and longitudinal package centerlines. 12. Refer JEDEC MS-011 Variation AA. JEDEC is the trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION. PT2396 V1.4 - 16 - December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 24 PINS, SOP, 300 MIL Symbols A A1 B C D E e H h L α PT2396 V1.4 Min. 2.35 0.10 0.33 0.23 15.20 7.40 Nom. Max. 2.65 0.30 0.51 0.32 15.60 7.60 1.27 bsc. 10.00 0.25 0.40 0° - 17 - 10.65 0.75 1.27 8° December, 2005 Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw Digital Echo/Surround Processor IC PT2396 Notes: 1. Dimensioning and tolerancing per ANSI Y 14.5-1982. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold Flash, protrusion or gate burrs shall not exceed 0.15mm (0.006 in)per side. 3. Dimension “E” does not include interlead flash protrusions. Interlead flash or protrusions shall not exceed 0.25 mm (0.010 in) per side. 4. The chamfer on the body is optional. It is not present, a visual index feature must be located within the crosshatched area. 5. “L” is the length of the terminal for soldering to a substrate. 6. “N” is the number of terminal position. (N=24) 7. The lead width “B” as measured 0.36 mm (0.014 in) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.24 in). 8. Controlling dimension: MILLIMETER. 9. Refer to JEDEC MS-013, Variation AD. JEDEC is the trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION. PT2396 V1.4 - 18 - December, 2005