MITSUBISHI <INTELLIGENT POWER MODULES> PM100RLA060 FLAT-BASE TYPE INSULATED PACKAGE PM100RLA060 FEATURE a) Adopting new 5th generation IGBT (CSTBT) chip, which performance is improved by 1µm fine rule process. For example, typical Vce(sat)=1.5V @Tj=125°C b) I adopt the over-temperature conservation by Tj detection of CSTBT chip, and error output is possible from all each conservation upper and lower arm of IPM. c) New small package Reduce the package size by 10%, thickness by 22% from S-DASH series. d) Current rating of brake part increased. 50% for the current rating of inverter part. • 3φ 100A, 600V Current-sense IGBT type inverter • 50A, 600V Current-sense regenerative brake IGBT • Monolithic gate drive & protection logic • Detection, protection & status indication circuits for, shortcircuit, over-temperature & under-voltage (P-Fo available from upper arm devices) • Acoustic noise-less 11kW class inverter application APPLICATION General purpose inverter, servo drives and other motor controls PACKAGE OUTLINES Dimensions in mm 11 120 106 7 19.75 3.25 16 16 16 3-2 3-2 3-2 16 15.25 2-φ5.5 MOUNTING HOLES 6-2 3 2-φ2.5 55 N 17.5 12 19.75 5 9 13 19 U V W 13.5 B 6-M5 NUTS 22 +– 10.5 12 32.75 23 23 23 Terminal code 19-■0.5 31 13 7 (SCREWING DEPTH) 10.75 12 11.75 14.5 32 P 17.5 1 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. VUPC UFO UP VUP1 VVPC VFO VP VVP1 VWPC WFO 11. 12. 13. 14. 15. 16. 17. 18. 19. WP VWP1 VNC VN1 Br UN VN WN Fo Apr. 2004 MITSUBISHI <INTELLIGENT POWER MODULES> PM100RLA060 FLAT-BASE TYPE INSULATED PACKAGE INTERNAL FUNCTIONS BLOCK DIAGRAM Br Fo Gnd In Gnd VNC WN Fo Vcc Si Out OT Gnd In Gnd VN1 VN Fo Vcc Gnd In Si Out OT Gnd B WP VWP1 VWPC WFO UN Fo Vcc Si Out OT Gnd In Gnd Fo Vcc Si Out OT N Gnd In Gnd Fo Vcc Si Out OT VP VVPC Gnd In Gnd W V VVP1 VFO Fo Vcc Si Out OT UP VUP1 UFO Gnd In Fo Vcc VUPC Gnd Si Out U OT P MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted) INVERTER PART Symbol VCES ±IC ±ICP PC Tj Parameter Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation Junction Temperature Condition VD = 15V, VCIN = 15V TC = 25°C TC = 25°C TC = 25°C (Note-1) Ratings 600 100 200 356 –20 ~ +150 Unit V A A W °C Ratings 600 50 100 228 600 50 –20 ~ +150 Unit V A A W V A °C Ratings Unit 20 V 20 V 20 V 20 mA BRAKE PART Symbol VCES IC ICP PC VR(DC) IF Tj Parameter Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation FWDi Rated DC Reverse Voltage FWDi Forward Current Junction Temperature Condition VD = 15V, VCIN = 15V TC = 25°C TC = 25°C TC = 25°C TC = 25°C TC = 25°C (Note-1) CONTROL PART Symbol Parameter VD Supply Voltage VCIN Input Voltage VFO Fault Output Supply Voltage IFO Fault Output Current Condition Applied between : VUP1-VUPC VVP1-VVPC, VWP1-VWPC, VN1-VNC Applied between : UP-VUPC, VP-VVPC WP-VWPC, UN • VN • WN • Br-VNC Applied between : UFO-VUPC, VFO-VVPC, WFO-VWPC FO-VNC Sink current at UFO, VFO, WFO, FO terminals Apr. 2004 MITSUBISHI <INTELLIGENT POWER MODULES> PM100RLA060 FLAT-BASE TYPE INSULATED PACKAGE TOTAL SYSTEM Parameter Supply Voltage Protected by VCC(PROT) SC VCC(surge) Supply Voltage (Surge) Module Case Operating TC Temperature Storage Temperature Tstg Isolation Voltage Viso Symbol Ratings Condition VD = 13.5 ~ 16.5V, Inverter Part, Tj = +125°C Start Unit 400 V 500 V (Note-1) –20 ~ +100 °C 60Hz, Sinusoidal, Charged part to Base, AC 1 min. –40 ~ +125 2500 °C Vrms Applied between : P-N, Surge value (Note-1) Tc (base plate) measurement point is below. B U V W N P Top view Tc THERMAL RESISTANCES Symbol Condition Parameter Rth(j-c)Q Rth(j-c)F Rth(j-c)Q Rth(j-c)F Rth(j-c)Q Rth(j-c)F Rth(j-c)Q Rth(j-c)F Junction to case Thermal Resistances Rth(c-f) Contact Thermal Resistance Inverter IGBT part (per 1/6) Inverter FWDi part (per 1/6) Brake IGBT part Brake FWDi part Inverter IGBT part (per 1/6) Inverter FWDi part (per 1/6) Brake IGBT part Brake FWDi part Case to fin, (per 1 module) Thermal grease applied (Note-2) (Note-2) (Note-2) (Note-2) (Note-1) (Note-1) (Note-1) (Note-1) (Note-1) Min. — — — — — — — — Limits Typ. — — — — — — — — Max. 0.27* 0.43* 0.42* 0.71* 0.35 0.56 0.55 0.92 — — 0.038 Unit °C/W * If you use this value, Rth(f-a) should be measured just under the chips. (Note-2) Tc (under the chip) measurement point is below. arm axis X Y UP IGBT FWDi 28.0 28.3 1.7 –8.5 VP IGBT FWDi 65.2 65.0 1.7 –8.5 WP IGBT FWDi 87.2 87.0 1.7 –8.5 (unit : mm) UN IGBT FWDi 39.5 39.3 –5.2 6.5 VN IGBT FWDi 53.7 54.0 –5.2 6.5 WN IGBT FWDi 75.7 76.0 –5.2 6.5 Br IGBT 17.5 –10.4 FWDi 18.7 4.0 Bottom view ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted) INVERTER PART Symbol VCE(sat) VEC ton trr tc(on) toff tc(off) ICES Parameter Condition Collector-Emitter Saturation Voltage FWDi Forward Voltage VD = 15V, IC = 100A VCIN = 0V, Pulsed (Fig. 1) –IC = 100A, VD = 15V, VCIN = 15V Switching Time VD = 15V, VCIN = 0V↔15V VCC = 300V, IC = 100A Tj = 125°C Inductive Load Collector-Emitter Cutoff Current VCE = VCES, VCIN = 15V Tj = 25°C Tj = 125°C (Fig. 2) (Fig. 3,4) (Fig. 5) Tj = 25°C Tj = 125°C Min. — — — 0.5 — — — — — — Limits Typ. 1.6 1.5 2.2 1.0 0.2 0.4 1.2 0.5 — — Max. 2.1 2.0 3.3 2.4 0.4 1.0 2.5 1.0 1 10 Unit V V µs mA Apr. 2004 MITSUBISHI <INTELLIGENT POWER MODULES> PM100RLA060 FLAT-BASE TYPE INSULATED PACKAGE BRAKE PART Symbol VCE(sat) VFM ICES Condition Parameter Collector-Emitter Saturation Voltage FWDi Forward Voltage Collector-Emitter Cutoff Current VD = 15V, IC = 50A VCIN = 0V, Pulsed IF = 50A (Fig. 1) VCE = VCES, VCIN = 15V (Fig. 5) Tj = 25°C Tj = 125°C (Fig. 2) Tj = 25°C Tj = 125°C Min. — — — — — Limits Typ. 1.6 1.5 2.2 — — Max. 2.1 2.0 3.3 1 10 Min. — — 1.2 1.7 200 100 Limits Typ. 20 5 1.5 2.0 — — Max. 30 10 1.8 2.3 — — Unit V V mA CONTROL PART Symbol Parameter Condition VN1-VNC VXP1-VXPC ID Circuit Current VD = 15V, VCIN = 15V Vth(ON) Vth(OFF) Input ON Threshold Voltage Input OFF Threshold Voltage SC Short Circuit Trip Level Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN • VN • WN • Br-VNC Inverter part –20≤ Tj ≤ 125°C, VD = 15V (Fig. 3,6) Brake part toff(SC) Short Circuit Current Delay Time VD = 15V Over Temperature Protection VD = 15V Detect Tj of IGBT chip Supply Circuit Under-Voltage Protection –20 ≤ Tj ≤ 125°C Fault Output Current VD = 15V, VFO = 15V (Note-3) Minimum Fault Output Pulse Width VD = 15V (Note-3) OT OTr UV UVr IFO(H) IFO(L) tFO (Fig. 3,6) Trip level Reset level Trip level Reset level Unit mA V A — 0.2 — µs 135 — 11.5 — — — 145 125 12.0 12.5 — 10 — — 12.5 — 0.01 15 °C 1.0 1.8 — V mA ms (Note-3) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to protect it. MECHANICAL RATINGS AND CHARACTERISTICS Symbol — — — Condition Parameter Mounting torque Mounting torque Weight Main terminal Mounting part screw : M5 screw : M5 — Min. 2.5 2.5 — Limits Typ. 3.0 3.0 380 Max. 3.5 3.5 — Unit N•m N•m g RECOMMENDED CONDITIONS FOR USE Symbol VCC Parameter Supply Voltage VD Control Supply Voltage VCIN(ON) VCIN(OFF) Input ON Voltage Input OFF Voltage Condition Applied across P-N terminals Applied between : VUP1-VUPC, VVP1-VVPC VWP1-VWPC, VN1-VNC (Note-4) Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN • VN • WN • Br-VNC fPWM PWM Input Frequency Using Application Circuit of Fig. 8 tdead Arm Shoot-through Blocking Time For IPM’s each input signals Recommended value ≤ 400 Unit V 15 ± 1.5 V ≤ 0.8 ≥ 9.0 V ≤ 20 kHz ≥ 2.0 µs (Fig. 7) (Note-4) With ripple satisfying the following conditions dv/dt swing ≤ ±5V/µs, Variation ≤ 2V peak to peak Apr. 2004 MITSUBISHI <INTELLIGENT POWER MODULES> PM100RLA060 FLAT-BASE TYPE INSULATED PACKAGE PRECAUTIONS FOR TESTING 1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corresponding supply voltage and each input signal should be kept off state. After this, the specified ON and OFF level setting for each input signal should be done. 2. When performing “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above VCES rating of the device. (These test should not be done by using a curve tracer or its equivalent.) P, (U,V,W,B) IN Fo VCIN P, (U,V,W) Ic V IN Fo VCIN –Ic V (15V) (0V) U,V,W, (N) VD (all) U,V,W,B, (N) VD (all) Fig. 1 VCE(sat) Test Fig. 2 VEC, (VFM) Test a) Lower Arm Switching P VCIN (15V) Fo Signal input (Upper Arm) trr CS Ic Vcc Fo Signal input (Lower Arm) VCIN VCE Irr U,V,W 90% 90% N VD (all) b) Upper Arm Switching Ic 10% 10% 10% 10% P tc(on) Fo Signal input (Upper Arm) VCIN VCIN U,V,W CS VCIN (15V) tc(off) Vcc td(on) tr td(off) tf Fo Signal input (Lower Arm) (ton= td(on) + tr) (toff= td(off) + tf) N Ic VD (all) Fig. 3 Switching time and SC test circuit Fig. 4 Switching time test waveform VCIN Short Circuit Current P, (U,V,W,B) A VCIN (15V) Constant Current IN Fo SC Pulse VCE Ic VD (all) U,V,W, (N) Fo toff(SC) Fig. 5 ICES Test Fig. 6 SC test waveform IPM’ input signal VCIN (Upper Arm) 1.5V 0V IPM’ input signal VCIN (Lower Arm) 0V 2V tdead 2V 1.5V 1.5V 2V tdead t t tdead 1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value Fig. 7 Dead time measurement point example Apr. 2004 MITSUBISHI <INTELLIGENT POWER MODULES> PM100RLA060 FLAT-BASE TYPE INSULATED PACKAGE P 20kΩ ≥10µ VUP1 → VD Rfo Fo IF Vcc Fo UP OT OUT In VUPC + – Si U GND GND ≥0.1µ VVP1 Rfo Fo VD Vcc Fo VP Rfo Fo Vcc Fo WP M OT OUT Si In VWPC W GND GND 20kΩ Vcc ≥10µ IF V GND GND VWP1 → Si In VVPC VD OT OUT Fo UN OT OUT Si In GND GND ≥0.1µ N OT 20kΩ → Vcc ≥10µ IF Fo VN OUT Si In GND GND ≥0.1µ 20kΩ → VD Fo WN ≥0.1µ In Vcc Fo Br 1kΩ Fo OT OUT Si GND GND VNC 4.7kΩ IF 5V Vcc ≥10µ IF → VN1 In Rfo B OT OUT Si GND GND : Interface which is the same as the U-phase Fig. 8 Application Example Circuit NOTES FOR STABLE AND SAFE OPERATION ; Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler. Fast switching opto-couplers: tPLH, tPHL ≤ 0.8µs, Use High CMR type. Slow switching opto-coupler: CTR > 100% Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the power supply. Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N terminal. Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line and improve noise immunity of the system. • • • • • • • Apr. 2004