MOTOROLA MC33348D-5

Order this document by MC33348/D
The MC33348 is a monolithic lithium battery protection circuit that is
designed to enhance the useful operating life of a one cell rechargeable
battery pack. Cell protection features consist of internally trimmed charge
and discharge voltage limits, discharge current limit detection with a
delayed shutdown, and a virtually zero current sleepmode state when the
cell is discharged. An additional feature includes an on–chip charge pump
for reduced MOSFET losses while charging or discharging a low cell
voltage battery pack. This protection circuit requires a minimum number of
external components and is targeted for inclusion within the battery pack.
This MC33348 is available in standard SOIC 8 lead surface mount
package.
• Internally Trimmed Charge and Discharge Voltage Limits
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LITHIUM BATTERY
PROTECTION CIRCUIT
FOR
ONE CELL
SMART BATTERY PACKS
SEMICONDUCTOR
TECHNICAL DATA
Discharge Current Limit Detection with Delayed Shutdown
Virtually Zero Current Sleepmode State when Cells are Discharged
Charge Pump for Reduced Losses with a Low Cell Voltage Battery Pack
Dedicated for One Cell Applications
Minimum Components for Inclusion within the Battery Pack
8
Available in a Low Profile Surface Mount Package
Ordering Information shown on following page.
1
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
Typical One Cell Smart Battery Pack
7
VCC
Cell
Voltage
PIN CONNECTIONS
1
8 Charge Pump
Output
Cell Voltage 1
MC33348
7 VCC
Test 2
Ground
3
2
Charge Pump 8
Output
Charge Gate
Drive Output
Charge Gate Drive
5 Common/Discharge
Current Limit
Ground 3
Test
Discharge 4
Charge 6
Gate Drive
Gate Drive
Output
Output
5 Charge
Gate Drive
Common/
Discharge
Current Limit
6
Discharge Gate 4
Drive Output
(Top View)
This device contains 1170 active transistors.
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
MOTOROLA ANALOG IC DEVICE DATA
 Motorola, Inc. 1997
Rev 1
1
MC33348
ORDERING INFORMATION
Device
Charge
Overvoltage
Threshold (V)
Charge
Overvoltage
Hysteresis (mV)
Discharge
Undervoltage
Threshold (V)
Discharge
Current Limit
Threshold (mV)
MC33348D–1
Package
TA = –25°
25° to +85°C
85°C
SO 8
SO–8
400
4 20
4.20
2 25
2.25
MC33348D–2
200
MC33348D–3
400
4 25
4.25
300
2 28
2.28
MC33348D–4
200
MC33348D–5
400
4 35
4.35
2 30
2.30
MC33348D–6
NOTE:
Operating
Temperature Range
200
Additional threshold limit options can be made available. Consult factory for information.
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MAXIMUM RATINGS
Ratings
Symbol
Input Voltage (Measured with Respect to Ground, Pin 3)
Cell Voltage (Pin 1)
Test (Pin 2)
Discharge Gate Drive Output (Pin 4)
Charge Gate Drive Common/Discharge Current Limit (Pin 5)
Charge Gate Drive Output (Pin 6)
VCC (Pin 7)
Charge Pump Output (Pin 8)
VIR
Value
Unit
V
7.5
7.5
18
±11
±11
7.5
10
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Thermal Resistance, Junction–to–Air
D Suffix, SO–8 Plastic Package, Case 751
Operating Junction Temperature (Note 1)
Storage Temperature
°C/W
RθJA
178
TJ
–40 to +150
°C
Tstg
–55 to +150
°C
NOTES: 1. Tested ambient temperature range for the MC33348:
Tlow = –25°C
Thigh = +85°C
2. ESD data available upon request.
2
MOTOROLA ANALOG IC DEVICE DATA
MC33348
ELECTRICAL CHARACTERISTICS (VCC = 4.0 V, TA = 25°C, for min/max values TA is the operating junction temperature range
that applies (Note 1), unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
4.158
4.158
4.208
4.208
4.306
4.306
4.20
4.20
4.25
4.25
4.35
4.35
4.242
4.242
4.293
4.293
4.394
4.394
–
–
–
–
–
–
300
300
300
300
300
300
–
–
–
–
–
–
2.205
2.205
2.234
2.234
2.254
2.254
2.25
2.25
2.28
2.28
2.30
2.30
2.295
2.295
2.326
2.326
2.346
2.346
IIB
–
28
–
µA
t(smpl)
–
1.0
–
s
Idly(dschg)
360
180
360
180
360
180
1.0
400
200
400
200
400
200
2.3
440
220
440
220
440
220
4.0
ms
VO
8.0
10.2
12
V
–
–
17
2.0
20
–
µA
nA
–
1.5
–
V
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VOLTAGE SENSING
Cell Charging Cutoff (Pin 1 to Pin 3)
Overvoltage Threshold, VCell Increasing, TA = 25°C
–1 Suffix
–2 Suffix
–3 Suffix
–4 Suffix
–5 Suffix
–6 Suffix
Overvoltage Hysteresis VCell Decreasing
–1 Suffix
–2 Suffix
–3 Suffix
–4 Suffix
–5 Suffix
–6 Suffix
Vth(OV)
V
VH
mV
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Cell Discharging Cutoff (Pin 1 to Pin 3, TA = 25°C)
Undervoltage Threshold, VCell Decreasing
–1 Suffix
–2 Suffix
–3 Suffix
–4 Suffix
–5 Suffix
–6 Suffix
Vth(UV)
V
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Input Bias Current During Cell Voltage Sample (Pin 1)
Cell Voltage Sampling Rate
CURRENT SENSING
Discharge Current Limit (Pin 3 to Pin 5, TA = 25°C)
Threshold Voltage
–1 Suffix
–2 Suffix
–3 Suffix
–4 Suffix
–5 Suffix
–6 Suffix
Delay
Vth(dschg)
mV
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CHARGE PUMP
Output Voltage (Pin 8, RL ≥ 1010, TA = 25°C)
TOTAL DEVICE
Average Cell Current (TA = 25°C, Battery Pack Unloaded and without
Current Limit Fault)
Operating (VCC = 4.0 V)
Sleepmode (VCC = 2.0 V)
ICC
Minimum Operating Cell Voltage for Logic and Gate Drivers
VCC
NOTE:
1. Tested ambient temperature range for the MC33348:
Tlow = –25°C
Thigh = +85°C
MOTOROLA ANALOG IC DEVICE DATA
3
Figure 2. Discharge Current Limit
Threshold Voltage Change versus Temperature
Figure 1. Charge and Discharge
Threshold Voltage Change versus Temperature
∆ V th(dschg), CURRENT LIMIT THRESHOLD
VOLTAGE CHANGE (%)
1.2
0.8
Maximum Threshold
Charge Limits
0.4
0
Typical Threshold Change
Typical Threshold Change
–0.4
–0.8
–1.2
–40
0
20
40
60
8.0
0
–8.0
–16
100
–40
–20
0
20
80
Figure 4. Gate Drive Output Voltage
versus Supply Voltage
VO , GATE DRIVE OUTPUT VOLTAGE (V)
10
8.0
VCC = 4.15 V
VCC = 3.25 V
6.0
VCC = 2.35 V
0
0.2
0.4
0.6
0.8
CO = 10 nF
Pin 2 = Gnd
RL ≥ 1010 Ω
TA = 25°C
10
8.0
6.0
0
1.0
2.0
3.0
IL, OUTPUT LOAD CURRENT (µA)
VCC, SUPPLY VOLTAGE (V)
Figure 5. Charge Pump Output Voltage
versus Temperature
Figure 6. Supply Current
versus Supply Voltage
102
CO = 10 nF
RL ≥ 1010 Ω
11
VCC = 4.15 V
In Regulation
–20
0
Battery Pack Operating Range
100
3
2
1
TA = 25°C
1 – Battery pack unloaded without
discharge current limit fault.
2 – Battery pack loaded without
discharge current limit fault.
3 – Battery pack loaded or unloaded
with discharge current limit fault.
10–3
20
40
60
80
100
5.0
101
10–2
VCC = 2.35 V
Out of Regulation
4.0
Battery Pack Sleepmode Range
10–1
10
100
12
4.0
1.0
12
8.0
–40
60
Figure 3. Gate Drive Output Voltage
versus Load Current
CO = 10 nF
TA = 25°C
9.0
40
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
4
80
VCC = 4.0 V
TA, AMBIENT TEMPERATURE (°C)
12
4.0
VO , CHARGE PUMP OUTPUT VOLTAGE (V)
–20
16
ICC , SUPPLY CURRENT (µ A)
VO , GATE DRIVE OUTPUT VOLTAGE (V)
∆ V th(OV & UV) , THRESHOLD VOLTAGE CHANGE (%)
MC33348
10–4
0
1.0
2.0
3.0
4.0
5.0
VCC, SUPPLY VOLTAGE (V)
MOTOROLA ANALOG IC DEVICE DATA
MC33348
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PROTECTION CIRCUIT OPERATING MODE TABLE
Outputs
MOSFET Switches
Input Conditions
Cell Status
Circuit Operation
Battery Pack Status
Function
Charge
Q1
Discharge
Q2
Charge
Pump
Both Charge MOSFET Q1 and Discharge MOSFET Q2 are on.
The battery pack is available for charging or discharging.
On
On
Active
Charge Voltage Limit Fault:
VPin 1 ≥ Vth(OV) for 1.0 s
Charge MOSFET Q1 is latched off and the cell is disconnected
from the charging source. An internal current source pull–up is
applied to divider resistors R1 and R2 creating a hysteresis
voltage of VH. The battery pack is available for discharging.
Discharge current limit protection is disabled.
On to Off
On
Active
Charge Voltage Limit Reset:
VPin 1 < (Vth(OV) – VH)
for 1.0 s
Charge MOSFET Q1 will turn on when the voltage across the cell
falls sufficiently to overcome hysteresis voltage VH. This can be
accomplished by applying a load to the battery pack. Discharge
current limit protection is enabled.
Off to On
On
Active
CELL CHARGING/DISCHARGING
Storage or Nominal Operation:
No current or voltage faults
CELL CHARGING FAULT/RESET
CELL DISCHARGING FAULT/RESET
Discharge Current Limit Fault:
VPin 5 ≥ (VPin 3 + Vth(dschg))
for 3.0 ms and
VPin 1 < (Vth(OV) – VH)
for 1.0 ms
Discharge MOSFET Q2 is latched off and the cell is
disconnected from the load. Q2 will remain in the off state as long
as VPin 5 exceeds VPin 3 by ≈ Vth(dschg). The battery pack is
available for charging.
On
On to Off
Active
Discharge Current Limit Reset:
VPin 5 – VPin 3 < Vth(dschg)
The Sense Enable circuit will reset and turn on discharge
MOSFET Q2 when VPin 3 no longer exceeds VPin 5 by
≈ Vth(dschg). This can be accomplished by either disconnecting
the load from the battery pack, or by connecting the battery pack
to the charger.
On
Off to On
Active
Discharge Voltage Limit Fault:
VPin 1 ≤ Vth(UV) for three
consecutive 1.0 s samples
Discharge MOSFET Q2 is latched off, the cells are disconnected
from the load, and the protection circuit enters a low current
sleepmode state. The battery pack is available for charging.
On
On to Off
Disabled
Discharge Voltage Limit Reset:
VPin 3 > (VPin 5 + 0.6 V)
The Sense Enable circuit will reset and turn on discharge
MOSFET Q2 when VPin 3 exceeds VPin 5 by 0.6 V. This can be
accomplished by connecting the battery pack to the charger.
On
Off to On
Active
Disabled
Disabled
Disabled
FAULTY CELL
Discharge Voltage Limit Fault:
VPin 1 ≤ 1.5 V
This condition can happen if the cell is defective (<1.5 V). The
protection circuit logic will not function and the battery pack
cannot be charged.
MOTOROLA ANALOG IC DEVICE DATA
5
MC33348
Figure 7. One Cell Smart Battery Pack
5.1 k
10
Cell
Voltage
MC33348
7
VCC
CI
0.1
1
R1
Cell Voltage
Sample
Switch
Cell
Over/Under
Cell Voltage
Detector
&
Reference
R2
R3
Ground
3
Test
2.0 k
2
Ck
Oscillator
Over/Under
Data Latch
&
Control Logic
Ck
Sense
Enable
En
Charge Pump
Charge Pump
Output
CO
0.01
Discharge
Overcurrent
Detector
Charge/Discharge
Gate Drivers
8 Discharge 4
Charge 6
5
Gate Drive
Gate Drive
Output
Output
Charge
Switch
Discharge
Q1
Switch Q2
Charge
Gate Drive
Common/
Discharge
Current Limit
1.0 M
Components CI is mandatory. Refer to the Battery Pack Application text.
PIN FUNCTION DESCRIPTION
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Pin
Symbol
Description
1
Cell Voltage
This input is connected to the positive terminal of the cell for voltage monitoring. Internally, the Cell
Voltage Sample Switch applies this voltage to a resistor divider where it is compared by the Cell Voltage
Detector to an internal reference.
2
Test
This pin is normally not connected and is used in testing the protection IC. An active low at this input
resets the internal logic and turns on both MOSFET switches. Upon release, the logic becomes active and
the cell voltage is sampled within 1.0 ms.
3
Ground
This is the protection IC ground and all voltage ratings are with respect to this pin.
4
Discharge Gate Drive
Output
This output connects to the gate of discharge switch Q2 allowing it to enable or disable battery pack
discharging.
5
Charge Gate Drive
Common/Discharge
Current Limit
This is a multifunction pin that is used to monitor cell discharge current and to provide a gate turn–off
path for charge switch Q1. A discharge current limit fault is set when the battery pack load causes the
combined voltage drop of charge switch Q1 and discharge switch Q2 to exceed the discharge current limit
threshold voltage, Vth(dschg), with respect to Pin 3.
6
Charge Gate Drive
Output
This output connects to the gate of charge switch Q1 allowing it to enable or disable battery pack
charging.
7
VCC
This pin is the positive supply voltage for the protection IC.
8
Charge Pump Output
This is the charge pump output. A reservoir capacitor is connected from this pin to ground.
6
MOTOROLA ANALOG IC DEVICE DATA
MC33348
INTRODUCTION
The insatiable demand for smaller lightweight portable
electronic equipment has dramatically increased the
requirements of battery performance. Batteries are expected
to have higher energy densities, superior cycle life, be safe in
operation and environmentally friendly. To address these
high expectations, battery manufacturers have invested
heavily in developing rechargeable lithium–based cells.
Today’s most attractive chemistries include lithium–polymer,
lithium–ion, and lithium–metal. Each of these chemistries
require electronic protection in order to constrain cell
operation to within the manufacturers limits.
Rechargeable lithium–based cells require precise charge
and discharge termination limits for both voltage and current
in order to maximize cell capacity, cycle life, and to protect
the end user from a catastrophic event. The termination limits
are not as well defined as with older non–lithium chemistries.
These limits are dependent upon a manufacturer’s particular
lithium chemistry, construction technique, and intended
application. Battery pack assemblers may also choose to
enhance cell capacity at the expense of cycle life. In order to
address these requirements, six versions of the MC33348
protection circuit were developed. These devices feature
charge overvoltage protection, discharge current limit
protection with delayed shutdown, low operating current, a
virtually zero current sleepmode state, and requires few
external components to implement a complete one cell smart
battery pack.
Operating Description
The MC33348 is specifically designed to be placed in the
battery pack where it is continuously powered from a single
lithium cell. In order to maintain cell operation within specified
limits, the protection circuit senses both cell voltage and
discharge current, and correspondingly controls the state of
two N–channel MOSFET switches. These switches, Q1 and
Q2, are placed in series with the negative terminal of the Cell
and the negative terminal of the battery pack. This
configuration allows the protection circuit to interrupt the
appropriate charge or discharge path FET in the event that
either a voltage threshold or the discharge current limit for the
cell has been exceeded.
Figure 8. One Cell Smart Battery Pack
7
1
Cell
MC33348
3
8
Discharge
MOSFET Q2
4
6
5
Charge
MOSFET Q1
MOTOROLA ANALOG IC DEVICE DATA
A functional description of the protection circuit blocks
follows. Refer to the detailed block diagram shown in
Figure 7.
Voltage Sensing
Voltage sensing is accomplished by the use of the Cell
Voltage Sample Switch in conjunction with the Over/Under
Voltage Detector and Reference block. The Sample Switch
applies the cell voltage to the top resistor of an internal
divider string. The voltage at each of the tap points is
sequentially polled and compared to an internal reference. If
a limit has been exceeded, the result is stored in the
Over/Under Data Latch and Control Logic block. The Cell
Voltage Sample Switch is gated on for a 1.0 ms period at a
one second repetition rate. This low duty cycle sampling
technique reduces the average load current that the divider
presents across the cell, thus extending the useful battery
pack capacity. The cell voltage limits are tested in the
following sequence:
Figure 9. Cell Sensing Sequence
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Polling
Sequence
Time
(ms)
Tested
Limit
1
0.5
Overvoltage
2
0.5
Undervoltage
By incorporating this polling technique with a single
comparator and voltage divider, a significant reduction of
circuitry and trim elements is achieved. This results in a
smaller die size, lower cost, and reduced operating current.
Figure 10. Cell Voltage Limit Sampling
From
Cell Voltage
Sample Switch
Cell Voltage
Over/Under
Cell Voltage
Detector
&
Reference
To
Cell Negative
Terminal
Discharge Voltage
Threshold
R1
Charge Voltage
Threshold
R2
Cell Voltage
Return
R3
+
Cell
Voltage
–
The cell charge and discharge voltage limits are controlled
by the values selected for the internal resistor divider string
and the comparator input threshold. As the battery pack
reaches full charge, the Cell Voltage Detector will sense an
overvoltage fault condition when the cell exceeds the
designed overvoltage limit. The fault information is stored in
a data latch and charge MOSFET Q1 is turned off,
disconnecting the battery pack from the charging source. An
internal current source pull–up is then applied to lower tap of
the divider, creating a hysteresis voltage. As a result of an
overvoltage fault, the battery pack is available for
discharging only.
The overvoltage fault is reset by applying a load to the
battery pack. As the voltage across the cell falls below the
hysteresis level, charge MOSFET Q1 will turn on and the
current source pull–up will turn off. The battery pack will now
be available for charging or discharging.
7
MC33348
As the load eventually depletes the battery pack charge,
the Cell Voltage Detector will sense an undervoltage fault
condition when the cell falls below the designed undervoltage
limit. After three consecutive faults are detected, discharge
MOSFET Q2 is turned off, disconnecting the battery pack
from the load. The protection circuit will now enter a low
current sleepmode state. Refer to Figure 6. As a result of the
undervoltage fault, the battery pack is available for charging
only. The typical cutoff thresholds and hysteresis voltage are
shown in Figure 11.
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Figure 11. Cutoff and Hysteresis Limits
Device
Suffix
Charging
Cutoff
(V)
Hysteresis
(mV)
Disharging
Cutoff
(V)
–1, –2
4.20
300
2.25
–3, –4
4.25
300
2.28
–5, –6
4.35
300
2.30
The undervoltage logic is designed to automatically reset
if less than three consecutive faults appear. This helps to
prevent a premature disconnection of the load during high
current pulses when the battery pack charge is close to
being depleted.
The undervoltage fault is reset by applying charge current
to the battery pack. When the voltage on Pin 3 exceeds Pin 5
by 0.6 V, discharge MOSFET Q2 will turn on. The battery
pack will now be available for charging or discharging.
Figure 12. Additional Discharge Current Limit Delay
Current Sensing
Discharge current limit protection is internally provided by
the MC33348. As the battery pack discharges, Pins 5 and 3
sense the voltage drop across MOSFETs Q1 and Q2. A
discharge current limit fault is detected if the voltage at Pin 5
is greater than Pin 3 by 400 mV for –1, –3 and –5 suffix
devices, or 200 mV for –2, –4 and –6 suffix devices. The fault
information is stored in a data latch and discharge MOSFET
Q2 is turned off, disconnecting the battery pack from the load.
As a result of the discharge current fault, the battery pack is
available for charging only. The discharge current limit is
given by:
V
I
+ R th(dschg) + R
Lim(dschg)
Lim(dschg)
V
th(dschg)
R
DS(on)Q1
DS(on)Q2
)
The discharge current fault is reset by either disconnecting
the load from the battery pack, or by connecting the battery
pack to the charger. When the voltage on Pin 5 no longer
exceeds Pin 3 by approximately Vth(dschg), the Sense Enable
circuit will turn on discharge MOSFET Q2.
Figure 13. Power Supply Decoupling
C
10
R
5.1 k
7
1
Cell
MC33348
MC33348
3
3
8
Cdly
4
6
5
Rdly
The discharge current limit shutdown delay time is typically
3.0 ms. This time can be extended with the addition of
components Rdly and Cdly. With an Rdly of 5.1 k and Cdly of 10
µF, the current limit shutdown time is extended to 40 ms.
The additional discharge current limit delay circuitry must
not be used if the anticipated open–circuit charger voltage
will exceed 6.0 V. When the charger causes the battery pack
input to exceed 6.0 V, additional current will flow out of Pin 5,
creating a voltage drop across resistor Rdly. This voltage drop
causes the source of MOSFET Q1 to fall below it’s gate,
allowing it to unexpectedly turn back on.
8
In order to guarantee proper discharge current limit
operation when the battery pack output is shorted, power
must be made available to the MC33348. This can be
accomplished by decoupling the VCC input with the R/C
component values shown above. The capacitor value must
be increased to 100 µF if the discharge current limit
shutdown delay time is extended to 40 ms as shown in
Figure 12. A small signal schottky diode can be used in place
of R for enhanced short circuit operation. The diode cathode
is connected to Pin 7 and C, and the anode is connected to
the positive terminal of the cell. The schottky diode solution
may be a better choice in applications that have a charger
with a relatively high open circuit voltage. These components
can be deleted if operation of the discharge current limit is not
required when the battery pack output is shorted.
MOTOROLA ANALOG IC DEVICE DATA
MC33348
As previously stated in the voltage sensing operating
description, charge MOSFET Q1 is held off during an
overvoltage fault condition. When this condition is present,
the discharge current limit protection function is internally
disabled. This is required, since the voltage across Q1, in the
off state, would exceed the current sense threshold. This
would cause Q2 to turn off as well, preventing both charging
and discharging of the cell. Discharge current limit protection
is enabled whenever an overvoltage fault is not present.
The discharge current protection circuit contains a built in
response delay of 3.0 ms. This helps to prevent fault
activation when the battery pack is subjected to pulsed
currents during discharging. An additional current sense
delay can be added as shown in Figure 12. If the battery pack
is subjected to extremely high discharge current pulses or is
shorted, the VCC pin must be decoupled from the cell. This is
required so that the protection circuit will have sufficient
operating voltage during the load transient, to ensure turn off
of discharge MOSFET Q2. Figure 13 shows the placement of
decoupling components.
Charge Pump and MOSFET Switches
The MC33348 contains an on chip Charge Pump to
ensure that the MOSFET switches are fully enhanced for
reduced power losses. An external reservoir capacitor
normally connects from the Charge Pump output to ground,
Pins 8 and 3. The capacitor value is not critical and is usually
within the range of 10 nF to 100 nF. The Charge Pump output
is regulated at 10.2 V allowing the use of the more
economical logic level MOSFETs. The main requirement in
selecting a particular type of MOSFET switch is to consider
the desired on–resistance at the lowest anticipated operating
voltage of the battery pack. A table of small outline surface
mount devices is given in Figure 14. When using extremely
low threshold MOSFETs, it may be desirable to disable the
Charge Pump so that the maximum gate to source voltage is
not exceeded. This can be accomplished by connecting Pin 6
to Pin 5, and will result in an additional cell drain current of
approximately 8.0 µA.
Testing
A test pin is provided in order to speed up device and
battery pack testing. By grounding Pin 2, the internal logic is
held in a reset state and both MOSFET switches are turned
on. Upon release, the logic becomes active and the cell
voltage is polled within 1.0 ms.
Battery Pack Application
The one cell smart battery pack application shown in
Figure 7 contains a capacitor labeled CI that connects
directly across the battery pack terminals. This component
prevents excessive currents from flowing into the MC33348
when the battery pack terminals are shorted or arced, and is
mandatory. Capacitor CI is a 100 nF ±20% ceramic leaded
or surface mount type. It must be placed directly across the
battery pack plus and minus terminals with extremely short
lead lengths (≤1/16″).
In applications where inordinately low leakage MOSFETs
are used, the protection circuit may take a considerable
amount of time to reset from an overcurrent fault after the
load is removed. This situation can be remedied by providing
a small leakage path for charging CI, thus allowing Pin 5 to
rapidly fall below the discharge current limit threshold. A
1.0 megohm resistor placed across the MOSFET switches
accomplishes this task with a minimum increase in cell
discharge current when the battery pack is connected to a
load.
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Figure 14. Small Outline Surface Mount MOSFET Switches
Device
Type
On–Resistance (Ω) versus Gate to Source Voltage (V)
2.5 V
3.0 V
4.0 V
5.0 V
6.0 V
7.5 V
9.0 V
MMFT3055VL
–
–
–
0.120 Ω
0.115 Ω
0.108 Ω
0.100 Ω
MMDF3N03HD
–
0.525 Ω
0.080 Ω
0.065 Ω
0.063 Ω
0.062 Ω
0.060 Ω
MMDF4N01HD
0.047 Ω
0.042 Ω
0.037 Ω
0.035 Ω
0.034 Ω
0.033 Ω
0.033 Ω
MMSF5N02HD
–
0.065 Ω
0.023 Ω
0.021 Ω
0.020 Ω
0.018 Ω
0.018 Ω
MMDF6N02HD
0.043 Ω
0.035 Ω
0.029 Ω
0.028 Ω
0.026 Ω
0.025 Ω
0.023 Ω
MOTOROLA ANALOG IC DEVICE DATA
9
MC33348
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE S
D
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
C
8
5
0.25
H
E
M
B
M
1
4
h
B
e
X 45 _
q
A
C
SEATING
PLANE
L
0.10
A1
B
0.25
10
M
C B
S
A
S
DIM
A
A1
B
C
D
E
e
H
h
L
q
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.35
0.49
0.18
0.25
4.80
5.00
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
MOTOROLA ANALOG IC DEVICE DATA
MC33348
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
MOTOROLA ANALOG IC DEVICE DATA
11
MC33348
Mfax is a trademark of Motorola, Inc.
How to reach us:
USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;
P.O. Box 5405, Denver, Colorado 80217. 1–303–675–2140 or 1–800–441–2447
JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1,
Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488
Customer Focus Center: 1–800–521–6274
Mfax: [email protected] – TOUCHTONE 1–602–244–6609
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
Motorola Fax Back System
– US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
– http://sps.motorola.com/mfax/
HOME PAGE: http://motorola.com/sps/
12
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MC33348/D
MOTOROLA ANALOG IC DEVICE
DATA