IRFNL210B IRFNL210B 200V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switching DC/DC converters, switch mode power supplies, DC-AC converters for uninterrupted power supply and motor control. • • • • • • 1.0A, 200V, RDS(on) = 1.5Ω @VGS = 10 V Low gate charge ( typical 7.2 nC) Low Crss ( typical 6.8 pF) Fast switching 100% avalanche tested Improved dv/dt capability D ! " G! ! " " " TO-92L ! IRFNL Series GDS Absolute Maximum Ratings Symbol VDSS ID S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) IDM Drain Current - Pulsed (Note 1) IRFNL210B 200 Units V 1.0 A 0.93 A 10 A ± 30 V 40 mJ VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) IAR Avalanche Current (Note 1) 3.3 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 0.031 5.0 3.1 0.025 -55 to +150 mJ V/ns W W/°C °C 300 °C dv/dt PD TJ, TSTG TL (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJL Parameter Thermal Resistance, Junction-to-Lead ©2002 Fairchild Semiconductor Corporation Typ -- Max 40 Units °C/W Rev. A, December 2002 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 200 -- -- V -- 0.2 -- V/°C VDS = 200 V, VGS = 0 V -- -- 10 µA VDS = 160 V, TC = 125°C -- -- 100 µA Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA 2.0 -- 4.0 V -- 1.16 1.5 Ω -- 2.4 -- S -- 175 225 pF -- 30 40 pF -- 6.8 9.0 pF -- 5.2 20 ns -- 35 80 ns -- 20 50 ns Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C IDSS IGSSF IGSSR Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.5 A gFS Forward Transconductance VDS = 40 V, ID = 1.0 A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 100 V, ID = 3.3 A, RG = 25 Ω (Note 4, 5) VDS = 160 V, ID = 3.3 A, VGS = 10 V (Note 4, 5) -- 25 60 ns -- 7.2 9.3 nC -- 1.3 -- nC -- 3.5 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 3.3 A ISM -- -- 10 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 3.3 A Drain-Source Diode Forward Voltage -- -- 1.5 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 3.3 A, dIF / dt = 100 A/µs (Note 4) -- 106 -- ns -- 0.37 -- µC Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 5.5mH, IAS = 3.3A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 3.3A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2002 Fairchild Semiconductor Corporation Rev. A, December 2002 IRFNL210B Electrical Characteristics IRFNL210B Typical Characteristics 1 1 10 10 VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V ID, Drain Current [A] ID, Drain Current [A] Top : 0 10 0 10 o 150 C o 25 C ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ -1 10 ※ Notes : 1. VDS = 40V 2. 250μ s Pulse Test o -55 C -1 -1 0 10 10 1 10 2 10 4 Figure 1. On-Region Characteristics 8 1 10 IDR, Reverse Drain Current [A] 6 VGS = 10V VGS = 20V 4 2 0 10 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test ※ Note : TJ = 25℃ -1 0 0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 500 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 12 VDS = 40V Ciss 300 Coss 200 Crss ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 100 VGS, Gate-Source Voltage [V] 10 400 Capacitance [pF] 10 Figure 2. Transfer Characteristics 8 RDS(ON) [Ω ], Drain-Source On-Resistance 6 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] VDS = 100V VDS = 160V 8 6 4 2 ※ Note : ID = 3.3 A 0 0 -1 10 0 10 1 10 0 2 4 6 8 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics ©2002 Fairchild Semiconductor Corporation Rev. A, December 2002 IRFNL210B Typical Characteristics (Continued) 1.2 3.0 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 0.5 A 0.5 150 0.0 -100 200 -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation vs Temperature 3.5 Operation in This Area is Limited by R DS(on) 1 3.0 100 µs 0 1s 10 100 ms 10 ms 2.5 1 ms ID, Drain Current [A] ID, Drain Current [A] 10 2.0 DC 1.5 -1 10 1.0 ※ Notes : -2 10 o 0.5 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse 0.0 25 -3 10 0 1 10 50 2 10 10 VDS, Drain-Source Voltage [V] (t), T h e rm a l R e s p o n s e 2 10 1 100 125 150 Figure 10. Maximum Drain Current vs Case Temperature Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [℃] D = 0 .5 0 .2 0 .1 0 .0 5 θ JC 10 0 .0 2 0 ※ N o te s : 1 . Z θ J L (t) = 4 0 ℃ /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C (t) Z 0 .0 1 s in g le p u ls e 10 -1 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 t 1 , S q u a re W a v e P u ls e D u r a tio n [s e c ] Figure 11. Transient Thermal Response Curve ©2002 Fairchild Semiconductor Corporation Rev. A, December 2002 IRFNL210B Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 10V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp ©2002 Fairchild Semiconductor Corporation ID (t) VDS (t) VDD tp Time Rev. A, December 2002 IRFNL210B Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2002 Fairchild Semiconductor Corporation Rev. A, December 2002 IRFNL210B Package Dimensions TO-92L 0.70MAX. 1.00 ±0.10 1.70 ±0.20 13.50 ±0.40 8.00 ±0.20 4.90 ±0.20 0.80 ±0.10 1.00MAX. 0.50 ±0.10 1.27TYP [1.27 ±0.20] 0.45 ±0.10 3.90 ±0.20 0.45 ±0.10 3.90 ±0.20 1.45 ±0.20 2.54 TYP Dimensions in Millimeters ©2002 Fairchild Semiconductor Corporation Rev. A, December 2002 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT™ ActiveArray™ FACT Quiet series™ Bottomless™ FAST® FASTr™ CoolFET™ CROSSVOLT™ FRFET™ GlobalOptoisolator™ DOME™ EcoSPARK™ GTO™ E2CMOS™ HiSeC™ EnSigna™ I2C™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ ImpliedDisconnect™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET® VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2002 Fairchild Semiconductor Corporation Rev. I1