TM FQT5P10 100V P-Channel MOSFET General Description Features These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control. • • • • • -1.0A, -100V, RDS(on) = 1.05Ω @VGS = -10 V Low gate charge ( typical 6.3 nC) Low Crss ( typical 18 pF) Fast switching Improved dv/dt capability D D S G G SOT-223 FQT Series Absolute Maximum Ratings Symbol VDSS ID S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 70°C) IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) dv/dt PD TJ, TSTG TL - Pulsed FQT5P10 -100 Units V -1.0 A -0.8 A -4.0 A ± 30 V (Note 2) 55 mJ (Note 1) -1.0 A (Note 1) 0.2 -6.0 2.0 0.016 -55 to +150 mJ V/ns W W/°C °C 300 °C (Note 1) (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJA Parameter Thermal Resistance, Junction-to-Ambient * Typ -- Max 62.5 Units °C/W * When mounted on the minimum pad size recommended (PCB Mount) ©2002 Fairchild Semiconductor Corporation Rev. B, August 2002 FQT5P10 QFET Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units -100 -- -- V -- -0.1 -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = -250 µA, Referenced to 25°C IDSS IGSSF IGSSR VDS = -100 V, VGS = 0 V -- -- -1 µA VDS = -80 V, TC = 125°C -- -- -10 µA Gate-Body Leakage Current, Forward VGS = -30 V, VDS = 0 V -- -- -100 nA Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V -- -- 100 nA Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA -2.0 -- -4.0 V RDS(on) Static Drain-Source On-Resistance VGS = -10 V, ID = -0.5 A -- 0.82 1.05 Ω gFS Forward Transconductance VDS = -40 V, ID = -0.5 A -- 1.4 -- S -- 190 250 pF -- 70 90 pF -- 18 25 pF ns (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = -25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = -50 V, ID = -4.5 A, RG = 25 Ω (Note 4, 5) VDS = -80 V, ID = -4.5 A, VGS = -10 V (Note 4, 5) -- 9 30 -- 70 150 ns -- 12 35 ns -- 30 70 ns -- 6.3 8.2 nC -- 1.7 -- nC -- 3.0 -- nC A Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- -1.0 ISM Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = -1.0 A Drain-Source Diode Forward Voltage -- -- -4.0 A --- -85 -4.0 -- V ns -- 0.27 -- µC VSD trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -4.5 A, dIF / dt = 100 A/µs (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 83mH, IAS = -1.0A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ -4.5A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2002 Fairchild Semiconductor Corporation Rev. B, August 2002 FQT5P10 Electrical Characteristics FQT5P10 Typical Characteristics VGS -15.0 V -10.0 V -8.0 V -7.0 V -6.5 V -5.5 V -5.0 V Bottom : -4.5 V 0 -I D, Drain Current [A] 10 -I D , Drain Current [A] Top : -1 10 0 10 150℃ 25℃ ※ Note : 1. 250μ s Pulse Test 2. TC = 25℃ -2 10 ※ Notes : 1. VDS = -40V 2. 250μ s Pulse Test -55℃ -1 -1 0 10 10 1 10 2 10 4 6 8 10 -VGS , Gate-Source Voltage [V] -VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics VGS = - 10V 2.0 -I DR , Reverse Drain Current [A] RDS(on) [ Ω ], Drain-Source On-Resistance 2.5 VGS = - 20V 1.5 1.0 0.5 ※ Note : TJ = 25℃ 0.0 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test -1 0 3 6 9 12 10 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -ID , Drain Current [A] -VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 500 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 450 400 Coss 350 Ciss VDS = -50V ※ Notes : 300 1. VGS = 0 V 2. f = 1 MHz 250 200 Crss 150 100 50 0 -1 10 VDS = -20V 10 -V GS , Gate-Source Voltage [V] Capacitance [pF] 0 10 VDS = -80V 8 6 4 2 ※ Note : ID = -4.5 A 0 0 10 1 10 -VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2002 Fairchild Semiconductor Corporation 0 1 2 3 4 5 6 7 8 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. B, August 2002 FQT5P10 Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance -BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = -250 μ A 0.9 0.8 -100 -50 0 50 100 2.0 1.5 1.0 ※ Notes : 1. VGS = -10 V 2. ID = -0.5 A 0.5 150 0.0 -100 200 -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 1.0 1 Operation in This Area is Limited by R DS(on) 10 -ID, Drain Current [A] -ID, Drain Current [A] 0.8 100 µs 1 ms 10 ms 0 10 0.6 100 ms DC 0.4 -1 10 ※ Notes : 0.2 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -2 10 -1 10 0 1 10 0.0 25 2 10 10 50 75 Figure 9. Maximum Safe Operating Area 125 150 Figure 10. Maximum Drain Current vs. Case Temperature 2 D = 0 .5 10 ※ N o te s : 1 . Z θ J C( t ) = 6 2 . 5 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 / t 2 3 . T J M - T C = P D M * Z θ J C( t ) 0 .2 1 0 .1 0 .0 5 0 .0 2 10 0 PDM 0 .0 1 θ JC (t), T h e rm a l R e s p o n s e 10 100 TC, Case Temperature [℃] -VDS, Drain-Source Voltage [V] t1 Z s in g le p u ls e 10 t2 -1 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11. Transient Thermal Response Curve ©2002 Fairchild Semiconductor Corporation Rev. B, August 2002 FQT5P10 Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V -10V 300nF VDS VGS Qgs Qgd DUT -3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL t on VDD VGS RG td(on) VGS t off tr td(off) tf 10% DUT -10V VDS 90% Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS tp ID RG VDD DUT -10V tp ©2002 Fairchild Semiconductor Corporation VDD Time VDS (t) ID (t) IAS BVDSS Rev. B, August 2002 FQT5P10 Peak Diode Recovery dv/dt Test Circuit & Waveforms + VDS DUT _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Compliment of DUT (N-Channel) VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V Body Diode Reverse Current IRM di/dt IFM , Body Diode Forward Current VDS ( DUT ) VSD Body Diode Forward Voltage Drop VDD Body Diode Recovery dv/dt ©2002 Fairchild Semiconductor Corporation Rev. B, August 2002 FQT5P10 Package Dimensions 3.00 ±0.10 4.60 ±0.25 6.50 ±0.20 (0.89) (0.95) (0.46) 1.60 ±0.20 2.30 TYP 0.70 ±0.10 (0.95) 10 +0.10 0.25 –0.05 0°~ 7.00 ±0.30 (0.60) +0.04 0.06 –0.02 (0.60) 3.50 ±0.20 1.75 ±0.20 MAX1.80 0.65 ±0.20 0.08MAX SOT-223 ° Dimensions in Millimeters ©2002 Fairchild Semiconductor Corporation Rev. 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FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems 2. A critical component is any component of a life support which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be or (b) support or sustain life, or (c) whose failure to perform reasonably expected to cause the failure of the life support when properly used in accordance with instructions for use device or system, or to affect its safety or effectiveness. provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2002 Fairchild Semiconductor Corporation Rev. I1