® FQA36P15 150V P-Channel MOSFET General Description Features These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as audio amplifier, high efficiency switching DC/DC converters, and DC motor control. • • • • • • • -36A, -150V, RDS(on) = 0.09Ω @VGS = -10 V Low gate charge ( typical 81 nC) Low Crss ( typical 110 pF) Fast switching 100% avalanche tested Improved dv/dt capability 175°C maximum junction temperature rating S ! ● ● G! ▶ ▲ ● TO-3P Absolute Maximum Ratings Symbol VDSS ID ! FQA Series G DS D TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) dv/dt PD TJ, TSTG TL - Pulsed FQA36P15 -150 Units V -36 A -25.5 A -144 A ± 30 V (Note 2) 1400 mJ (Note 1) -36 A (Note 1) 29.4 -5.0 294 1.96 -55 to +175 mJ V/ns W W/°C °C 300 °C (Note 1) (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case Typ -- RθCS Thermal Resistance, Case-to-Sink RθJA Thermal Resistance, Junction-to-Ambient ©2003 Fairchild Semiconductor Corporation Max 0.51 Units °C/W 0.24 -- °C/W -- 40 °C/W Rev. B, December 2003 FQA36P15 QFET Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units -150 -- -- V -- -0.13 -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = -250 µA, Referenced to 25°C IDSS IGSSF IGSSR VDS = -150 V, VGS = 0 V -- -- -10 µA VDS = -120 V, TC = 150°C -- -- -100 µA Gate-Body Leakage Current, Forward VGS = -25 V, VDS = 0 V -- -- -100 nA Gate-Body Leakage Current, Reverse VGS = 25 V, VDS = 0 V -- -- 100 nA -2.0 -- -4.0 V -- 0.076 0.09 Ω -- 19.5 -- S -- 2550 3320 pF -- 710 920 pF -- 110 140 pF ns Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA RDS(on) Static Drain-Source On-Resistance VGS = -10 V, ID = -18 A gFS Forward Transconductance VDS = -40 V, ID = -18 A (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = -25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = -75 V, ID = -36 A, RG = 25 Ω (Note 4, 5) VDS = -120 V, ID = -36 A, VGS = -10 V (Note 4, 5) -- 50 110 -- 350 710 ns -- 155 320 ns -- 150 310 ns -- 81 105 nC -- 19 -- nC -- 42 -- nC A Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- -36 ISM -- -- -144 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = -36 A Drain-Source Diode Forward Voltage -- -- -4.0 V trr Reverse Recovery Time -- 198 -- ns Qrr Reverse Recovery Charge -- 1.45 -- µC VGS = 0 V, IS = -36 A, dIF / dt = 100 A/µs (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 1.45mH, IAS = -36A, VDD = -50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ -36A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2003 Fairchild Semiconductor Corporation Rev. B, December 2003 FQA36P15 Electrical Characteristics FQA36P15 Typical Characteristics VGS -15.0 V -10.0 V -8.0 V -7.0 V -6.0 V -5.5 V -5.0 V Bottom : -4.5 V Top : -ID, Drain Current [A] 1 10 2 10 o -I D, Drain Current [A] 2 10 0 10 175 C 1 10 o 25 C o -55 C 0 10 ※ Notes : 1. VDS = -40V 2. 250μ s Pulse Test ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ -1 10 -1 -1 0 10 10 1 10 10 2 4 6 8 10 -VGS, Gate-Source Voltage [V] -VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 0.4 2 0.3 -I DR , Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 10 VGS = -10V 0.2 VGS = -20V 0.1 ※ Note : TJ = 25℃ 1 10 175℃ 0 25℃ 10 ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test -1 0.0 0 20 40 60 80 100 120 140 10 160 0.0 0.5 1.0 -ID, Drain Current [A] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Ciss ※ Note ; 1. VGS = 0 V 2. f = 1 MHz Crss 2000 1000 0 -1 10 0 10 1 10 -VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2003 Fairchild Semiconductor Corporation -V GS , Gate-Source Voltage [V] Capacitance [pF] 12 3.0 3.5 4.0 VDS = -30V Coss 4000 3000 2.5 14 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 7000 5000 2.0 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 8000 6000 1.5 -VSD, Source-Drain voltage [V] VDS = -75V 10 VDS = -120V 8 6 4 2 ※ Note : ID = -36A 0 0 10 20 30 40 50 60 70 80 90 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. B, December 2003 FQA36P15 Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance -BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = -250 μ A 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Notes : 1. VGS = -10 V 2. ID = -18 A 0.5 0.0 -100 200 -50 o 50 100 150 200 TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 40 3 10 Operation in This Area is Limited by R DS(on) 35 2 30 100 µs 10 1 ms -I D, Drain Current [A] -I D, Drain Current [A] 0 o TJ, Junction Temperature [ C] 10 ms DC 1 10 ※ Notes : 0 10 25 20 15 10 o 1. TC = 25 C o 2. TJ = 175 C 3. Single Pulse 5 -1 10 0 1 10 0 25 2 10 10 50 Figure 9. Maximum Safe Operating Area 100 125 150 175 Figure 10. Maximum Drain Current vs. Case Temperature 0 D = 0 .5 10 ※ N o te s : 1 . Z θ J C( t ) = 0 . 5 1 ℃ / W M a x . 2 . D u ty F a c to r, D = t1/t2 3 . T J M - T C = P D M * Z θ J C( t ) 0 .2 -1 0 .1 0 .0 5 θ JC (t), T h e rm a l R e s p o n s e 10 75 TC, Case Temperature [℃] -VDS, Drain-Source Voltage [V] PDM Z 0 .0 2 0 .0 1 10 t1 t2 -2 s in g le p u ls e 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2003 Fairchild Semiconductor Corporation Rev. B, December 2003 FQA36P15 Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V -10V 300nF VDS VGS Qgs Qgd DUT -3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL t on VDD VGS RG td(on) VGS t off tr td(off) tf 10% DUT -10V VDS 90% Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS tp ID RG VDD DUT -10V tp ©2003 Fairchild Semiconductor Corporation VDD Time VDS (t) ID (t) IAS BVDSS Rev. B, December 2003 FQA36P15 Peak Diode Recovery dv/dt Test Circuit & Waveforms + VDS DUT _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Compliment of DUT (N-Channel) VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V Body Diode Reverse Current IRM di/dt IFM , Body Diode Forward Current VDS ( DUT ) VSD Body Diode Forward Voltage Drop VDD Body Diode Recovery dv/dt ©2003 Fairchild Semiconductor Corporation Rev. B, December 2003 FQA36P15 Package Dimensions TO-3P 15.60 ±0.20 3.00 ±0.20 3.80 ±0.20 +0.15 1.00 ±0.20 18.70 ±0.20 23.40 ±0.20 19.90 ±0.20 1.50 –0.05 16.50 ±0.30 2.00 ±0.20 9.60 ±0.20 4.80 ±0.20 3.50 ±0.20 13.90 ±0.20 ø3.20 ±0.10 12.76 ±0.20 13.60 ±0.20 1.40 ±0.20 +0.15 5.45TYP [5.45 ±0.30] 5.45TYP [5.45 ±0.30] 0.60 –0.05 Dimensions in Millimeters ©2003 Fairchild Semiconductor Corporation Rev. B, December 2003 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST® FASTr™ Bottomless™ FRFET™ CoolFET™ CROSSVOLT™ GlobalOptoisolator™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ E2CMOS™ EnSigna™ ImpliedDisconnect™ FACT™ ISOPLANAR™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic® TINYOPTO™ TruTranslation™ UHC™ UltraFET® VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems 2. A critical component is any component of a life support which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be or (b) support or sustain life, or (c) whose failure to perform reasonably expected to cause the failure of the life support when properly used in accordance with instructions for use device or system, or to affect its safety or effectiveness. provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2003 Fairchild Semiconductor Corporation Rev. I5