Preliminary Revised May 2001 FSTU16211 24-Bit Bus Switch with −2V Undershoot Protection (Preliminary) General Description Features The Fairchild Switch FSTU16211 provides 24-bits of highspeed CMOS TTL-compatible bus switching. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. ■ Undershoot hardened to −2V (A and B Ports) The device is organized as a 12-bit or 24-bit bus switch. When OE1 is LOW, the switch is ON and Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected to Port 2B. The A and B Ports are protected against undershoot to support an extended range to 2.0V below ground. Fairchild’s integrated Undershoot Hardened Circuit (UHC) senses undershoot at the I/O and responds by preventing voltage differentials from developing and turning the switch on. ■ Slower output enable times to prevent signal disruption ■ 4Ω switch connection between two ports ■ Minimal propagation delay through the switch ■ Low lCC ■ Zero bounce in flow-through mode ■ Control inputs compatible with TTL level ■ See Applications Note AN-5008 for details Ordering Code: Order Number Package Number Package Description FSTU16211MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. UHC is a trademark of Fairchild Semiconductor Corporation. © 2001 Fairchild Semiconductor Corporation DS500389 www.fairchildsemi.com FSTU16211 24-Bit Bus Switch with −2V Undershoot Protection (Preliminary) May 2001 FSTU16211 Preliminary Logic Diagram Connection Diagram Truth Table Pin Descriptions Inputs OE1 Inputs/Outputs OE2 1A, 1B L L 1A = 1B 2A = 2B L H 1A = 1B Z H L Z 2A = 2B H H Z Z www.fairchildsemi.com Pin Name Description OE1, OE2 Bus Switch Enables 1A, 2A Bus A 1B, 2B Bus B 2A, 2B 2 Preliminary Supply Voltage (VCC) −0.5V to +7.0V DC Switch Voltage (VS) (Note 2) −0.5V to +7.0V Recommended Operating Conditions (Note 4) Power Supply Operating (VCC) DC Input Control Pin Voltage (VIN) (Note 3) −0.5V to +7.0V DC Input Diode Current (lIK) VIN < 0V −50 mA DC Output Current (IOUT) Storage Temperature Range (TSTG) 0V to 5.5V Output Voltage (VOUT) 0V to 5.5V Input Rise and Fall Time (tr, tf) 128 mA Switch Control Input +/− 100 mA DC VCC/GND Current (ICC/IGND) 4.0V to 5.5V Input Voltage (VIN) 0 ns/V to 5 ns/V Switch I/O −65°C to +150 °C 0 ns/V to DC -40 °C to +85 °C Free Air Operating Temperature (TA) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: VS is the voltage observed/applied at either the A or B Ports across the switch. Note 3: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 4: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VCC (V) TA = −40 °C to +85 °C Min Typ (Note 5) Max −1.2 4.5 Units IIN = −18 mA VIK Clamp Diode Voltage VIH HIGH Level Input Voltage 4.0–5.5 VIL LOW Level Input Voltage 4.0–5.5 0.8 V II Input Leakage Current 5.5 ±1.0 µA 0 ≤ VIN ≤ 5.5V 0 10 µA VIN = 5.5V ±1.0 µA 0 ≤ A, B ≤ VCC VIN = 0V, IIN = 64 mA 2.0 V Conditions V IOZ OFF-STATE Leakage Current 5.5 RON Switch On Resistance 4.5 4 7 Ω (Note 6) 4.5 4 7 Ω VIN = 0V, IIN = 30 mA 4.5 8 12 Ω VIN = 2.4V, IIN = 15 mA 4.0 11 VIN = 2.4V, IIN = 15 mA 20 Ω ICC Quiescent Supply Current 5.5 3 µA VIN = VCC or GND, IOUT = 0 ∆ ICC Increase in ICC per Input 5.5 2.5 mA One Input at 3.4V VIKU Voltage Undershoot 5.5 −2.0 V Other Inputs at VCC or GND 0.0 mA ≥ IIN ≥ −50 mA OE1,2 = 5.5v Note 5: Typical values are at VCC = 5.0V and TA = +25°C Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. 3 www.fairchildsemi.com FSTU16211 Absolute Maximum Ratings(Note 1) FSTU16211 Preliminary AC Electrical Characteristics TA = −40 °C to +85 °C, Symbol CL = 50pF, RU = RD = 500Ω Parameter VCC = 4.5 – 5.5V Min tPHL, tPLH Propagation Delay Bus to Bus (Note 7) tPZH, tPZL Output Enable Time 7.0 VCC = 4.0V Max Min Units Max 0.25 0.25 ns VI = OPEN Figures 2, 3 30.0 35.0 ns VI = 7V for tPZL Figures 2, 3 VI = OPEN for tPZH tPHZ, tPLZ Output Disable Time 1.5 Figure Number Conditions 7.0 7.2 VI = 7V for tPLZ ns VI = OPEN for tPHZ Figures 2, 3 Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance). Capacitance Symbol (Note 8) Parameter Typ Max Units Conditions CIN Control Pin Input Capacitance 3 pF VCC = 5.0V CI/O Input/Output Capacitance 6 pF VCC, OE = 5.0V Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. Undershoot Characteristic Symbol VOUTU Parameter Output Voltage During Undershoot Min Typ 2.5 VOH − 0.3 Max Units Conditions V Note 9: This test is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot event. FIGURE 1. Device Test Conditions Parameter Value VIN see Waveform V R1 = R2 100K Ω VTRI 11.0 V VCC 5.5 V www.fairchildsemi.com Transient Input Voltage (VIN) Waveform Units 4 Preliminary FSTU16211 AC Loading and Waveforms Note: Input driven by 50 Ω source terminated in 50 Ω Note: C L includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500 ns FIGURE 2. AC Test Circuit FIGURE 3. AC Waveforms 5 www.fairchildsemi.com FSTU16211 24-Bit Bus Switch with −2V Undershoot Protection (Preliminary) Preliminary Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD56 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6