Order this document by TCF6000/D The TCF6000 was designed to protect input/output lines of microprocessor systems against voltage transients. • • • • • PERIPHERAL CLAMPING ARRAY Optimized for HMOS System Minimal Component Count SEMICONDUCTOR TECHNICAL DATA Low Board Space Requirement No P.C.B. Track Crossovers Required Applications Areas Include Automotive, Industrial, Telecommunications and Consumer Goods D SUFFIX PLASTIC PACKAGE CASE 751 (SO–8) 8 1 NO SUFFIX PLASTIC PACKAGE CASE 626 PIN CONNECTIONS Figure 1. Representative Block Diagram and Simplified Application Gnd 1 VDD VCC VRef Generator VRef Pin Gnd 8 VCC Clamp 2 7 Clamp Clamp 3 6 Clamp Clamp 4 5 Clamp Gnd Each Cell Digital Inputs Micro Computer Analog Inputs ORDERING INFORMATION Rin Cin Gnd Device TCF6000D TCF6000 Operating Temperature Range TA = – 40° to +85°C Motorola, Inc. 1996 MOTOROLA ANALOG IC DEVICE DATA Package SO–8 Plastic DIP Rev 0 1 TCF6000 MAXIMUM RATINGS (TA = 25°C, unless otherwise noted, Note 1.) Rating Symbol Value Unit VCC 6.0 V Supply Voltage Supply Current Ii 300 mA Clamping Current IIK ±50 mA Junction Temperature TJ 150 °C Power Dissipation (TA = + 85°C) PD 400 m/W Thermal Resistance (Junction–Ambient) θJA 100 °C/W Operating Ambient Temperature Range TA –40 to +85 °C Tstg –55 to + 150 °C Storage Temperature Range NOTE: 1. Values beyond which damage may occur. ELECTRICAL CHARACTERISTICS (TA = 25°C, 4.5 ≤ VCC ≤ 5.5 V, unless otherwise noted.) Symbol Min Max Unit Positive Clamping Voltage (Note 2) (IIK = 10 mA, –40°C ≤ TA ≤ + 85°C) V(IK) – VCC + 1.0 V Positive Peak Clamping Current IIK(P) – 20 mA Negative Peak Clamping Voltage (IIK = –10 mA, –40°C ≤ TA ≤ + 85°C) V(IK) –0.3 – V Negative Peak Clamping Current IIK(P) –20 – mA IL ILT – – 1.0 5.0 ACT 100 – dB IB – 2.0 mA Characteristics µA Output Leakage Current (0 V ≤ Vin ≤ VCC) (0 V ≤ Vin ≤ VCC, –40°C ≤ TA ≤ + 85°C) Channel Crosstalk (ACT = 20 log IL/IIK) Quiescent Current (Package) NOTE: 2. The device might not give 100% protection in CMOS applications. CIRCUIT DESCRIPTION To ensure the reliable operation of any integrated circuit based electronics system, care has been taken that voltage transients do not reach the device I/O pins. Most NMOS, HMOS and Bipolar integrated circuits are particularly sensitive to negative voltage peaks which can provoke latch–up or otherwise disturb the normal functioning of the circuit, and in extreme cases may destroy the device. Generally the maximum rating for a negative voltage transients on integral circuits is –0.3 V over the whole temperature range. Classical protection units have consisted of diode/resistor networks as shown in Figures 2a and 2b. The arrangement in Figure 2a does not, in general, meet the specification and is therefore inadequate. The problem with the solution shown if Figure 2b lies mainly with the high current drain through the biassing devices R1 and D3. A second problem exists if the input line carries an analog signal. When Vin is close to the ground potential, currents arising from leakage and mismatch between D3 and D2 can be sourced into the input line, thus disturbing the reading. 2 Figure 2. Classical Protection Circuits (a) (b) VCC Vin Rin D1 Vin VCC R1 D1 µC µC Rin D2 Cin Cin D2 D3 Gnd Gnd Figure 3 shows the clamping characteristics which are common to each of the six cells in the Peripheral Clamping Array. As with the classical protection circuits, positive voltage transients are clamped by means of a fast diode to the VCC supply line. MOTOROLA ANALOG IC DEVICE DATA TCF6000 Figure 3. Clamping Characteristics APPLICATIONS INFORMATION Figure 4 depicts a typical application in a microcomputer based automotive ignition system. The TCF6000 is being used not only to protect the system’s normal inputs but also the (bidirectional) serial diagnostics port. The value of the input resistors, Rin, is determined by the clamping current and the anticipated value of the spikes. IIK +10 mA –0.3 V VCC 0V Thus: Vin Rin = VCC+ 0.75 V Typ V Ω IIK V = Peak Volts (V) IIK = Clamping current (A) So, taking, V = 300 V typically (SAE J1211) IIK = 10 mA (recommended) Rin = 30 k gives, where: –10 mA Low High Low Impedance Impedance Impedance Resistors of this value will not usually cause any problems in MOS systems, but their presence needs to be taken into account by the designer. Their effect will normally need to be compensated for Bipolar systems. Figure 4. Typical Automotive Application Gnd TCF6000 VCC Gnd Vbat Hall Effect Pick Up Vbat VCC RHall INT1 B0 Coil Drive D6 Coil Feedback Engine Temperature D1 Pressure Sensor D0 B1 D2 B2 MC6805S2 Gnd Battery Volts 6X Rin Gnd VSS 3X Cin Gnd Serial Diagnostics Car MOTOROLA ANALOG IC DEVICE DATA Ignition Module 3 TCF6000 The use of Cin is not mandatory, and is not recommended where the lines to be protected are used for output or for both input and output. For digital input lines, the use of a small capacitor in the range of 50 pF to 220 pF is recommended as this will reduce the rate of rise of voltage seen by the TCF6000 and hence the possibility of overshoot. In the case of the analog inputs, such as that from the pressure sensor, the capacitor Cin is necessary for devices such as the MC6805S2 shown, which present a low impedance during the sampling period. The maximum value for Cin is determined by the accuracy required, the time taken to sample the input and the input impedance during that time, while the maximum value is determined by the required frequency response and the value of Rin. Thus for a resistive input A/D connector where: Ts = Sample time (seconds) RD = Device input resistance (Ω) Vin = Input voltage (V) k = Required accuracy (%) Q1 = Charge on capacitor before sampling Q2 = Charge on capacitor after sampling ID = Device input current (A) Q1–Q2 = Thus: Q1= Cin Vin Q1–Q2= ID • Ts but, and, so that, ID Ts = k • Cin–Vin 100 and, ID • Ts Cin (min) = Farad Vin • k so, Cin (min) = 100 • Ts Farad k • RD The calculation for a sample and hold type converter is even simpler: k = Required accuracy (%) CH = Hold capacitor (Farad) Cin (min) = 100 • CH Farad k For the MC6805S2 this comes out at: Cin (min) = 4 k Q1 100 100.25 pF = 10 nF for 1/4% accuracy 0.25 MOTOROLA ANALOG IC DEVICE DATA TCF6000 OUTLINE DIMENSIONS 8 PLASTIC PACKAGE CASE 626–05 ISSUE K 5 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. –B– 1 4 F DIM A B C D F G H J K L M N –A– NOTE 2 L C J –T– N SEATING PLANE D M K MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC ––– 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC ––– 10_ 0.030 0.040 G H 0.13 (0.005) M T A B M 5 –B– 1 4X NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. D SUFFIX PLASTIC PACKAGE CASE 751–05 (SO–8) ISSUE N –A– 8 M P 0.25 (0.010) 4 M B M G R C –T– 8X K D 0.25 (0.010) M T B SEATING PLANE S A M_ S MOTOROLA ANALOG IC DEVICE DATA X 45 _ F J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.18 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.189 0.196 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.007 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 5 TCF6000 Motorola reserves the right to make changes without further notice to any products herein. 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