MC33761 Ultra Low−Noise Low Dropout Voltage Regulator with 1.0 V ON/OFF Control The MC33761 is an Low DropOut (LDO) regulator featuring excellent noise performances. Thanks to its innovative design, the circuit reaches an impressive 40 VRMS noise level without an external bypass capacitor. Housed in a small SOT−23 5 leads−like package, it represents the ideal designer’s choice when space and noise are at premium. The absence of external bandgap capacitor accelerates the response time to a wake−up signal and keeps it within 40 s (in repetitive mode), making the MC33761 as a natural candidate for portable applications. The MC33761 also hosts a novel architecture which prevents excessive undershoots in the presence of fast transient bursts, as in any bursting systems. Finally, with a static line regulation better than −75 dB, it naturally shields the downstream electronics against choppy lines. Features • Ultra−Low Noise: 150 nV/√Hz @ 100 Hz, 40 VRMS 100 Hz−100 kHz Typical, Iout = 60 mA, Co = 1.0 F • • • • • • • • • • Repetition Rate Ready for 1.0 V Platforms: ON with a 900 mV High Level Nominal Output Current of 80 mA with a 100 mA Peak Capability Typical Dropout of 90 mV @ 30 mA, 160 mV @ 80 mA Ripple Rejection: 70 dB @ 1.0 kHz 1.5% Output Precision @ 25°C Thermal Shutdown Vout Available at 2.5 V, 2.8 V, 2.9 V, 3.0 V, 5.0 V Operating Range from −40 to +85°C Dual Version is Available as MC33762 Pb−Free Package May be Available. The G−Suffix Denotes a Pb−Free Lead Finish 5 1 THIN SOT−23−5 SN SUFFIX CASE 483 PIN CONNECTIONS AND MARKING DIAGRAM Vin 1 GND 2 ON/OFF 3 5 Vout 4 NC LxxYW • Fast Response Time from OFF to ON: 40 s Typical at a 200 Hz http://onsemi.com (Top View) xx = Version Y = Year W = Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. Applications • Noise Sensitive Circuits: VCOs RF Stages, etc. • Bursting Systems (TDMA Phones) • All Battery Operated Devices ON/ OFF 3 NC 4 GND 2 On/Off 1 Vin 5 Vout Thermal Shutdown Band Gap Reference *Current Limit *Antisaturation Protection *Load Transient Improvement Figure 1. Simplified Block Diagram Semiconductor Components Industries, LLC, 2004 January, 2004 − Rev. 7 1 Publication Order Number: MC33761/D MC33761 PIN FUNCTION DESCRIPTIONS Pin # Pin Name 1 Vin 2 GND 3 ON/OFF 4 5 Function Powers the IC Description A positive voltage up to 12 V can be applied upon this pin. The IC’s ground Shuts or wakes−up the IC A 900 mV level on this pin is sufficient to start the IC. A 150 mV shuts it down. NC None It makes no arm to connect the pin to a known potential, like in a pin−to−pin replacement case. Vout Delivers the output voltage This pin requires a 1.0 F output capacitor to be stable. MAXIMUM RATINGS Value Pin # Symbol Min 1 Vin − 12 V ESD Capability, HBM Model All Pins − − 1.0 kV ESD Capability, Machine Model All Pins − − 200 V Maximum Power Dissipation NW Suffix, Plastic Package Thermal Resistance Junction−to−Air − PD − Internally Limited W RJA − 210 °C/W Operating Ambient Temperature Maximum Junction Temperature (Note 1) Maximum Operating Junction Temperature (Note 2) − TA TJmax TJ − − − −40 to +85 150 125 °C °C °C Storage Temperature Range − Tstg − −60 to +150 °C Rating Power Supply Voltage Max Unit ELECTRICAL CHARACTERISTICS (For typical values TA = 25°C, for min/max values TA = −40°C to +85°C, max TJ = 125°C unless otherwise noted) Pin # Characteristics Symbol Min Typ Max Unit Logic Control Specifications Input Voltage Range 3 VON/OFF 0 − Vin V ON/OFF Input Resistance (all versions) 3 RON/OFF − 250 − k ON/OFF Control Voltages (Note 3) Logic Zero, OFF State, IO = 50 mA Logic One, ON State, IO = 50 mA 3 VON/OFF − 900 − − 150 − mV Currents Parameters Current Consumption in OFF State (all versions) OFF Mode Current: Vin = Vout + 1.0 V, IO = 0, VOFF = 150 mV − IQOFF − 0.1 2.0 A Current Consumption in ON State (all versions) ON Mode Current: Vin = Vout + 1.0 V, IO = 0, VON = 3.5 V − IQON − 180 − A Current Consumption in ON State (all versions), ON Mode Saturation Current: Vin = Vout − 0.5 V, No Output Load − IQSAT − 800 − A Current Limit Vin = Voutnom + 1.0 V, Output is brought to Voutnom − 0.3 V (all versions) − IMAX 100 180 − mA 1. Internally limited by shutdown. 2. Specifications are guaranteed below this value. 3. Voltage slope should be greater than 2.0 mV/s. http://onsemi.com 2 MC33761 ELECTRICAL CHARACTERISTICS (continued) (For typical values TA = 25°C, for min/max values TA = −40°C to +85°C, max TJ = 125°C unless otherwise noted) Characteristics Pin # Symbol Min Typ Max Unit 5 Vout 2.462 2.5 2.537 V 2.8 V 5 Vout 2.758 2.8 2.842 V 2.9 V 5 Vout 2.857 2.9 2.943 V 3.0 V 5 Vout 2.955 3.0 3.045 V 5.0 V 5 Vout 4.925 5.0 5.075 V Other Voltages up to 5.0 V Available in 50 mV Increment Steps 5 Vout −1.5 X +1.5 % Vout + 1.0 V < Vin < 6.0 V, TA = −40°C to +85°C, 1.0 mA < Iout < 80 mA 2.5 V 5 Vout 2.425 2.5 2.575 V 2.8 V 5 Vout 2.716 2.8 2.884 V 2.9 V 5 Vout 2.813 2.9 2.987 3.0 V 5 Vout 2.91 3.0 3.090 5.0 V 5 Vout 4.850 5.0 5.150 V 5 Vout −3.0 X +3.0 % 5/1 Regline − − 20 mV 5 Regload − − 40 mV 5 5 5 Vin−Vout Vin−Vout Vin−Vout − − − 90 140 160 150 200 250 5/1 Ripple − −70 − dB Output Noise Density @ 1.0 kHz 5 − − 150 − nV/ √Hz RMS Output Noise Voltage (all versions) Cout = 1.0 F, Iout = 50 mA, F = 100 Hz to 1.0 MHz 5 Noise − 35 − V Output Rise Time (all versions) Cout = 1.0 F, Iout = 50 mA, 10% of Rising ON Signal to 90% of Nominal Vout 5 trise − 40 − s − − − − 125 °C Output Voltages Vout + 1.0 V < Vin < 6.0 V, TA = 25°C, 1.0 mA < Iout < 80 mA 2.5 V Other Voltages up to 5.0 V Available in 50 mV Increment Steps V Line and Load Regulation, Dropout Voltages Line Regulation (all versions) Vout + 1.0 V < Vin < 12 V, Iout = 80 mA Load Regulation (all versions) Vin = Vout + 1.0 V, Cout = 1.0 F, Iout = 1.0 to 80 mA Dropout Voltage (all versions) (Note 4) Iout = 30 mA Iout = 60 mA Iout = 80 mA mV Dynamic Parameters Ripple Rejection (all versions) Vin = Vout + 1.0 V + 1.0 kHz 100 mVpp Sinusoidal Signal Thermal Shutdown Thermal Shutdown (all versions) 4. Vout is brought to Vout − 100 mV. http://onsemi.com 3 MC33761 DEFINITIONS Load Regulation Line Regulation The change in output voltage for a change in output current at a constant chip temperature. The change in output voltage for a change in input voltage. The measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. One usually distinguishes static line regulation or DC line regulation (a DC step in the input voltage generates a corresponding step in the output voltage) from ripple rejection or audio susceptibility where the input is combined with a frequency generator to sweep from a few hertz up to a defined boundary while the output amplitude is monitored. Dropout Voltage The input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. Measured when the output drops 100 mV below its nominal value (which is measured at 1.0 V differential value). The dropout level is affected by the chip temperature, load current and minimum input supply requirements. Thermal Protection Output Noise Voltage This is the integrated value of the output noise over a specified frequency range. Input voltage and output current are kept constant during the measurement. Results are expressed in VRMS. Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated at typically 125°C, the regulator turns off. This feature is provided to prevent catastrophic failures from accidental overheating. Maximum Power Dissipation Maximum Package Power Dissipation The maximum total dissipation for which the regulator will operate within its specs. The maximum power package power dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125°C. Depending on the ambient temperature, it is possible to calculate the maximum power dissipation and thus the maximum available output current. Quiescent Current The quiescent current is the current which flows through the ground when the LDO operates without a load on its output: internal IC operation, bias etc. When the LDO becomes loaded, this term is called the Ground current. It is actually the difference between the input current (measured through the LDO input pin) and the output current. http://onsemi.com 4 MC33761 Characterization Curves All curves taken with Vin = Vout + 1.0 V, Vout = 2.8 V, Cout = 1.0 F 185 4.5 GROUND CURRENT (mA) 4.0 3.5 QUIESCENT CURRENT ( A) −40°C 25°C 85°C 3.0 2.5 2.0 1.5 1.0 180 175 170 0.5 0 0 20 40 60 OUTPUT CURRENT (mA) 80 165 −60 100 Figure 2. Ground Current versus Output Current −20 0 20 40 60 AMBIENT TEMPERATURE (°C) 80 100 Figure 3. Quiescent Current versus Temperature 2.805 200 85°C 25°C −40°C 100 50 85°C 2.800 OUTPUT VOLTAGE (V) 150 40°C 2.795 2.790 2.785 25°C 0°C 2.780 −20°C −40°C 0 2.775 0 20 40 60 OUTPUT CURRENT (mA) 80 100 0 20 Figure 4. Dropout versus Output Current 40 60 OUTPUT CURRENT (mA) 80 mA 160 60 mA 140 120 30 mA 100 80 60 40 20 0 −60 1.0 mA −40 −20 80 Figure 5. Output Voltage versus Output Current 180 DROPOUT VOLTAGE (mV) DROPOUT (mV) −40 20 40 0 TEMPERATURE (°C) 60 80 Figure 6. Dropout versus Temperature http://onsemi.com 5 100 100 MC33761 APPLICATION HINTS Input Decoupling Protections As with any regulator, it is necessary to reduce the dynamic impedance of the supply rail that feeds the component. A 1.0 F capacitor either ceramic or tantalum is recommended and should be connected close to the MC33761 package. Higher values will correspondingly improve the overall line transient response. The MC33761 hosts several protections, giving natural ruggedness and reliability to the products implementing the component. The output current is internally limited to a maximum value of 180 mA typical while temperature shutdown occurs if the die heats up beyond 125°C. These values let you assess the maximum differential voltage the device can sustain at a given output current before its protections come into play. The maximum dissipation the package can handle is given by: Output Decoupling Thanks to a novel concept, the MC33761 is a stable component and does not require any specific Equivalent Series Resistance (ESR) neither a minimum output current. Capacitors exhibiting ESRs ranging from a few m up to 3.0 can thus safely be used. The minimum decoupling value is 1.0 F and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum devices. T T A P max Jmax R JA If TJmax is limited to 125°C, then the MC33761 can dissipate up to 470 mW @ 25°C. The power dissipated by the MC33761 can be calculated from the following formula: Noise Decoupling Ptot V Unlike other LDOs, the MC33761 is a true low−noise regulator. Without the need of an external bypass capacitor, it typically reaches the incredible level of 40 VRMS overall noise between 100 Hz and 100 kHz. To give maximum insight on noise specifications, ON Semiconductor includes spectral density graphics. The classical bypass capacitor impacts the start−up phase of standard LDOs. However, thanks to its low−noise architecture, the MC33761 operates without a bypass element and thus offers a typical 40 s start−up phase. in I (I ) V V out I out gnd out in or Vin max Ptot V out I out I gnd I out If a 80 mA output current is needed, the ground current is extracted from the data−sheet curves: 4.0 mA @ 80 mA. For a MC33761SNT1−28 (2.8 V) delivering 80 mA and operating at 25°C, the maximum input voltage will then be 8.3 V. Typical Applications The following picture portrays the typical application of the MC33761. http://onsemi.com 6 MC33761 Dropout 5 1 Input Permanently Enables the IC When Closed Charge Output 2 3 + C3 1 F 4 MC33761 On/Off + C2 1.0 F R1 100 k Figure 7. A Typical Application Schematic basis for the MC33761 performance evaluation board. The BNC connectors give the user an easy and quick evaluation mean. As for any low noise designs, particular care has to be taken when tackling Printed Circuit Board (PCB) layout. The figure below gives an example of a layout where stray inductances/capacitances are minimized. This layout is the http://onsemi.com 7 MC33761 Understanding the Load Transient Improvement During this decreasing phase, the LDO stops the PNP bias and one can consider the LDO asleep (Figure 8). If by misfortune a current shot appears, the reaction time is incredibly lengthened and a strong undershoot takes place. This reaction is clearly not acceptable for line sensitive devices, such as VCOs or other Radio−Frequency parts. This problem is dramatically exacerbated when the output current drops to zero rather than a few mA. In this later case, the internal feedback network is the only discharge path, accordingly lengthening the output voltage decay period (Figure 9). The MC33761 cures this problem by implementing a clever design where the LDO detects the presence of the overshoot and forces the system to go back to steady−state as soon as possible, ready for the next shot. Figure 10 and 11 show how it positively improves the response time and decreases the negative peak voltage. The MC33761 features a novel architecture which allows the user to easily implement the regulator in burst systems where the time between two current shots is kept very small. The quality of the transient response time is related to many parameters, among which the closed−loop bandwidth with the corresponding phase margin plays an important role. However, other characteristics also come into play like the series pass transistor saturation. When a current perturbation suddenly appears on the output, e.g. a load increase, the error amplifier reacts and actively biases the PNP transistor. During this reaction time, the LDO is in open−loop and the output impedance is rather high. As a result, the voltage brutally drops until the error amplifier effectively closes the loop and corrects the output error. When the load disappears, the opposite phenomenon takes place with a positive overshoot. The problem appears when this overshoot decays down to the LDO steady−state value. Figure 8. A Standard LDO Behavior when the Load Current Disappears Figure 9. A Standard LDO Behavior when the Load Current Appears in the Decay Zone Figure 10. Without Load Transient Improvement Figure 11. MC33761 with Load Transient Improvement http://onsemi.com 8 MC33761 MC33761 Has a Fast Start−Up Phase unacceptable level. MC33761 offers the best of both worlds since it no longer includes a bypass capacitor and starts in less than 40 s typically (Repetitive at 200 Hz). It also ensures a low−noise level of 40 VRMS 100 Hz−100 kHz. The following picture details the typical 33761 start−up phase. Thanks to the lack of bypass capacitor the MC33761 is able to supply its downstream circuitry as soon as the OFF to ON signal appears. In a standard LDO, the charging time of the external bypass capacitor hampers the response time. A simple solution consists in suppressing this bypass element but, unfortunately, the noise rises to an Figure 12. Repetitive Start−Up Waveforms http://onsemi.com 9 MC33761 TYPICAL TRANSIENT RESPONSES Figure 13. Output is Pulsed from 2.0 mA to 80 mA Figure 14. Discharge Effects from 0 to 40 mA Figure 15. Load Transient Improvement Effect Figure 16. Load Transient Improvement Effect http://onsemi.com 10 MC33761 TYPICAL TRANSIENT RESPONSES 250 nV/sqrt Hz 200 Vin = Vout + 1 .0V TA = 25°C Cout = 1.0 F RMS Noise, IO = 50 mA: 20 Hz − 100 kHz: 27 V 20 Hz − 1.0 MHz: 30 V IO = 50 mA 150 10 mA 100 50 RMS Noise, IO = 10 mA: 20 Hz − 100 kHz: 29 V 20 Hz − 1.0 MHz: 31 V 0 100 1,000 10,000 100,000 f, FREQUENCY (Hz) 1,000,000 Figure 17. MC33761 Typical Noise Density Performance 3.5 0 −10 IO = 1.0 mA 3.0 −20 2.5 (dB) −40 Z O (OHMS) −30 IO = 50 mA −50 −60 −70 10 mA −90 1.5 80 mA 1.0 Vin = VO + 1.0 V TA = 25°C Cout = 1.0 F −80 10 mA 2.0 0.5 20 mA −100 0 100 1,000 10,000 100,000 f, FREQUENCY (Hz) 1,000,000 100 Figure 18. MC33761 Typical Ripple Rejection Performance 1,000 10,000 100,000 f, FREQUENCY (Hz) 1,000,000 Figure 19. Typical Output Impedance plot Cout = 1.0 F, Vin = Vout + 1.0 http://onsemi.com 11 MC33761 ORDERING INFORMATION Device Voltage Output Package Shipping† MC33761SNT1−25 2.5 V Thin SOT−23−5 3000 Units / Tape & Reel MC33761SNT1−28 2.8 V Thin SOT−23−5 3000 Units / Tape & Reel MC33761SNT1−29 2.9 V Thin SOT−23−5 3000 Units / Tape & Reel MC33761SNT1−30 3.0 V Thin SOT−23−5 3000 Units / Tape & Reel MC33761SNT1−50 5.0 V Thin SOT−23−5 3000 Units / Tape & Reel MC33761SNT1−50G 5.0 V Thin SOT−23−5 (Pb−Free) 3000 Units / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 12 MC33761 PACKAGE DIMENSIONS THIN SOT−23−5/TSOP−5/SC59−5 SN SUFFIX PLASTIC PACKAGE CASE 483−02 ISSUE C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. D S 5 4 1 2 3 B L MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.0433 D 0.25 0.50 0.0098 0.0197 G 0.85 1.05 0.0335 0.0413 H 0.013 0.100 0.0005 0.0040 J 0.10 0.26 0.0040 0.0102 K 0.20 0.60 0.0079 0.0236 L 1.25 1.55 0.0493 0.0610 M 0_ 10 _ 0_ 10 _ S 2.50 3.00 0.0985 0.1181 G A J C 0.05 (0.002) H M K SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 Figure 20. THIN SOT23−5/TSOP−5/SC59−5 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 13 MC33761 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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