MMBZ15VDLT1, MMBZ27VCLT1 Preferred Devices 40 Watt Peak Power Zener Transient Voltage Suppressors http://onsemi.com SOT–23 Dual Common Cathode Zeners for ESD Protection 1 These dual monolithic silicon zener diodes are designed for applications requiring transient overvoltage protection capability. They are intended for use in voltage and ESD sensitive equipment such as computers, printers, business machines, communication systems, medical equipment and other applications. Their dual junction common cathode design protects two separate lines using only one package. These devices are ideal for situations where board space is at a premium. 3 2 PIN 1. ANODE 2. ANODE 3. CATHODE 3 Specification Features: • SOT–23 Package Allows Either Two Separate Unidirectional • • • • 2 SOT–23 CASE 318 STYLE 9 MARKING DIAGRAM xxx Mechanical Characteristics: CASE: Void-free, transfer-molded, thermosetting plastic case FINISH: Corrosion resistant finish, easily solderable MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: 260°C for 10 Seconds Package designed for optimal automated board assembly Small package size for high density applications Available in 8 mm Tape and Reel Use the Device Number to order the 7 inch/3,000 unit reel. Replace the “T1” with “T3” in the Device Number to order the 13 inch/10,000 unit reel. xxx M M • • • 1 Configurations or a Single Bidirectional Configuration Working Peak Reverse Voltage Range – 12.8 V, 22 V Standard Zener Breakdown Voltage Range – 15 V, 27 V Peak Power – 40 Watts @ 1.0 ms (Bidirectional), per Figure 5. Waveform ESD Rating of Class N (exceeding 16 kV) per the Human Body Model Maximum Clamping Voltage @ Peak Pulse Current Low Leakage < 100 nA Flammability Rating UL 94V–O = 15D or 27C = Date Code ORDERING INFORMATION Device Package Shipping MMBZ15VDLT1 SOT–23 3000/Tape & Reel MMBZ15VDLT3 SOT–23 10,000/Tape & Reel MMBZ27VCLT1 SOT–23 3000/Tape & Reel Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, 2001 April, 2001 – Rev. 5 1 Publication Order Number: MMBZ15VDLT1/D MMBZ15VDLT1, MMBZ27VCLT1 MAXIMUM RATINGS Symbol Value Unit Peak Power Dissipation @ 1.0 ms (Note 1.) @ TL ≤ 25°C Rating Ppk 40 Watts Total Power Dissipation on FR–5 Board (Note 2.) @ TA = 25°C Derate above 25°C °PD° 225 1.8 °mW° mW/°C Thermal Resistance Junction to Ambient RθJA 556 °C/W Total Power Dissipation on Alumina Substrate (Note 3.) @ TA = 25°C Derate above 25°C °PD° 300 2.4 °mW mW/°C Thermal Resistance Junction to Ambient RθJA 417 °C/W TJ, Tstg – 55 to +150 °C TL 230 °C Junction and Storage Temperature Range Lead Solder Temperature – Maximum (10 Second Duration) 1. Non–repetitive current pulse per Figure 5. and derate above TA = 25°C per Figure 6. 2. FR–5 = 1.0 x 0.75 x 0.62 in. 3. Alumina = 0.4 x 0.3 x 0.024 in., 99.5% alumina ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) UNIDIRECTIONAL (Circuit tied to Pins 1 and 3 or 2 and 3) Parameter Symbol IPP Maximum Reverse Peak Pulse Current VC Clamping Voltage @ IPP VRWM IR VBR IT VBR IF VC VBR VRWM IR VF IT Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current IPP Maximum Temperature Coefficient of VBR IF Forward Current VF Forward Voltage @ IF Uni–Directional TVS http://onsemi.com 2 V MMBZ15VDLT1, MMBZ27VCLT1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) UNIDIRECTIONAL (Circuit tied to Pins 1 and 3 or Pins 2 and 3) (VF = 0.9 V Max @ IF = 10 mA) Breakdown Voltage VBR (Note 4.) (V) VC @ IPP (Note 5.) @ IT VC IPP VBR VRWM IR @ VRWM Device Device Marking Volts nA Min Nom Max mA V A mV/C MMBZ15VDLT1 15D 12.8 100 14.3 15 15.8 1.0 21.2 1.9 12 (VF = 1.1 V Max @ IF = 200 mA) Breakdown Voltage VBR (Note 4.) (V) VC @ IPP (Note 5.) @ IT VC IPP VBR VRWM IR @ VRWM Device Device Marking Volts nA Min Nom Max mA V A mV/C MMBZ27VCLT1 27C 22 50 25.65 27 28.35 1.0 38 1.0 26 4. VBR measured at pulse test current IT at an ambient temperature of 25°C. 5. Surge current waveform per Figure 5. and derate per Figure 6. TYPICAL CHARACTERISTICS MMBZ15VDLT1 MMBZ27VCLT1 16 BREAKDOWN VOLTAGE (VOLTS) (VBR @ I T ) BREAKDOWN VOLTAGE (VOLTS) (VBR @ I T ) 17 BIDIRECTIONAL 15 14 UNIDIRECTIONAL 13 -40 +25 +85 TEMPERATURE (°C) +125 29 BIDIRECTIONAL 28 27 26 25 -55 Figure 1. Typical Breakdown Voltage versus Temperature +25 +85 TEMPERATURE (°C) Figure 2. Typical Breakdown Voltage versus Temperature http://onsemi.com 3 +125 MMBZ15VDLT1, MMBZ27VCLT1 10000 IR (nA) 100 10 1 0.1 0.01 -40 +25 +85 TEMPERATURE (°C) +125 Figure 3. Typical Leakage Current versus Temperature 250 ALUMINA SUBSTRATE VALUE (%) 150 100 PEAK VALUEIPP 100 200 HALF VALUE 50 IPP 2 FR-5 BOARD tP 50 0 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAYS TO 50% OF IPP. tr ≤ 10 s 0 25 50 75 100 125 TEMPERATURE (°C) 150 0 175 0 1 Figure 4. Steady State Power Derating Curve PEAK PULSE DERATING IN % OF PEAK POWER OR CURRENT @ TA = 25 ° C PD , POWER DISSIPATION (mW) 300 2 3 t, TIME (ms) Figure 5. Pulse Waveform 100 90 80 70 60 50 40 30 20 10 0 0 25 4 50 75 100 125 150 TA, AMBIENT TEMPERATURE (°C) Figure 6. Pulse Derating Curve http://onsemi.com 4 175 200 MMBZ15VDLT1, MMBZ27VCLT1 INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 inches mm SOT–23 SOT–23 POWER DISSIPATION SOLDERING PRECAUTIONS The power dissipation of the SOT–23 is a function of the drain pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C = 225 milliwatts 556°C/W The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. http://onsemi.com 5 MMBZ15VDLT1, MMBZ27VCLT1 Transient Voltage Suppressors – Surface Mount 40 Watts Peak Power SOT–23 TO–236AB CASE 318–08 ISSUE AF A L NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 3 1 V B S 2 G C D H J K DIM A B C D G H J K L S V INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 STYLE 9: PIN 1. ANODE 2. ANODE 3. CATHODE http://onsemi.com 6 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60 MMBZ15VDLT1, MMBZ27VCLT1 Notes http://onsemi.com 7 MMBZ15VDLT1, MMBZ27VCLT1 Thermal Clad is a trademark of the Bergquist Company ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada N. 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