www.fairchildsemi.com FAN8038C 4-Channel Motor Drive IC Features Description • • • • • • • • • FAN8038C is monolithic IC for portable CD player, and suitable for a 4-CH motor driver which drives focus acutator, tracking actuator, sled motor and spindle motor of portable CD player system. And it also provides DC-DC converter, reset, recharge, and short circuit protection. 4-CH H-Bridge driver Built-in DC-DC converter controller Built-in Power-on reset (POR) circuit Built-in battery charging circuit Built-in battery voltage monitoring circuit Built-in thermal shutdown (TSD) circuit Built-in general OP-Amplifier Low power consumption Built-in power controller circuit 44-QFP-1010B Typical application • • • • Portable Compact Disk Player (CDP) Portable Mini Disk Player (MD) Disc-Man Other Potable Compact Disk Media Ordering Information Device Package FAN8038C 44-QFP-1010B Operating Temp. -35°C ~ +85°C Rev. 1.0.0 ©2005 Fairchild Semiconductor Corporation FAN8038C Pin Assignments FIL SGND EMPSET 44 43 42 42 40 START CLKIN PWM DVCC EMP RST 39 38 37 36 35 34 OVP 1 33 CHGSET BATT 2 32 DO1(-) RSTOUT 3 31 DO1(+) DEDSET 4 30 DO2(-) BDSW 5 29 DO2(+) ERRO 6 28 PGND ERRI 7 27 DO3(+) SCP 8 26 DO3(-) COSC 9 25 DO4(+) 10 24 DO4(-) 11 23 BRAKE NC OPIN(-) FAN8038C 12 SVCC1 2 ADPVCC STOP 13 14 OPOUT OPIN(+) 15 16 17 18 19 20 21 22 SVCC2 VREF DI3 DI4 MUTE34 DI2 MUTE2 DI1 FAN8038C Pin Definitions Pin Number Pin Name I/O 1 OVP I Pin Function Description Battery voltage motor 2 BATT - Battery power supply input 3 RSTOUT O Power-on reset output 4 DEDSET I Dead time setting capacitor 5 BDSW O Transistor drive for voltage step-up 6 ERRO O Error amplifier output 7 ERRI I Error amplifier Input 8 SCP I Short circuit protection time setting capacitor 9 COSC O Triangular waveform output 10 N.C - No connection 11 OPIN(-) I OP-amplifier negative input 12 SVCC1 - Control circuit power supply 13 OPOUT O OP-amplifier output 14 OPIN(+) I OP-amplifier positiveinput 15 SVCC2 - Pre-driver power supply 16 VREF I Reference voltage input 17 DI3 I Channel 3 control signal Input 18 DI4 I Channel 4 control signal Input 19 MUTE34 I Channel 3 and 4 mute signal input 20 DI2 I Channel 2 control signal Input 21 MUTE2 I Channel 2 mute signal inpu 22 DI1 I Channel 1 control signal Input 23 BRAKE I Channel 1 brake signal input 24 DO4(-) O Channel 4 negative output 25 DO4(+) O Channel 4 positive output 26 DO3(-) O Channel 3 negative output 27 DO3(+) O Channel 3 positive output 28 PGND - Power block power Ground 29 DO2(+) O Channel 2 positive output 30 DO2(-) O Channel 2 negative output 31 DO1(+) O Channel 1 positive output 32 DO1(-) O Channel 1 negative output 33 CHGSET I Charge current setting resistance 34 RST O Power-on reset inverting output 35 EMP O Battery voltage detection output (Empty detection) 36 DVCC - H-Bridge block power supply 37 PWM O PWM transistor drive output 38 CLKIN I External clock input 39 START I DC-DC converter start control input 40 STOP I DC-DC converter off control input 41 ADPVCC - Charging circuit power supply 42 EMPSET 43 SGND - Signal ground 44 FIL I PWM phase compensation Empty dection level switch 3 FAN8038C Internal Block Diagram 44 43 1 42 41 40 39 38 36 37 35 34 OVP 33 POWER-OFF START Empty Detector Maximum Detection 2 Power Supply 20uA 10uA OFF VSYS1 3 32 Predriver V / I 31 4 V / I 5 30 Predriver 65K 29 1.25V R1 6 28 Error Amp R2 7 Predriver 27 Predriver V / I 8 25 26 1.25V 9 Triangular Waveform 10 Thermal Shutdown CLOCK V / I 24 VSYS1 Brake1 11 Control Circuit Power Supply 12 4 13 14 Mute2 Mute34 15 16 17 18 19 23 20 21 22 FAN8038C Absolute Maximum Ratings (Ta = 25°C) Parameter Symbol Value Unit Maximum supply voltage VCC 13.2 V Maximum output current IO 500 mA Power dissipation PD 1.0 W Operating temperature TOPR -35 ~ +85 °C Stroage temperature TSTG -55 ~ +150 °C Recommended Operating Conditions (Ta = 25°C) Parameter Symbol Min. Typ. Max. Unit Charging circuit power supply voltage ADPVCC 3.0 4.5 8.0 V BATT 1.5 2.4 8.0 V Control circuit power supply voltage SVCC1 2.7 3.2 5.5 V Pre-driver power supply voltage SVCC2 2.7 3.2 5.5 V H-Bridge power supply voltage DVCC - PWM BATT V Ta -10 25 70 °C Power supply voltage Operating Temperature 5 FAN8038C Electrical characteristics (Ta=25°C, BATT=2.4V, SVCC1=SVCC2=3.2V, VREF=1.6V, ADPVCC=0V, fCLKIN=88.2KHz, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit BATT=10.5V, SVCC1=SVCC2=VREF=0V - - 5 µA COMMON SECTION BATT Stand-by Current IST BATT Supply Current (No Load) IBATT DVCC=0.45V, MUTE34=3.2V - 2.5 3.5 mA SVCC Supply Current (No Load) ISVCC1 DVCC=0.45V, MUTE34=3.2V, ERRI=0V - 3.0 3.5 mA SVCC2 Supply Current (No Load) ISVCC2 DVCC=0.45V, MUTE34=3.2V - 3.5 5.0 mA IADPVCC ADPVCC=4.5V, ROUT=OPEN - 0.2 1.0 mA GVC134 - 12 14 16 dB 21.5 23.5 24.5 dB ADPVCC Supply Current (No Load) H-BRIDGE DRIVER PART Voltage Gain CH1, 3, 4 Voltage Gain CH2 GVC2 Gain Error By Polarity ∆GVC - -2 0 2 dB Input pin Resistance CH1, 3, 4 RDI134 IN=1.7 and 1.8V 9 11 13 KΩ Input pin Resistance CH2 RDI2 IN=1.7 and 1.8V 6 7.5 9 KΩ Maximum Output Voltage VOUT RL=8Ω, DVCC=BATT=4V, IN=0 ~ 3.2V 1.9 2.1 - V Saturation Voltage (Lower) VSAT1 IO= -300mA, IN=0 and 3.2V - 240 400 mV Saturation Voltage (Upper) VSAT2 IO=300mA, IN=0 and 3.2V - 240 400 mV -8 0 8 mV Input offset Voltage Output Offset Voltage CH1, 3, 4 Output Offset Voltage CH2 DEAD Zone - VOO134 VREF=IN=1.6V -70 0 70 mV VOO2 VREF=IN=1.6V -130 0 130 mV -20 0 20 mV VDB - Brake1 On Voltage VM1ON DI1=1.8V 2.0 - - V Brake1 Off Voltage VM1OFF DI1=1.8V - - 0.8 V MUTE2 On Voltage VM2ON DI2=1.8V 2.0 - - V MUTE2 Off Voltage VM2OFF DI2=1.8V - - 0.8 V MUTE34 On Voltage VM34ON DI3=DI4=1.8V - - 0.8 V MUTE34 Off Voltage VM34OFF DI3=DI4=1.8V 2.0 - - V VREF On Voltage VREFON IN1=IN2=IN3=IN4=1.8V 1.2 - - V VREF Off Voltage VREFOFF IN1=IN2=IN3=IN4=1.8V - - 0.8 V Brake Current 4 7 10 mA BRAKE1 Brake Current *Granteed Design Value 6 VIO IBRAKE FAN8038C Electrical Characteristics (Ta=25°C, BATT=2.4V, SVCC1=SVCC2=3.2V, VREF=1.6V, ADPVCC=0V, fCLKIN=88.2KHz, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit 10 13 17 mA 0.35 0.45 0.55 V - 0 5 µA 1/60 1/50 1/40 1/KΩ 3.05 3.20 3.35 V PWM POWER SUPPLY DRIVING PWM Sink Current IPWM DI1=2.1V *DVCC Level Shift Voltage VSHIF DI1=1.8V, DVCC-OUT1F DVCC Leak Current *PWM Amp Transfer Gain IDLK GPWM DVCC=9V, SVCC1,2=BATT=0V DI1=1.8V, DVCC=1.2V ~ 1.4V DC-DC CONVERTER ERROR AMP SVCC1 Pin Threshold Voltage VS1TH ERRO Pin Output Voltage H VEOH ERRI=0.7V, IO = -100µA 1.4 1.6 - V ERRO Pin Output Voltage L VEOL ERRI=1.3V, IO = 100µA - - 0.3 V SCP Pin Voltage VSCP ERRI=1.3V - 0 0.1 V SCP Pin Current 1 ISCP1 ERRI=0.7V 6 10 16 µA SCP Pin Current 2 ISCP2 ERRI=1.3V, OFF=0V 12 20 32 µA SCP Pin Current 3 ISCP3 ERRI=1.3V, BATT=9.5V 12 20 32 µA *SCP Pin Impedance RSCP - 175 220 265 KΩ ERRI=0.7V, COSC=470PF 1.10 1.20 1.30 V OVP Voltage 9.5 10 10.5 V - SHORT CIRCUIT PROTECTION SCP Pin Threshold Voltage Over Voltage Protection Detect VSCPTH VOVP TRANSISTOR DRIVING BDSW Pin Output Voltage 1H VSW1H BATT=COSC=1.5V =SVCC2=0V, 10mA 0.78 0.98 1.13 V BDSW Pin Output Voltage 2H VSW2H COSC=0V, IO = -10mA, ERRI=0.7V SCP=0V 1.0 1.5 - V BDSW Pin Output Voltage 2L VSW2L CT=2V, IO=1-mA - 0.3 0.45 V BDSW Pin Oscillating Reequency1 fSW1 COSC=470pF, =SVCC2=0V 65 80 95 KHz SW Pin Oscillating Reequency 2 fSW2 COSC=470pF, CLKIN=0V 60 70 82 KHz BDSW Pin Oscillating Reequency 3 fSW3 COSC=470pF - 88.2 - KHz *BDSW Pin Minimum Pulse Width TSWMIN COSC=470pF, ERRO=0.5 → 0.7V 0.01 - 0.6 µs Pulse Duty Start DSW1 COSC=470PF, SVSS1,SVCC2=0V 40 50 60 % MAX. Pulse Duty at Self-Running DSW2 COSC=470pF, ERR0=0.8V, CLKIN=0V 50 60 70 % MAX. Pulse Duty at CLKIN Synchronization DSW3 ERR0=0.8V, COSC=470pF 45 55 65 % *Granteed Design Value 7 FAN8038C Electrical Characteristics (Ta=25°C, BATT=2.4V, SVCC1=SVCC2=3.2V, VREF=1.6V, ADPVCC=0V, fCLKIN=88.2KHz, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit *DEDSET Pin Impedance RDEDSET - 52 65 78 KΩ DEDSET Pin Output Voltage VDEDSET - 0.78 0.88 0.98 V ERRI=1.3V 2.0 - - V OFF=0V 75 95 115 µA DEAD TIME INTERFACE STOP Pin Threshold Voltage STOP Pin Bias Current VSTOPTH ISTOP START Pin On Threshold Voltage VSTATH1 SVCC1,SVCC2=0V, COSC=2V 1.3 - - V START Pin Off Threshold Voltage VSTATH2 SVCC1,SVCC2=0V, COSC=2V - - 2.1 V 13 16 19 µA - 2.0 - - V - - - 0.8 V - - 10 µA START Pin Bias Current CLKIN Pin Threshold Voltage H CLKIN Pin Threshold Voltage L CLKIN Pin Bias Current ISTART START=0V VCLKINTH H VCLKINTH L ICLKIN CLKIN=3.2V VSSV SVCC1,SVCC2=0V → 3.2V START=0V 2.3 2.5 2.7 V START=0V 130 200 300 mV START CURCUIT Starter Switching Voltage Starter Switching Hysteresis Width Discharge Release Voltage VSSHS VDIS - 1.63 1.83 2.03 V *SVCC1 RESET Threshold Voltage Ratio RRSTOTH - 85 90 95 % RESET Detection Hysteresis Width VRSTHS - 25 50 100 mV RSTOUT Pin Output Voltage VRSTO - - 0.5 V RSTOUT Pin Pull Up Resistance RRSTO 72 90 108 KΩ RST Pin Output Voltage 1 VRST1 IO= -1mA, SVCC1,SVCC2=2.8V 2.0 - 2.4 V RST Pin Output Voltage 2 VRST2 IO= -1mA, SVCC1,SVCC2=0V 2.0 - 2.4 V *RST Pin Pull Up Resistance RRST 77 95 113 KΩ RESET CIRCUIT *Granteed Design Value 8 IO=1mA, SVCC1,SVCC2=2.8V - - FAN8038C Electrical Characteristics (Ta=25°C, BATT=2.4V, SVCC1=SVCC2=3.2V, VREF=1.6V, ADPVCC=0V, fCLKIN=88.2KHz, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit OP-AMP Input Bias Current IBIAS IN(+)=1.6V - - 300 nA Input Offset Voltage VOFOP IN(+)=1.6V -5.5 0 5.5 mV High Level Output Voltage VOHOP RL=OPEN 2.8 - - V Low Level Output Voltage VOLOP RL=OPEN - - 0.2 V VSOURCE 50Ω GND - -6.5 -3.0 mA Output Drive Current (Sink) VSINK 50Ω SVCC 0.4 0.7 - mA *Open Loop Voltage Gain GVO VIN= -75dB, F=1kHz - 70 - dB - - 0.5 - V/µs Output Drive Current (Source) *Slew Rate SR BATTERY CHARGING CURCUIT CHGSET Pin Bias Voltage VCHGSET ADPVCC=4.5V, CHGSET=1.8kΩ 0.71 0.81 0.91 V *CHGSET Pin Output Resistance RCHGSET ADPVCC=4.5V 0.75 0.95 1.20 KΩ EMPSET Pin Leak Current 1 IEMPSET ADPVCC=4.5V, CHGSET=OPEN - - 1.0 µA EMPSET Pin Leak Current 2 IEMPSET ADPVCC = 0.6V, CHGSET = 1.8kΩ - - 1.0 µA EMPSET Pin Saturation Voltage VEMPSET ADPVCC = 4.5V, IO = 300mA, CHGSET = 0Ω - 0.45 1.0 V EMPTY DETECTION EMP Detection Voltge 1 VEMPT1 VEMPSET = 0V 2.1 2.2 2.3 V EMP Detection Voltge 2 VEMPT2 IEMPSET = -2µA 1.7 1.8 1.9 V EMP Detection Hysteresis Voltage 1 VEMHS1 VEMPSET = 0V 25 50 100 mV EMP Detection Hysteresis Voltage 2 VEMHS2 IEMPSET = -2µA 25 50 100 mV IO = 1mA, OVP = 1V - - 0.5 V OVP = 2.4V - - 1.0 µA 17 23 27 KΩ - - 1.0 V EMP Pin Output Voltage EMP Pin Output Leak Current *OVP Pin Input Resistance OVP Pin Leak Current VEMP IEMPLK ROVP IOVPLK VEMPSET = 0V SVCC1 = SVCC2 = 0V, OVP = 4.5V EMP_SET Pin Detection Voltage VEMPSET VEMPSET = BATT-EMPSET, OVP = 2V 1.5 - - V EMP_SET Pin Detection Current IEMPSET EMPSET -2 - - µA *Granteed Design Value 9 FAN8038C Application Information 1. BAKE AND MUTE FUNCTION • Of the four channel drivers, channel 1 has a brake function, and the other channels have a mute function. • When the BRAKE (pin23) is set to high level, both channel 1 outputs go low level. (Brake mode). • When the MUTE2 (pin21) is set to high level, the channel 2 output is muted. • When the MUTE34 (pin19) is set to high level, the channel 3 and 4 outputs are muted. • 2. REFERENCE VOLTAGE(VREF) DROP MUTE • When the voltage applied to VREF (pin16) is 1.0V or less (typical), the H-bridge driver outputs are set to high impedance. 3. THERMAL SHUTDOWN (TSD) • If the chip temperature reaches 150°C (typical), the H-bridge driver output current is cut-off and the thermal shut down circuit has a hysteresis temperature of 25°C. 4. H-BRIDGE DRIVER (4-CHANNELS) • The driver input resistance is 11KΩ(typical) for channels 1, 3 , and 4, and 7.5KΩ for channel 2. Set the gain according to the following formula. • Channel Gain Unit CH1 CH3 CH4 Gv = 20 log 55 K 11K + REXT dB CH2 Gv = 20 log 110 K 7.5 K + REXT dB where, REXT is externally connected input resistance. 5. SWITCHING REGULATED POWER SUPPLY DRIVE • The power supply of H-bridge driver consists of DVCC(pin36) for output stage power supply and VSYS2 (pin15) for predriver power supply. 37 VBAT 15 36 PWM 44 9 Maximum Detector Predriver Triangular Waveform Figure 1. Switching Regulated Power Supply 10 25 27 29 31 24 26 30 32 28 FAN8038C 6. DC-DC CONVERTER CONTROL CIRCUIT 6-1. Set to output voltage • The DC-DC converter output voltage, SVCC1, is set by internal resistors R3 and R4 and the voltage, SVCC1, is defined as follows. SVCC1 = (1 + R3 )1.267 = 2.5[V ] R4 • This voltage, SVCC1, can be varied with the addition of an external resistors R1 and R2 as shown Figure.2 and the voltage is defined as follows. R2 ⋅ R4 R1 ⋅ R 3 + SVCC 1 = R1 + R 3 R 2 + R 4 × 1.267[V ] R2 ⋅ R4 R2 + R4 • Where, R1 and R2 are exteranl resistors, and R3 and R4 are internal resistors. 2 10uA VBAT 8 CSCP 6 1.25V Short Circuit Protection 7 12 SVCC1 R3 R1 R2 R4 Error Amp 1.267V 65 KΩ R 3 = 30 K Ω R 4 = 30 .5 K Ω 5 PWM Comp Triangular Waveform 9 COSC SVCC1 4 CDEDSET 1.267V 34 3 Figure 2. Schematic of DC-DC Converter 6-2. Power-on Reset function • If the output voltage of DC-DC conver, SVCC1,is over than 90%, the RSTOUT(pin3) goes from low level to high level, and RST (pin34) goes to high level to low level. The reset voltage has 50mV of hysteresis to prevent output chattering. 6-3. Delayed Short Circuit Protection • When the error amplifier output (pin6) become high level state during the abnormal conditions such as over load or short ciruit, the exteral capacitor, CSCP, is charged, and when the SCP (pin8) voltage reaches 1.25V(typ.), the PWM comparator output, BDSW(pin5), is shwitch-off. 11 FAN8038C • The time until switching-off is set by the capacitor, CSCP, and the equation is as follows: t SCP = CSCP × VSCP [sec] iSCP where, VSCP = 1.25[V ], iSCP = 10[uA] 6-4. Soft Start Function • The soft start function operates when a capacitor is connected between DEDSET(pin4) and GND. Also, the maximum duty cab be varied by connecting a resistor to pin4. t SOFT = C DEDSET × R Where, R = 65[ KΩ] 7. POWER OFF FUNCTION • When low level is applied to STOP (pin40), SCP (pin8) is charged, and when the voltage reaches 1.25V (typical), the PWM comparator output, BDSW(pin5), is shwitch-off. • The time until switching-off is set by the capacitor, CSCP, and the equation is as follows: tOFF = CSCP × VTH [sec] iOFF Where, VTH = 1.25[V ], iOFF = 20[uA] • 8. BATTERY CHARGER AND MONITORING FUNCTION 8-1. Set to Battey Charging Current • The power supply for the charging circuit is ADPVCC (pin41), and battery charger circuit is separated from any other block. The resistance between CHGSET (pin33) and GND sets the charging current, iCHG. • This current, iCHG, is drawn from EMPSET (pin42). • The thermal shutdown circuit is provided, and when the chip temperature rise up to about 150°C the charging current, iCHG, is cut-off and it has the temperature hysteresis of about 30°C. 8-2. Over Voltage Protection • When the voltage applied to the OVP (pin1) reaches 9.7V, SCP (pin8) is charged, and when the voltage reaches 1.25V (typical), the PWM comparator output, BDSW(pin5), is shwitch-off. • The time until switching-off is set by the capacitor, CSCP, and the equation is as follows: • tOVP = CSCP × VTH [sec] iOVP Where, VTH = 1.25[V ], iOVP = 20[uA] • 8-3. Empty Detecting Circuit • when the voltage applied to the OVP (pin1) falls below the detector voltage, EMP (pin35) goes from high level to low level (open collector output). The detector voltage has 50mV of hysteresis to prevent output chattering. • EMPSEL (pin42) to switch the detection voltage as shown below. • EMPSET Detect Voltage Hysteresis Mode 12 LOW 2.2V 50mV Battery Mode HIGH-Z 1.8V 50mV Adapter Mode FAN8038C Typical Performance Characteristics Temp vs V ovp Temp vs V S1TH 3.20 10.50 3.18 3.15 10.25 V S1TH 3.13 [V ] 3.10 V ovp10.00 [V ] 3.08 3.05 9.75 -35 -20 -5 10 25 40 55 70 85 9.50 -35 -20 -5 Temp[℃] IST [mA] 25 40 55 70 85 Temp[℃] BATT vs IBATT BATT vs IST 0.1 10 4 0.05 3 0 IBATT 2 [mA] -0.05 1 -0.1 0 1.5 2.5 3.5 4.5 5.5 6.5 1.5 7.5 2.5 3.5 5.5 6.5 7.5 Temp vs ISINK Temp vs V EMPSET 1 1.8 0.9 1.6 0.8 V EMPSET 1.4 [V ] ISINK 0.7 [mA] 0.6 1.2 1 -35 -20 -5 4.5 BATT[V ] BATT[V ] 0.5 10 25 40 Temp[℃] 55 70 85 0.4 -35 -20 -5 10 25 40 55 70 85 Temp[℃] 13 FAN8038C Application Circuits Adaptor Battery Battery STOP START Clock 43 44 42 40 41 39 37 38 36 35 34 OVP 1 33 POWER-OFF START Empty Detector Maximum Detection Power Supply 2 20uA 10uA OFF VSYS1 3 32 Predriver V / I Predriver RESET 30 31 4 65K 5 V / I 1.25V 29 R1 28 6 Error Amp R2 7 27 Predriver V / I 8 26 1.25V 10 CLOCK Triangular Waveform V / I 25 Predriver 9 24 Thermal Shutdown VSYS1 Brake1 23 11 Control Circuit Power Supply 12 13 14 Mute2 Mute34 15 16 17 VREF DI3 18 DI4 19 20 MUTE34 DI2 21 22 MUTE1 DI1 BRAKE Servo Pre Amp & Controller 14 FAN8038C Package Dimension 15 FAN8038C DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 11/18/04 0.0m 001 Stock#DSxxxxxxxx 2005 Fairchild Semiconductor Corporation