FAIRCHILD FAN8620B

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FAN8620B
12V Spindle Motor and Voice Coil Motor Driver
Features
Description
Spindle Motor Driver
The FAN8620B is an ASIC combination chip, designed for
the HDD application, it includes the following functions:
spindle motor drive, voice coil motor drive, retract and
power management.
To drive and control the spindle, the external ASIC provides
the appropriate control signals (Start up, commutation, speed
control) to the FAN8620B. The spindle motor condition is
monitored by the FG output and the motor speed control is
accomplished via the PWMSP input. The ASIC controls the
voice coil motor current via PWMH and PWML inputs and
the power management circuit always monitors the power
supply voltages.
•
•
•
•
•
•
•
Soft commutation
Spindle brake after retract
Adjustable brake delay time
1.5A max. current power driver
Low output saturation voltage: 1V typical @1.2A
PWM decoder & filter for soft commutation
The external circuit (ASIC) based start-up, commutation
and motor speed control
Voice Coil Motor Driver
•
•
•
•
•
•
•
Trimmed low offset current
1.2A max. current power driver
Gain selection and adjustable gain
Automatic power failure retract function
Class AB linear amplifier with no dead zone
Low output saturation voltage: 0.8V typical @1.0A
Internal full bridge with VPNP (Vertical PNP) & NPN
transistors
48-QFPH-1414
Power Monitoring
•
•
•
•
Power on reset with delay
Hysteresis on both power comparators
Over temperature & over current shut down
5V and 12V power monitor threshold accuracy ±2%
Others
• Can be used with 5Volt and 3.3Volt control
signals(CNTL1,CNTL2 & CNTL3) for ASIC Interface
Package
• 48QFPH (48 pin quad flat package heat-sink)
Typical Application
Ordering Information
• Hard disk drive (HDD)
Device
Package
Operating Temp.
FAN8620B
48-QFPH-1414
0 ~ 70°C
Rev. 1.0.0
May. 2000.
©2000 Fairchild Semiconductor International
1
FAN8620B
43
U
GND
44
CCOMP
CNTL1
45
BRAKE
CNTL2
46
CBRAKE
CNTL3
47
PVCC1
PWMSP
48
TAB
SENSE12
CFSP
Pin Assignments
42
41
40
39
38
37
PWMSF
1
36
N
CFSF
2
35
SUBGND
ADJ
3
34
V
SENSE5
4
33
PCS
VDD
5
32
W
FG
6
31
SUBGND
FAN8620B
TAB
TAB
POR
10
27
VCM+
CDLY
11
26
PGND
GAINSEL
12
25
SENSEOUT
13
14
15
16
17
18
TAB
2
19
20
21
22
23
24
RRET
ERRIN
SUBGND
28
VCM-
9
PVCC2
HALFVCC
CRET2
VDD
SENSE
29
FILOUT
8
VCC
MCLK
CRET
ERROUT
CFVCM
30
PWML
7
PWMH
VREF
FAN8620B
Pin Definitions
Pine Number
Pin Name
I/O
Pin Function Description
1
PWMSF
I
PWM input for spindle soft commutation
2
CFSF
-
Capacitor for spindle PWM soft commutation filter
3
ADJ
-
Reference voltage adjustable
4
SENSE5
-
Adjustable threshold voltage to 5V
5
VDD
-
5V power supply
6
FG
O
Frequency generation to spindle speed
7
VREF
O
Voltage reference output for ASIC power
8
MCLK
I
Clock from ASIC for commutation
9
HALFVCC
O
1/2 VCC pin
10
POR
O
Fault output(Power On Reset & Thermal Shut Down)
11
CDLY
-
Delay capacitor for power on reset
12
GAINSEL
I
VCM current Amplifier gain selection
13
PWMH
I
PWM signal input (MSB)
14
PWML
I
PWM signal input (LSB)
15
CFVCM
-
Filter capacitor for VCM PWM control
16
CRET
-
Delay capacitor for retract
17
VCC
-
12V power line
18
FILOUT
O
VCM PWM output
19
SENSE
I
VCM current sense Amplifier input
20
CRET2
-
Power for VCM retract
21
PVCC2
-
12V power line for VCM output
22
VCM(-)
O
VCM negative output
23
SUBGND
-
Ground
24
RRET
-
Adjustable maximum retract current
25
SENSEOUT
O
VCM current sense Amplifier output
26
PGND
-
Ground
27
VCM(+)
O
VCM positive output
28
ERRIN
I
VCM error Amplifier negative input
29
VDD
-
5V power supply
30
ERROUT
O
VCM error Amplifier output
31
SUBGND
-
Ground
32
W
O
Spindle motor W phase output
3
FAN8620B
Pin Definitions (Continued)
Pine Number
Pin Name
I/O
Pin Function Description
33
PCS
O
Spindle output current sensing
34
V
O
Spindle motor V phase output
35
SUBGND
-
Ground
36
N
-
Spindle motor neutral point
37
U
O
Spindle motor U phase output
38
CCOMP
-
Spindle output control compensation
39
BRAKE
O
Dynamic brake
40
CBRAKE
-
Back-EMF charging capacitor for brake power
41
PVCC1
-
12V power line for spindle
42
SENSE12
-
Adjustable for threshold voltage to 12V
43
GND
-
Ground
44
CNTL1
I
Control input for spindle and brake
45
CNTL2
I
Control input for start-up clock and soft commutation
46
CNTL3
I
Control input for VCM Amplifier & retract
47
PWMSP
I
PWM input for spindle speed control
48
CFSP
-
Filter capacitor for spindle PWM control
4
FAN8620B
Internal Block Diagram
POR
Vreg
CNTL 1,2,3
Power-on
Reset
Interface
U
FG
MCLK
PWMSF
Custom
Digital
ASIC
V
Spindle Motor
W
Driver
PWMSP
N
VCM+
VCM-
GAINSEL
PWMH
3-Phase
BLDC
Motor
Voice Coil Motor
Driver
PWML
Retract
Brake
FAN8620B
5
Voice
Coil
Motor
FAN8620B
Equivalent Circuits
PWM decoder filter input of Spindle part
PWM decoder filter Capacitor of Spindle part
VDD
VDD
+
-
22Ω
#1, #47
+
#2, #48
-
100µ
Internal Referecnce Voltage
Internal switch
Regulator part
Sense5 input
VDD
VDD
Internal 1.3V
27Ω
+
#3
VDD
27Ω
#4
#7
FG output
MCLK input
VDD
VDD
50k
27Ω
27Ω
#6
50k
#8
50k
6
FAN8620B
Equivalent Circuits (Continued)
VCM power amplifier reference
Power on reset part
VDD
#17
27Ω
VDD
#11
12.6k
VDD
#9
12.6k
15µ
50k
27Ω
+
#10
Internal
2.5V
TSD
VCM gain selection input
VCM PWM high input
VDD
27Ω
VDD
10k
27Ω
#12
#13
10k
500µ
10k
Internal switch
VCM PWM low input
VCM PWM filter Capacitor
VDD
+
-
VCC
+
27Ω
#14
+
#15
15.6µ
3k
Internal switch
Internal 4V
7
FAN8620B
Equivalent Circuits (Continued)
Filtered VCM PWM command output
VCM current sense input
VCC
VCC
+
Internal
DEC OUT
#18
-
#19
Capacitor for retract power
U
V
Maximum retract current set input
W
VCC
30Ω
VCC
27Ω
#20
2k
#24
Retract
Block
Spindle motor output compensation Capacitor
Spindle motor output and Back-EMF sensing part
VCC
VDD
VCC
#32, 34, 37
VCC
60Ω
#38
#33
Retract
Block
VCC
60Ω
-
#36
+
+
-
Internal 4.2V
8
FAN8620B
Equivalent Circuits (Continued)
Dynamic brake part
CNTL1, 2, 3 input
VCC
VCC
VDD
U
40Ω
2k
VDD
#40
27Ω
8k
#44, #45, #46
27Ω
#39
VCM output and control part
Sense12 input
VCC
#17
VCC #9
#27
-
VCC
+
#30
Internal
4V
VCC
+
+
60Ω
60Ω
#42
-
-
#22
#28
VCC
VCC
#25
60Ω
#19
+
Internal
4V
9
FAN8620B
Absolute Maximum Ratings (Ta = 25°C)
Parameter
Symbol
Value
Unit
Maximum signal block supply voltage for 5V line
VDDMAX
6.0
V
Maximum signal block supply voltage for 12V line
VCCMAX
15.0
V
Maximum power block supply voltage for 12V line
PVCCMAX
15.0
V
Maximum output current of Spindle motor
ISOMAX
2.0
A
Maximum output current of VCM
IVOMAX
1.2
A
Power dissipation
3.0
PD
note
W
Storage temperature
TSTG
-55 ~ 125
°C
Maximum junction temperature
TJMAX
150
°C
Operating ambient temperature
TA
0 ~ 70
°C
Notes:
1. Power dissipation is reduced 16mW / °C for using above Ta=25°C.
2. Do not exceed Pd and SOA(Safe Operating Area).
Power Dissipation Curve
Pd[mW]
3,000
2,000
SOA
1,000
0
0
25
50
70
100
125
150
175
Ambient temperature, Ta [°C]
Recommended Operating Conditions (Ta = 25°C)
Parameter
Supply voltage
Supply voltage for logic circuit
Symbol
Min.
Typ.
Max.
Unit
VCC, PVCC1, PVCC2
10.8
12.0
13.2
V
VDD
4.5
5.0
5.5
V
10
FAN8620B
Electrical Characteristics
(Ta=25°C, unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Units
5V line supply current 1
IDD1
Brake Mode (CNTL1= Low)
–
55
65
mA
5V line supply current 2
IDD2
Stand by
–
20
25
mA
5V line supply current 3
IDD3
Normal Mode ( CNTL1 =
CNTL3 = High )
–
20
25
mA
5V line supply current 4
IDD4
Retract Mode (CNTL3=Low)
–
20
25
mA
12V line supply current 1
ICC1
Brake Mode ( CNTL1 =Low)
–
7
12
mA
12V line supply current 2
ICC2
Stand by
–
9
15
mA
12V line supply current 3
ICC3
Normal Mode ( CNTL1 =
CNTL3 = High)
–
30
50
mA
12V line supply current 4
ICC4
Retract Mode (CNTL3 =Low)
–
9
14
mA
SUPPLY
CURRENT(1)
POWER MONITOR
Threshold voltage level for 12V
VTH12
VCC=Sweep, VDD=5V
9.1
9.45
9.8
V
Hysteresis on 12V comparator
VHYS12
VCC=Sweep, VDD=5V
100
200
300
mV
Adjustable pin voltage for 12V
V12
VCC=12V, VDD=5V
3.0
3.2
3.4
V
Threshold voltage level for 5V
VTH5
VCC=12V, VDD=Sweep
3.6
3.95
4.3
V
Hysteresis on 5V comparator
VHYS5
VCC=12V, VDD=Sweep
50
100
150
mV
Adjustable pin voltage for 5V
V5
VCC=12V, VDD=5V
2.90
3.23
3.55
V
ICPOR
VCC=12V, VDD=5V
-17.0
-13.5
-10.0
uA
CDLY=Sweep
2.3
2.5
2.7
V
POWER ON RESET GENERATOR
Charging current for POR
Capacitor
POR threshold voltage
VTHPOR
Output high voltage
VPOH
VCC=12V, VDD=5V
4.5
–
VDD
V
Output low voltage
VPOL
VCC=12V, VDD=5V
0
–
0.5
V
CDLY=220nF
–
40
–
ms
2.07
–
–
V
Power on reset delay(2)
CONTROL INPUT
TdPOR
(3)
Logic control input 1 HIGH voltage
VCTL1H
-
Logic control input 1 HIGH current
ICTL1H
CNTL1 = High
65
100
160
uA
Logic control input 1 LOW voltage
VCTL1L
-
–
–
1.43
V
Logic control input 1 LOW current
ICTL1L
-200
-165
-130
uA
CNTL1= Low
11
FAN8620B
Electrical Characteristics (Continued)
(Ta=25°C, unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Units
Back-EMF threshold voltage(2)
VBTH
–
65
80
95
mV
FG output high voltage
VFGH
–
4.5
–
–
V
FG output low voltage
VFGL
–
–
–
0.5
V
Running mode check
RM1
-
100
–
Hz
RUNNING MODE CHECK
U=V=W=5V, N=100Hz
SPINDLE FG GENERATION
FG frequency
FG
U,V,W=120° shift pulse(100Hz)
–
300
–
Hz
DTFG
U,V,W=120° shift pulse(1KHz)
45
50
55
%
VSPMH
–
3.0
–
–
V
VSPML
–
–
–
2.0
V
High input current at PWMSP
IPSP1
PWMSP=100%
100
150
200
uA
CFSP voltage2(100% duty of
PWMSP)
VSP2
PWMSP=100%
1.5
1.7
1.9
V
Low input current at PWMSP
IPSP2
PWMSP=0%
-200
-150
-100
uA
CFSP voltage1(0% duty of PWMSP)
VSP1
PWMSP=0%
3.1
3.3
3.5
V
CFSP voltage amplitude
VSPD
1.2
1.6
2.0
V
FG duty
SPINDLE PWM CONTROL
PWM high level input voltage(2)
PWM low level input voltage
(2)
–
PWMSP=50%
2.35
2.5
2.65
V
CFSP charging current
ICFSP1
PWMSP=0%, CFSP=2.5V
-200
-150
-100
uA
CFSP discharge current
ICFSP2
SPMSP=100%, CFSP=2.5V
100
150
200
uA
11.0
–
–
V
–
VDD
–
V
–
–
0.5
V
CFSP voltage3 (50% of PWMSP)
VSP3
BRAKE
CBrake output voltage
VBC
Brake output high voltage
VBH
Brake output low voltage
VBL
–
(Test only)
–
12
FAN8620B
Electrical Characteristics (Continued)
(Ta=25°C, unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Units
–
3.0
–
–
V
SPINDLE PWM SOFT COMMUTATION
PWM high level input voltage(2)
(2)
VSFMH
VSFML
–
–
–
2.0
V
High input current at PWMSF
IPFP1
PWMSF=100%
100
150
200
uA
CFSF voltage2(100% duty of
PWMSF)
VSF2
PWMSF=100%
2.60
2.75
2.90
V
Low input current at PWMSF
IPSF2
PWMSF=0%
-200
-150
-100
uA
CFSF voltage1(0% duty of PWMSF)
VSF1
PWMSF=0%
2.10
2.25
2.40
V
CFSF voltage amplitude
VSFD
425
475
525
mV
CFSF voltage3 (50% of PWMSF)
VSF3
PWMSF=50%
2.35
2.50
2.65
V
-150
-100
-50
uA
PWM low level input voltage
–
CFSF charging current
ICFSF1
PWMSF=0%, CFSP=2.5V
CFSF discharge current
ICFSF2
SPMSF=100%, CFSP=2.5V
50
100
150
uA
U saturation voltage_upper
VSU5U
RU,RV,RW=5Ω
–
–
0.9
V
V saturation voltage_upper
VSU5V
RU,RV,RW=5Ω
–
–
0.9
V
W saturation voltage_upper
VSU5W
RU,RV,RW=5Ω
–
–
0.9
V
U saturation voltage_lower
VSV5L
RU,RV,RW=5Ω
–
–
0.8
V
V saturation voltage_lower
VSU5L
RU,RV,RW=5Ω
–
–
0.8
V
W saturation voltage_lower
VSU5L
RU,RV,RW=5Ω
–
–
0.8
V
U output frequency
FU
CNTL2=12KHz
–
1
–
KHz
V output frequency
FV
CNTL2=12KHz
–
1
–
KHz
W output frequency
FW
CNTL2=12KHz
–
1
–
KHz
SPINDLE OUTPUT
Leakage current U upper
IULQU
–
-10
0
10
uA
Leakage current V upper
IVLQU
–
-10
0
10
uA
Leakage current W upper
IWLQU
–
-10
0
10
uA
Leakage current U lower
IULQL
–
-20
0
20
uA
Leakage current V lower
IVLQL
–
-20
0
20
uA
Leakage current W lower
IWLQL
–
-20
0
20
uA
Transconductance gain SPM
GMSP
RU,RV,RW=5Ω
–
0.85
–
A/V
CCOMP charging current1
ICOMP1
PWMSP=0%
-10
0
10
uA
CCOMP charging current2
ICOMP2
PWMSP=50%
-400
-300
-200
uA
CCOMP charging current3
ICOMP3
PWMSP=100%
-750
-630
-500
uA
13
FAN8620B
Electrical Characteristics (Continued)
(Ta=25°C, unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Units
VADJ
–
1.29
1.31
1.33
V
Regulator output voltage
VREG
–
3.1
3.3
3.5
V
Regulator line regulation(2)
RLINE
–
–
–
2.0
%
Regulator load regulation(2)
RLOAD
IO = 500mA
–
–
2.0
%
REGULATOR
Adjustable PIN voltage
VCM PWM CONTROL
High PWMH input current
IPWMH1
PWMH = 100%
Low PWMH input current
IPWMH2
PWMH = 0%
High PWML input current
IPWML1
PWML = 100%
IPWM2
PWML = 0%
Low PWML input current
(2)
36
48
60
uA
-200
-150
-100
uA
36
48
60
uA
-200
-150
-100
uA
3.0
–
–
V
VPWMH1
–
(2)
VPWMH2
–
–
–
2.0
V
PWML high level input voltage(2)
VPWML1
–
3.0
–
–
V
VPWM2
–
–
–
2.0
V
PWMH high level input voltage
PWMH low level input voltage
PWML low level input voltage
(2)
CFVCM voltage1
VCFVC1
PWMH=100%,PWML=100%
5.56
5.95
6.34
V
CFVCM voltage5
VCFVC5
PWMH=50%,PWML=50%
3.80
4.00
4.20
V
CFVCM voltage9
VCFVC9
PWMH=0%,PWML=0%
1.66
2.05
2.44
V
PWM current ratio (VCM)
RPWM
–
–
64
–
–
PWMH current variation
IVPWM
–
1.2
1.3
1.4
mA
PWML current variation
IVPWM
–
17.7
20.3
22.3
uA
–
–
2
deg
VCM PWM FILTER
Maximum phase shift(2)
DF
Filter cut-off frequency(2)
Filter attenuation at 1MHz
(2)
Measure at 500HZ,
CFVCM=10nF
FCO
–
–
100
–
kHz
aFILTER
–
–
70
–
dB
14
FAN8620B
Electrical Characteristics (Continued)
(Ta=25°C, unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Units
VCM REFERENCE VOLTAGE
VCM reference voltage
VREF
CNTL3= High
3.8
4.0
4.2
V
Amplifier output high
VEOH
–
10.8
–
–
V
Amplifier output low
VCM ERROR AMPLIFIER
VEOL
–
–
–
1.2
V
(2)
IESC
–
8
–
–
mA
voltage(2)
VOSE
–
-15
0
15
mV
Error amplifier open loop gain(2)
AVE
–
–
80
–
dB
BGE
–
–
2
–
MHz
Amplifier output high
VSOH
–
10.8
–
–
V
Amplifier output low
VSOL
–
–
–
1.2
V
Short circuit current(2)
ISSC
–
10
–
–
mA
Input offset voltage(2)
VOSE
–
-15
0
15
mV
Short circuit current
Input offset
Unit gain bandwidth
(2)
VCM SENSE AMPLIFIER
Unit gain bandwidth
(2)
Sense amplifier voltage
BGS
–
–
2
–
MHz
gain1(2)
AVS1
Gainsel=High
–
18
–
dB
(2)
AVS2
Gainsel=Low
–
6
–
dB
Sense amplifier voltage gain2
VCM POWER AMPLIFIER
Power Amplifier gain
APO
–
–
22.9
–
dB
Power Amplifier output high voltage
VPOH
–
11.0
–
–
V
Power Amplifier output low voltage
VPOL
–
–
–
1.0
V
VOSE
–
-15
0
15
mV
BGP
–
–
2
–
MHz
Input offset
voltage(2)
Unit gain bandwidth(2)
15
FAN8620B
Electrical Characteristics (Continued)
(Ta=25°C, unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Units
IOSVCM
PWMH=PWML=50% duty
–20
0
20
mA
VCM AMPLIFIER TOTAL
VCM offset current
VCM transconductance gain high
GMVH
Gainsel=Low
–
0.45
–
A/V
VCM transconductance gain low
GMVL
Gainsel=High
–
0.11
–
A/V
VCM+ saturation voltage lower
VVMS1
Rvcm=15Ω
–
–
0.7
V
VCM- saturation voltage upper
VVMS2
Rvcm=15Ω
–
–
0.7
V
VCM+ saturation voltage upper
VVMS3
Rvcm=15Ω
–
–
0.7
V
VCM- saturation voltage lower
VVMS4
Rvcm=15Ω
–
–
0.7
V
Leakage current power Amplifier1
IVCML1
-20
0
20
uA
CRET2=Sweep
–
–
3.6
V
–
RETRACT
Min. operating voltage of CRET2
VCRET2
VSRC
CRET2=5V
–
–
1.2
V
VRTSAT
CRET2=5V
–
–
0.7
V
Retract sinking current1
IRCT1
Rret=8.0KΩ
40
58
76
mA
Retract sinking current2
IRCT2
Rret=4.2KΩ
80
100
130
mA
Upper power transistor leakage
ILRET1
–
–10
0
10
uA
Lower power transistor leakage
ILRET1
–
–10
0
10
uA
Operating temperature
TSD
–
–
150
–
°C
Thermal hysteresis
THYS
–
–
30
–
°C
Source voltage
Sinking saturation voltage
THERMAL SHUT DOWN
Notes:
1. No Spindle or VCM Load.
2. Guaranteed by Design.
3. Logic control input2 & 3 spec’s are equal to logic control input1.
16
FAN8620B
Application Information
Spindle Motor Drive Circuit
The FAN8620B is a combination chip consisting of spindle motor and voice coil motor designed for HDD system. According
to the spindle conditions, the digital ASIC provides optimum control signals (Start-up, commutation, speed control, and commutation mode) to the FAN8620B.
Back-EMF (BEMF) signal of the spindle motor is fed back to ASIC via FG line. The MCLK and PWM signals are used to
determine the commutation timing and to control the spindle speed, respectively.
Spindle Driver
The spindle includes both low and high side drivers (H-bridge) for a three-phase sensorless brushless DC motor. To reduce the
saturation voltage, the vertical PNP transistor is used as the high side driver.
Frequency Generation (FG)
FG stands for Frequency Generation. It is the output signal to the ASIC.
It contains important information about the motor speed.
According to the FG frequency, the digital ASIC provides different motor clock signals to the motor drive IC via MCLK.
It checks the motor speed to send the VCM enable signal via CNTL3.
FG frequency (Hz), motor speed (rpm) and pole number are directly related as shown below in the three phase motor.
FG frequency(Hz) = motor speed(rpm) × pole number / 2 × 3 / 60
In a typical application,(8 pole motor)
FG frequency = 5400 × 8 /2 × 3 / 60 = 1080 [Hz]
MCLK & Mask
The MCLK is a motor clock used as the standard clock signal for the proper commutation timing of the spindle motor. It is
supplied by the ASIC.
As shown in table 1, it has different delay times depending on the mode of the spindle.
MCLK (Td)
MASK
Commutation
2ms (External ASIC)
1ms
Hard
Acceleration mode
FG(n-1) / 2
FG(n-1) / 4
Hard
Running mode
FG(n-1) / 32
344.45ms
Soft
Start-up mode
Table 1.
After the FG_Edge signal detection, the MCLK occurs after a half FG_Edge delay time in the acceleration mode and 1/ 32
FG_Edge delay time in the soft commutation mode.
17
FAN8620B
Mask
When the coil current is abruptly changed in a short time interval, a spark voltage occurs. This spark voltage mixes with the
FG output to give the wrong spindle information to the ASIC. To eliminate the spark voltage from the FG output, the masking
circuit is needed.
di
Vcoil = – L ----dt
W_BEMF
V_BEMF
U_ BEMF
U_Comp
120°
V_Comp
W_Comp
60°
FG
FG_Edge
Electrically 30° Delay
MCLK
Figure 1. BEMF, FG, and MCLK in the acceleration mode
commutation noise, false zero cross
FG ≥ 8msec
FG
2msec
2msec
MCLK
1msec
1msec
MASK
Figure 2. MCLK vs MASK in the start-up mode
18
FAN8620B
FG ≤ 8msec, T1
commutation noise, false zero cross
T2
FG
T1/2
T2/2
MSLK
T1/4
T2/4
MASK
Figure 3. MCLK vs MASK in the acceleration mode
PWMDEC and Speed Control
Motor speed is measured by the ASIC via the FG output. The digital ASIC compares FG frequency with the target motor
speed and sends the speed compensation signal to the PWMSP input of the FAN8620B. This PWM signal is internally filtered
and is converted into DC voltage through the built-in PWM Decoder Filter. The analog output of the filter depends on the duty
of the PWM signal. The filter is a 3rd order, low-pass filter. The first pole location of the filter is determined by the external
capacitor connected to pin(48) CFSP.
1
0.5
1
0.5
Ispindle = ( D – D MIN ) ⋅ --------------------------------------- ⋅ --------------- = ( D – 0.13 ) ⋅ -------------------------------- ⋅ ----------R33 + R METAL D MAX
R33 + 0.074 0.87
PWM SP vs ISPM
ISPM (mA)
Io(mA)
1400.0
1200.0
1000.0
800.0
600.0
400.0
200.0
0.0
0
10
20
30
40
50
Duty(%)
60
70
80
Figure 4. Spindle current vs PWMSP duty variation ( R33 = 0.25Ω )
19
90
100
FAN8620B
Start-up Mode
In the sensorless BLDC motor the Back-EMF is used to determine the rotor position.
At standstill condition, there is no Back-EMF voltage and no FG output. There is no information about the motor position.
To drive the spindle in the start-up mode, the digital ASIC sends the spindle enable signal via CNTL1 and supplies the HIGH
or OPEN signal via CNTL2 to be used as commutation signal of the spindle motor.
The digital ASIC continuously provides HIGH or OPEN signal until the Back-EMF generated is large enough to produce the
FG signal for the self commutation. During a fixed time, if the Back-EMF generated is too small and the spindle motor is not
driven by the self commutation, the ASIC resets all signals and retries the spindle.
CNTL1(1)
SPM driver
CNTL2(2)
CNTL3(3)
VCM driver
Retract
SPM driver
VCM gain
High
1
0
Hard
1
0
Normal
0.11
Open (Floating)
0
0
Hard
0
0
x
x
Low
Brake Commutation
GAINSEL
0
1
Soft
0
1
(5)
Start up
Hold
0.45
Notes:
1. CNTL1: Spindle motor control
2. CNTL2: commutation mode control
3. CNTL3; VCM control
4. “1”: Enable; “0”: disable;
Test only
Acceleration Mode
When the Back-EMF detected is large enough to determine motor position, the mode is changed from start-up to acceleration.
The ASIC sends the optimum commutation timing signal via MCLK according to the FG input.
By using the Back-EMF, the spindle is self-commuted at acceleration and running modes. During the motor drive, the spindle
motor is commuted at a point which is electrically 30° delayed after the FG_Edge.
Running Mode
The running mode is when the spindle motor speed arrives within ± 1% of the target speed. The commutation mode, commutation delay time, MCLK delay time (Td) and masking time are changed at the running mode.
The spindle motor speed is controlled by PWM signal within ± 0.01%.
The soft commutation using the current slope of the motor may reduce audible noise, EMI (Electromagnetic Interference) and
spark voltage which is generated on the motor coil commutation.
20
FAN8620B
CNTL1
SPINdle ON
High
Open
Low
High
Open
CNTL2
Low
FG
+1%
Target RPM
-1%
Rotation
Speed
Start-Up
Hard-commutation
Soft-commutation
Internal
Ready
10msec
Internal
commutation Mode
Change
100msec
CNTL3
VCM ON
High
Open
High
CASE1
: High gain
Low
High
CASE1
: Low gain
Low
Figure 5. Motor start-up sequence
Duty (%)
100%
D%
0
F trarget
FG
Frequency
Figure 6. FG vs PWMSP duty variation
21
VCM Enable
FAN8620B
(1) Acceleration Mode: Hard-Commutation Mode
+
U_BEMF
0
-
+
V_BEMF
0
-
+
W_BEMF
0
-
SOURCE
Iu
SINK
SOURCE
Iv
SINK
SOURCE
Iw
SINK
(2) Running Mode: Soft-commutation Mode
SOURCE
Iu
SINK
SOURCE
Iv
SINK
SOURCE
Iw
SINK
Figure 7. Acceleration and running the spindle motor
22
FAN8620B
Start
High frequency
Noise
Elimination
Using filtered FG
Generate start
Counter
Counting
the FG duration
NO
Hard
commutation
NO
Saturation
=?
MCLK = FG(n-1)/32
MASK = 344.45usec
YES
Running
Waiting 2msec
MCLK generation
MCLK = FG(n-1)/2
MASK = FG(n-1)/4
Acceleration
Retry
MASK = 1msec
FG polarity
Check = SAME?
YES
Start up
Keep going
Waiting for FG edge
Store count
Value of the FG
Figure 8. MCLK generation flow chart
23
FAN8620B
Voice Coil Motor
VCM Driver
The voice coil motor driver is linear, class AB, H-bridge type driver, It includes all power transistors. After the VCM is
enabled via CNTL3, the VCM current level is controlled by two PWM signals. The input voltage level at pin PWMH weighs,
at a maximum, 64 times more than the input voltage at pin PWML. These PWM signals are filtered by an internal secondorder low-pass filter and converted into PWMOUT (DC Voltage). The filter PWMOUT depends only on the duty cycle and
not on the logic level. The PWM Filter's pole is adjustable by pin CFVCM connected to the external capacitor.
R1
Vin
PWMH input 13
VREF(4V)
-
R2
Gm
1/2 VDD
R1
Vin
PWML input 14
C1
3k
+
+
A
R1
R1
+
-
Filtout
R2
C1
Gm
18
-
+
1/2 VDD
15
CFVCM
Figure 9. PWM decoder & filter schematic 2
17
PGND 26
VCC
R7
9
-
HALFVCC
VCM+
R5
C9
v+
27
+
L
R5
PVCC 21
VREF(4V)
VCM
R5
PWM decoder
& -
RL
+
Sense
R5
+
Filter
19
-
-
IVCM
R4
22
R3
-
vb
Filtout
Errin
18
Errout
28
R3
VREF(4V)
Senseout
30
25
12
Gainsel
R18
Rext
Cext
R25
Figure 10. VCM driver schematic
24
VCM+
vs
-
+
Gain: 8,2
R6
Rsense
v-
FAN8620B
The transconductance of VCM amplifier gain, Gm, is:
I VCM
2 ⋅ Aerror ⋅ Apower ⋅ R25
Gm = -----------= ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------Vin
2 ⋅ R18 ⋅ Rsense ⋅ As ⋅ Aerror ⋅ Apower + ( R18 + R25 ) ( Z VCM + Rsense )
Aloop R25
1
1
Gm = --------------------------  ----------- ---------------------- -------
1 + Aloop  R18 Rsense As
2 ⋅ R18 ⋅ As ⋅ Aerror ⋅ Apower
Aloop = ---------------------------------------------------------------------------------( R18 + R25 ) ( Z VCM + Rsense )
Therefore Aloop >>1,
R25
1
1
Gm ≅ ----------- ⋅ ---------------------- ⋅ ------- ⋅ 2
R18 Rsense As
The transconductance (Gm) can be adjusted by selecting the external components R18, R25 and sense resister Rsense.
if R18 = R25, Rsense = 1Ω
GAINSEL = Low, 1 / AS = 0.45
Gm = 0.45
GAINSEL = High, 1 / AS = 0.11
Gm = 0.11
VCM current (IVCM) is:
1
R25
1
1
Imotor = 4 × ( PWMH – 0.5 ) + ------ ( PWML – 0.5 ) × ----------- × ---------------------- × -------32
R18 Rsense AS
NOTES:
PWMH = 1 when 100% duty
PWMH = 0.5 when 50% duty
PWMH = 0 when 0% duty
25
FAN8620B
Retract Circuit
The retract function is the operation where the VCM moves from the data zone to the parking zone. It is off in the normal state.
It operates when power interrupt causes the spindle to stop.
_
U
V
W
Bandgap
Reference
21
Cret2
20
Q19
+
× 300
Retract
Enable
Iref
Iret
2V
Iretdly
-
2K
+
16
24
R16
19
VA
_
Rret
Cret
Figure 11. Retract block schematic
VA = 2.0V
2 × Rret
Vret =  -------------------------  – V BE, Q19 [ V ]
 Rret + 2k 
26
27
VCM
FAN8620B
Power Management Features
Low Power Interrupt:
The low power interrupt operation occurs when the power supply voltage (5V,12V) level drops below each threshold voltage.
The threshold voltage (Vth) and time delay (Tdly) may be adjustable by the external component value.
Vth
Tdly = CDLY --------- ,( Vth = 2.5V , I = 14µA)
I
VDD
11
VDD
VCC
CDLY
I = 14µA
R4
R7
+
5V SENSE 4
+
12V SENSE 42
+
_
R5
Q15
12
_
POR
R8
TSD
2.5V
R4 = 7k, R5 = 11k
R7 = 25k, R8 = 9k
Figure 12. Power on reset block schematic
Power on Reset
The power-on reset circuit monitors the voltage level of both +5V or +12V power supplies and chip temperature (thermal shut
down). The power-on reset circuit disables the spindle and VCM circuit when the power supply voltage level drops below the
reference voltage.
VDD, VCC
Vth
Vhys
T
POR
Tdly
Vbe
T
Figure 13. Power on reset function
27
FAN8620B
Vhys = 53mV
R4 + R5
VDD ;Vhys ( 5V ) = ---------------------- × Vhys
R5
R7 + R8
VDD ;Vhys ( 12V ) = ---------------------- × Vhys
R8
Default (pin4, pin42 : not connected)
VDD, th ≅ 4.1V
VCC ,th ≅ 9.4V
7k + 11k
VDD ;Vhys ( 5V ) = ----------------------- × 53mV ≅ 90mV
11k
25k + 9k
VDD ;Vhys ( 12V ) = ----------------------- × 53mV ≅ 200mV
9k
Regulator
The FAN8620B includes the voltage regulator for ASIC and other circuits. It consists bias circuit, the band gap reference and
the external NPN power transistor. The regulator voltage can be adjusted by the external resistor, R3a, R3b.
V REG
=
V REF  1 + R3a
----------- , V REF
R3b
= 1.3V
VDD
Bias
Block
Bandgap
Reference
Vref
+
7
VREF
VREG
R3a
Vadjust
3
R3b
Figure 14. low drop regulator schematic
if R3a = 20k, R3b = 13k
V REG
=
V REF  1 + R3a
-----------

R3b
20k
= 1.3 ×  1 + ---------- = 3.3V

13k
28
FAN8620B
STR_CLK
BEMF
DETECTION
STR_MASK
U_OUT
FG
Figure 15. Start-up mode
MCLK*2
U_OU T
FG
Figure 16. Acceleration mode 1
T1/4
2msec
T1/2
MCLK*2
T1
U_OUT
FG
Figure 17. Acceleration mode 2
29
FAN8620B
U_OUT
V_OUT
W_OU T
Figure 18. Output in hard-commutation mode
Switching Mode Conterting
FG
COM
O utput
Figure 19. commutation mode converting
U_OU T
V_OU T
W _OU T
Figure 20. Soft-commutation mode
30
FAN8620B
Figure 21. VCM recalibration flow
31
FAN8620B
Vrret
Iret
Vvcm
Figure 22. Retract & break at power off
32
FAN8620B
Typical Application Circuits
5V
R3a
Q1
R3b
GND
C11
SENSE5 SENSE12
4
42
11
3
7
POR
VREF
Bandgap
Reference
& Bias
Power
On
Reset
10
Thermal
Shutdown
FG
43
ADJ
CDLY
Zero
Cross
Detector
36
N
V
39
Cbrake
Brake
FG
Generator
6
U
V
W
Brake
Brake
AMP
W
M39a
M39b
C39
C40
40
MCLK
41 PVCC
8
CNTL1
U
44
3 State
Input
Control
CNTL2
45
CNTL3
37
Commutation
&
Spindle Motor
Control
46
V
C38
38
PWMSP
C48
R33
PWM
Decoder
& Filter
47
33
AMP
Vlimit
48
31
PWM
Decoder
& Filter
1
C2
U
2
V
W
20
Retract
13
12V
SUBGND
CRET2
D1
C20
24
RRET
R16
PWM
Decoder
& Filter
14
PCS
R24
Retract
VCM enable
PWML
W
32
CCOMP
PWMSF
PWMH
34
3-phase
Output
Driver
C15
Q16
16
VCM+ VCM-
PVCC 21
VCC
CRET C16
15
-
C9
9
HALFVCC
FILOUT
VCMREF4V
-
Gain:8,2
23, 35
SENSEOUT
25
VCM+
+
18
ERRIN
28
RS
D3
PGND
ERROUT
30
GND
17
5
29
VCC VDD
R25
R18
R30
C30
D4
+5V
33
CS
27
Gain:14
12
D2
SENSE 19
-
+
-
SENSE
22
Rsense
+
SENSE
Amplifier
VCM -
GAINSEL
VCM-
+
26
FAN8620B
Application Circuits
R42a
R42b
12V
5V
12V
R4a
C11
R4b
D4
5V
VREG
FG
6
MCLK
8
CNTL1
44
CNTL2
45
CNTL3
46
PWMSP
47
PWMSF
1
PWMH
13
PWML
14
Digital
Custom
ASIC
C48
48
C2
2
C15 15
SENSE12
10
SENSE5
POR
11
42
4
CDLY
17
5, 29
VCC
VDD
VREF
ADJ
C3
R3a
Q1
BRAKE
R3b
3
U
M39a
39
v
M39b
2003
C39
12V
CBRAKE 40
PVCC1 41
N 36
U 37
CFSP
C40
CFSF
CFVCM
HALFVCC
FAN8620B
C9
7
V
U
34
9
V
GAINSEL 12
W
+12V
22
D2
32
C38
38
VCM-
W
CCOMP
33
Rsense
CS
PCS
19
12V
R33
21
SENSE
PVCC2
D1
CRET2 20
RS
FILOUT
25
R18
R25
ERRIN
28
30
ERROUT
18
D3
VCM+
SENSEOUT
27
RRET
24
CRET
GND
16
C20
R16
23, 26, 31, 35
Q16
R24
C16
To Pin19
: option
R30 C30
34
FAN8620B
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
INTERNATIONAL. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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