SANYO LB1991

Ordering number : EN5792
Monolithic Digital IC
LB1991V
Three-Phase Brushless Motor Driver for Portable
VCR Capstan Motors
Overview
The LB1991V is a 3-phase brushless motor driver IC that
is optimal for driving the capstan motor in portable VCR
products.
• Speed control technique based on motor voltage and
current control.
• Built-in FG comparators
• Built-in thermal shutdown circuit
Functions
Package Dimensions
• 3-phase full-wave voltage drive technique (120°
voltage-linear technique)
• Torque ripple correction circuit (overlap correction)
unit: mm
3175A-SSOP24
Allowable power dissipation, Pd max — W
[LB1991V]
SANYO: SSOP24
Ambient temperature, Ta — °C
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
VCC1 max
10
V
VCC2 max
11
V
VS max
11
V
Applied output voltage
VO max
VS + 2
V
Maximum output current
IO max
1.0
A
Allowable power dissipation
Pd max
440
mW
Maximum supply voltage
Independent IC
Operating temperature
Topr
–20 to +75
°C
Storage temperature
Tstg
–55 to +150
°C
Ratings
Unit
Allowable Operating Ranges at Ta = 25°C
Parameter
Symbol
VCC1
Supply voltage
VCC2
Hall input amplitude
VHALL
Conditions
VCC1 ≤ VCC2
VS
Between Hall effect element inputs
2.7 to 6.0
V
3.5 to 9.0
V
Up to VCC2
V
±20 to ±80
mVp-p
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
53098RM (OT) No. 5792-1/7
LB1991V
Electrical Characteristics at Ta = 25°C, VCC1 = 3 V, VCC2 = 4.75 V, VS = 1.5 V
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
[Supply Current]
VCC1 current drain
ICC1
IOUT = 100 mA
3
5
mA
VCC2 current drain
ICC2
IOUT = 100 mA
7.0
10.0
mA
1.5
3.0
mA
100
µA
75
100
µA
VCC1 quiescent current
ICC1Q
VSTBY = 0 V
VCC2 quiescent current
ICC2Q
VSTBY = 0 V
ISQ
VSTBY = 0 V
VS quiescent current
[VX1]
High side residual voltage
VXH1
IOUT = 0.2 A
0.15
0.22
0.29
V
Low side residual voltage
VXL1
IOUT = 0.2 A
0.15
0.20
0.25
V
V
[VX2]
High side residual voltage
VXH2
IOUT = 0.5 A
0.25
0.40
Low side residual voltage
VXL2
IOUT = 0.5 A
0.25
0.40
V
Output saturation voltage
VO(sat)
1.4
V
87
%
+8
%
mV
Overlap
High/low overlap difference
O.L
∆O.L
IOUT = 0.8 A, Sink + Source
RL = 39 Ω × 3, Rangle = 20 kΩ *2
73
(Average high side overlap) –
(Average low side overlap) *2
–8
80
[Hall Amplifiers]
Input offset voltage
VHOFF
*1
–5
+5
Common-mode input voltage range
VHCM
Rangle = 20 kΩ
0.95
2.1
V
I/O voltage gain
VGVH
Rangle = 20 kΩ
25.5
31.5
dB
28.5
[Standby Pin]
High-level voltage
VSTH
Low-level voltage
VSTL
Input current
ISTIN
VSTBY = 3 V
Leakage current
ISTLK
VSTBY = 0 V
2.5
V
25
0.4
V
40
µA
–30
µA
[FRC Pin]
High-level voltage
VFRCH
Low-level voltage
VFRCL
Input current
IFRCIN
VFRC = 3 V
Leakage current
IFRCLK
VFRC = 0 V
Hall supply voltage
VHALL
IH = 5 mA, VH(+) – VH(–)
0.85
(–) pin voltage
VH(–)
IH = 5 mA
0.81
2.5
V
0.4
V
30
µA
–30
µA
0.95
1.05
V
0.88
0.95
V
20
[VH]
[FG Comparator]
Input offset voltage
Input bias voltage
VFGOFF
–3
+3
mV
IbFG
VFGIN+ = VFGIN– = 1.5 V
Input bias current offset
∆IbFG
VFGIN+ = VFGIN– = 1.5 V
Common-mode input voltage range
VFGCM
Output high-level voltage
VFGOH
At the internal pull-up resistors
Output low-level voltage
VFGOL
At the internal pull-up resistors
Voltage gain
VGFG
*1
Output current (sink)
IFGOS
For the output pin low level
TSD operating temperature
T-TSD
Design target value *1
180
°C
TSD temperature hysteresis
∆TSD
Design target value *1
20
°C
500
nA
–100
+100
nA
1.2
2.5
2.8
V
V
0.2
100
V
dB
5
mA
[TSD]
Notes: 1. Items specified as design target values in the conditions column are not tested.
2. The standard for overlap is the value as measured.
No. 5792-2/7
LB1991V
Pin Assignment
Truth Table
Source phase → Sink phase
1
2
3
4
5
6
V→W
W→V
U→W
W→U
U→V
V→U
W→V
V→W
W→U
U→W
V→U
U→V
Hall input
H
H
H
L
L
L
H
L
L
L
H
H
FRC
L
L
H
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
Note: The “H” entries in the FRC column indicate a voltage of 2.50 V or higher, and the “L” entries indicate a voltage of 0.4 V or lower. (When VCC1 is 3 V.)
At the Hall inputs, for each phase a high-level input is the state where the (+) input is 0.02 V or higher than the (–) input. Similarly, a low-level input is
the state where the (+) input is 0.02 V or lower than the (–) input.
No. 5792-3/7
LB1991V
Pin Functions
Pin No.
Pin
Equivalent circuit
1
VCC1
Supply voltage for all circuits other than the IC internal output block and
the amplitude control block.
2
VCC2
Supply voltage for the IC internal output control block and the
amplitude control block.
3
VS
Motor drive power supply. The voltage applied to this pin must not
exceed VCC2.
5
UOUT
U phase output
7
VOUT
V phase output (These outputs include built-in spark killer diodes.)
9
WOUT
W phase output
6, 8
Rf
10
VH+
Pin function
Ground for the output power transistors
Hall element bias voltage supply
A voltage that is typically 0.95 V is generated between the VH + and
VH– pins. (When IH is 5 mA.)
11
VH–
13
GND
14
FRC
Forward/reverse selection. Applications can select motor forward or
reverse direction rotation using this pin. (This pin has hysteresis
characteristics.)
15
STBY
Selects the bias supply for all circuits other than the FG comparators.
The bias supply is cut when this pin is set to the low level.
16
UIN1
17
UIN2
18
VIN1
19
VIN2
20
WIN1
21
WIN2
12
ANGLE
Hall input/output gain control. The gain is controlled by the resistor
connected between this pin and ground.
22
FGIN+
FG comparator noninverting inputs. There is no internally applied bias.
23
FGIN–
FG comparator inverting inputs. There is no internally applied bias.
24
FGOUT
FG comparator outputs. There is an internal 20-kΩ resistor load.
Ground for circuits other than the output transistor
The Rf pin potential is the lowest output transistor potential.
U phase Hall element input
The logic high level is the state where the IN+ voltage is greater than
the IN- voltage.
V phase Hall element input
The logic high level is the state where the IN+ voltage is greater than
the IN- voltage.
W phase Hall element input
The logic high level is the state where the IN+ voltage is greater than
the IN- voltage.
No. 5792-4/7
Hall amplifiers
Forward/re
verse
switching
Power to shaded blocks is
supplied from VCC2.
Upper and
lower
amplitude
limiters
current
distribution
FG amplifier
Hall power-supply
voltage output
circuit
Bias supply
1.2-V reference
voltage and bias
startup circuit
LB1991V
Block Diagram
Drive signal current generation block
Synthesized signal level shifters
Hall input synthesis (matrix)
No. 5792-5/7
LB1991V
Overlap Generation and Calculation Method
High side residual
voltage
High side clamp potential
Absolute voltage
Electrical
angle
Calculated center point
Low side clamp
potential
Low side residual
voltage
Time
[Overlap Generation]
Since the voltage generated in the amplitude control block is, taking the center point as the reference, 2 × <overlap> ×
(1/2 VS – VX) on one side, the intersection point of the waveform will be <overlap> × (1/2 VS – VX) from the center
point.
To clamp that waveform at (1/2 VS – VX) referenced to the center point the overlap must be:
A/B × 100 = <overlap> × 100 (%).
[Overlap Calculation]
• High side overlap
(VS – VXH – VXL)
(VS – VXH + VXL)
Calculated center point: VN = ———————— + VXL = ————————
2
2
Since A = Vα – VN, B = VS – VXH – VN, the high side overlap will be:
A
Vα – ((VS – VXH + VXL)/2)
<overlap> = — = —————————————— × 100 (%)
B
VS – VXH – ((VS – VXH + VXL)/2)
Which can be calculated as:
2Vα – (VS – VXH) – VXL
= ——————————— × 100 (%).
(VS – VXH) – VXL
• Low side overlap
Since C = VN – Vβ, and D = VN – VXL, the low side overlap will be:
C
((VS – VXH + VXL)/2)
<overlap> = — = ———————————— × 100
D
((VS – VXH + VXL)/2) – VXL
Which can be calculated as:
(VS – VXH) – VXL –2Vβ
= ——————————— × 100 (%).
(VS – VXH) – VXL
No. 5792-6/7
LB1991V
Test Circuit
■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace
equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of
which may directly or indirectly cause injury, death or property loss.
■ Anyone purchasing any products described or contained herein for an above-mentioned use shall:
➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and
distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all
damages, cost and expenses associated with such use:
➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on
SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees
jointly or severally.
■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for
volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied
regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of May, 1998. Specifications and information herein are subject to change
without notice.
PS No. 5792-7/7