FAIRCHILD 74VCX32245

Preliminary
Revised August 2001
74VCX32245
Low Voltage 32-Bit Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs (Preliminary)
General Description
Features
The VCX32245 contains thirty-two non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus
oriented applications. The device is byte controlled. Each
byte has separate 3-STATE control inputs which can be
shorted together for full 32-bit operation. The T/R inputs
determine the direction of data flow through the device.
The OE inputs disable both the A and B ports by placing
them in a high impedance state.
■ 1.65V–3.6V VCC supply operation
The 74VCX32245 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
■ Power-down high impedance inputs and outputs
The 74VCX32245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintaining low CMOS power dissipation.
■ Static Drive (IOH/IOL)
■ 3.6V tolerant inputs and outputs
■ tPD
2.5 ns max for 3.0V to 3.6V VCC
3.0 ns max for 2.3V to 2.7V VCC
6.0 ns max for 1.65V to 1.95V VCC
■ Supports live insertion/withdrawal (Note 1)
±24 mA @ 3.0V VCC
±18 mA @ 2.3V VCC
±6 mA @ 1.65V VCC
■ Uses patented noise/EMI reduction circuitry
■ Latchup performance exceeds 300 mA
■ ESD performance:
Human body model > 2000V
Machine model >200V
■ Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
Package Number
74VCX32245GX
(Note 2)
BGA96A
Package Description
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[Tape and Reel]
Note 2: BGA package available in Tape and Reel only.
Logic Symbol
© 2001 Fairchild Semiconductor Corporation
DS500415
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74VCX32245 Low Voltage 32-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs (Preliminary)
August 2001
74VCX32245
Preliminary
Connection Diagram
Pin Descriptions
Pin Names
Description
OEn
Output Enable Input (Active LOW)
T/Rn
Transmit/Receive Input
A0–A31
Side A Inputs or 3-STATE Outputs
B0–B31
Side B Inputs or 3-STATE Outputs
FBGA Pin Assignments
(Top Thru View)
Truth Tables
Inputs
Outputs
OE1
T/R1
L
L
Bus B0–B7 Data to Bus A0–A7
L
H
Bus A0–A7 Data to Bus B0–B7
H
X
HIGH Z State on A0–A7, B0–B7
Inputs
OE2
T/R2
Outputs
L
L
Bus B8–B15 Data to Bus A8–A15
L
H
Bus A8–A15 Data to Bus B8–B15
H
X
HIGH Z State on A8–A15, B8–B15
T/R3
Outputs
L
L
Bus B16–B23 Data to Bus A16–A23
L
H
Bus A16–A23 Data to Bus B16–B23
H
X
HIGH Z State on A16–A23, B16–B23
Inputs
OE4
T/R4
Outputs
L
L
Bus B24–B31 Data to Bus A24–A31
L
H
Bus A24–A31 Data to Bus B24–B31
H
X
HIGH Z State on A24–A31, B24–B31
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs and I/O’s may not float)
Z = High Impedance
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2
4
5
6
A
B1
B0
B
B3
B2
T/R1
OE1
A0
A1
GND
GND
A2
C
B5
B4
A3
VCC
VCC
A4
D
B7
A5
B6
GND
GND
A6
E
A7
B9
B8
GND
GND
A8
F
A9
B11
B10
VCC
VCC
A10
A11
G
B13
B12
GND
GND
A12
A13
H
B14
B15
T/R2
OE2
A15
A14
2
3
J
B17
B16
T/R3
OE3
A16
A17
K
B19
B18
GND
GND
A18
A19
L
B21
B20
VCC
VCC
A20
A21
M
B23
B22
GND
GND
A22
A23
N
B25
B24
GND
GND
A24
A25
P
B27
B26
VCC
VCC
A26
A27
R
B29
B28
GND
GND
A28
A29
T
B30
B31
T/R4
OE4
A31
A30
Logic Diagram
Inputs
OE3
1
Preliminary
Supply Voltage (VCC)
−0.5V to +4.6V
DC Input Voltage (VI)
−0.5V to +4.6V
Recommended Operating
Conditions (Note 5)
Power Supply
Output Voltage (VO)
Operating
−0.5V to +4.6V
Outputs 3-STATE
Outputs Active (Note 4)
−0.5 to VCC + 0.5V
DC Input Diode Current (IIK) VI < 0V
1.2V to 3.6V
−0.3V to 3.6V
Input Voltage
−50 mA
Output Voltage (VO)
DC Output Diode Current (IOK)
Output in Active States
VO < 0V
−50 mA
VO > VCC
+50 mA
0.0V to 3.6V
Output Current in IOH/IOL
±50 mA
(IOH/IOL)
0V to VCC
Output in 3-STATE
DC Output Source/Sink Current
VCC = 3.0V to 3.6V
±24 mA
VCC = 2.3V to 2.7V
±18 mA
VCC = 1.65V to 2.3V
DC VCC or Ground Current per
±100 mA
Supply Pin (ICC or Ground)
Storage Temperature Range (TSTG)
1.65V to 3.6V
Data Retention Only
±6 mA
Free Air Operating Temperature (TA)
−65°C to +150°C
−40°C to +85°C
Minimum Input Edge Rate (∆t/∆V)
VIN = 0.8V to 2.0V, VCC = 3.0V
10 ns/V
Note 3: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the “Electrical
Characteristics” table are not guaranteed at the Absolute Maximum Ratings. The Recommended Operating Conditions tables will define the conditions for actual device operation.
Note 4: IO Absolute Maximum Rating must be observed.
Note 5: Floating or unused pin (inputs or I/O's) must be held HIGH or LOW.
DC Electrical Characteristics
Symbol
(2.7V < VCC ≤ 3.6V)
Parameter
Conditions
VCC
(V)
VIH
HIGH Level Input Voltage
2.7–3.6
VIL
LOW Level Input Voltage
2.7–3.6
VOH
HIGH Level Output Voltage
VOL
LOW Level Output Voltage
Min
Max
2.0
V
0.8
IOH = −100 µA
2.7–3.6
VCC − 0.2
IOH = −12 mA
2.7
2.2
IOH = −18 mA
3.0
2.4
IOH = −24 mA
3.0
2.2
IOL = 100 µA
2.7–3.6
0.2
IOL = 12 mA
2.7
0.4
IOL = 18 mA
3.0
0.4
IOL = 24 mA
II
Input Leakage Current
0V ≤ VI ≤ 3.6V
IOZ
3-STATE Output Leakage
0V ≤ VO ≤ 3.6V
VI = V IH or VIL
V
3.0
0.55
2.7–3.6
±5.0
µA
2.7–3.6
±10
µA
µA
Power Off Leakage Current
0V ≤ (VI, VO) ≤ 3.6V
0
10
ICC
Quiescent Supply Current
VI = V CC or GND
2.7–3.6
40
VCC ≤ (VI, VO) ≤ 3.6V (Note 6)
2.7–3.6
±40
VIH = VCC − 0.6V
2.7–3.6
750
Increase in ICC per Input
V
V
IOFF
∆ICC
Units
µA
µA
Note 6: Outputs disabled or 3-STATE only.
3
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74VCX32245
Absolute Maximum Ratings(Note 3)
74VCX32245
Preliminary
DC Electrical Characteristics (2.3V ≤ VCC ≤ 2.7V)
Symbol
Parameter
Conditions
VCC
(V)
VIH
HIGH Level Input Voltage
2.3–2.7
VIL
LOW Level Input Voltage
2.3–2.7
VOH
HIGH Level Output Voltage
VOL
LOW Level Output Voltage
IOH = −100 µA
2.3–2.7
Min
Max
1.6
Units
V
0.7
V
VCC − 0.2
IOH = −6 mA
2.3
2.0
IOH = −12 mA
2.3
1.8
1.7
V
IOH = −18 mA
2.3
IOL = 100 µA
2.3–2.7
0.2
IOL = 12 mA
2.3
0.4
IOL = 18 mA
2.3
0.6
2.3–2.7
±5.0
µA
2.3–2.7
±10
µA
0
10
µA
II
Input Leakage Current
0 ≤ VI ≤ 3.6V
IOZ
3-STATE Output Leakage
0 ≤ VO ≤ 3.6V
IOFF
Power Off Leakage Current
0 ≤ (VI, VO) ≤ 3.6V
ICC
Quiescent Supply Current
VI = VCC or GND
2.3–2.7
40
VCC ≤ (VI, VO) ≤ 3.6V (Note 7)
2.3–2.7
±40
VI = VIH or VIL
V
µA
Note 7: Outputs disabled or 3-STATE only.
DC Electrical Characteristics (1.65V ≤ VCC < 2.3V)
Symbol
Parameter
Conditions
VCC
(V)
VIH
HIGH Level Input Voltage
1.65-2.3
VIL
LOW Level Input Voltage
1.65-2.3
VOH
HIGH Level Output Voltage
VOL
LOW Level Output Voltage
IOH = −100 µA
Min
Max
0.65 × VCC
V
0.35 × VCC
V
1.65-2.3
VCC − 0.2
IOH = −6 mA
1.65
1.25
IOL = 100 µA
1.65-2.3
0.2
1.65
0.3
1.65-2.3
±5.0
µA
1.65-2.3
±10
µA
µA
IOL = 6 mA
II
Input Leakage Current
0 ≤ VI ≤ 3.6V
IOZ
3-STATE Output Leakage
0 ≤ VO ≤ 3.6V
VI = VIH or VIL
V
IOFF
Power Off Leakage Current
0 ≤ (VI, VO) ≤ 3.6V
0
10
ICC
Quiescent Supply Current
VI = VCC or GND
1.65-2.3
40
VCC ≤ (VI, VO) ≤ 3.6V (Note 8)
1.65-2.3
±40
Note 8: Outputs disabled or 3-STATE only.
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Units
4
V
µA
Preliminary
(Note 9)
TA = −40°C to +85°C, CL = 30 pF, RL = 500Ω
Symbol
Parameter
VCC = 3.3V ± 0.3V
Min
VCC = 2.5 ± 0.2V
Max
Min
VCC = 1.8V ± 0.15V
Max
Min
Units
Max
tPHL, tPLH
Prop Delay
0.8
2.5
1.0
3.0
1.5
6.0
ns
tPZL, tPZH
Output Enable Time
0.8
3.8
1.0
4.9
1.5
9.3
ns
tPLZ, tPHZ
Output Disable Time
0.8
3.7
1.0
4.2
1.5
7.6
ns
VCC
TA = +25°C
(V)
Typical
1.8
0.25
2.5
0.6
3.3
0.8
1.8
−0.25
2.5
−0.6
3.3
−0.8
1.8
1.5
2.5
1.9
3.3
2.2
Note 9: For CL = 50pF, add approximately 300ps to the AC maximum specification.
Dynamic Switching Characteristics
Symbol
VOLP
Parameter
Quiet Output Dynamic
Conditions
CL = 30 pF, VIH = VCC, VIL = 0V
Peak VOL
VOLV
Quiet Output Dynamic
CL = 30 pF, VIH = VCC, VIL = 0V
Valley VOL
VOHV
Quiet Output Dynamic
CL = 30 pF, VIH = VCC, VIL = 0V
Valley VOH
Units
V
V
V
Capacitance
TA = +25°C
Units
CIN
Input Capacitance
VCC = 1.8V, 2.5V, or 3.3V, VI = 0V or VCC
6
pF
CI/O
Output Capacitance
VI = 0V, or VCC, VCC = 1.8V, 2.5V or 3.3V
7
pF
CPD
Power Dissipation Capacitance
VI = 0V or VCC, F = 10 MHz
20
pF
Symbol
Parameter
Conditions
VCC = 1.8V, 2.5V or 3.3V
5
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74VCX32245
AC Electrical Characteristics
74VCX32245
Preliminary
AC Loading and Waveforms
FIGURE 1. AC Test Circuit
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V;
VCC x 2 at VCC = 2.5 ± 0.2V; 1.8V ± 0.15V
tPZH, tPHZ
GND
FIGURE 2. Waveform for Inverting and Non-inverting Functions
FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic
FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic
Symbol
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VCC
3.3V ± 0.3V
2.5V ± 0.2V
1.8V ± 0.15V
Vmi
1.5V
VCC/2
VCC/2
Vmo
1.5V
VCC/2
VCC/2
VX
VOL + 0.3V
VOL + 0.15V
VOL + 0.15V
VY
VOH − 0.3V
VOH − 0.15V
VOH − 0.15V
6
Preliminary
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Package Number BGA96A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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7
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74VCX32245 Low Voltage 32-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs (Preliminary)
Physical Dimensions inches (millimeters) unless otherwise noted