SEMTECH SC2422ACSTR

BIPHASE CURRENT MODE
CONTROLLER
PRELIMINARY - August 7, 2000
SC2422A
TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com
DESCRIPTION
FEATURES
The SC2422A biphase, current mode controller is designed to work with Semtech smart synchronous
drivers, such as the SC1205, SC1305 or the SC1405 to
provide the DC/DC converter solution for the most
demanding Micro-processor applications. Input current
rather than output current sensing is used to guarantee
precision phase to phase current matching using a
single sense resistor on the input power line. Accurate
current sharing and pulse by pulse current limit are
implemented without the power loss and transient response degradation associated with output current
sense methods. Two phase operation allows significant
reduction in input/output ripple while enhancing transient response.
•
The DAC step size and range are programmable with
external components thus allowing compliance with
new and emerging VID ranges.
A novel approach implements active droop, minimizing
output capacitor requirements during load transients.
This avoids the pitfalls of the passive droop implementation. This feature also allows easy implementation of
N+1 redundancy and current sharing among modules.
Precision, pulse by pulse phase current matching
Active drooping allows for best transient response
Input Sensing Current mode control
Programmable DAC step size/offset allows
Compliance with VRM9.0, VRM8.3 or VRM8.4
Externally programmable soft-start
5V or 12V input for next generation processors
0% minimum duty cycle improves transient response
Externally Programmable UVLO with hysteresis
Cycle by cycle current limiting
Programmable Internal Oscillator to 1 MHz
VID IIIII Inhibit (No CPU)
•
•
•
•
•
•
•
•
•
•
APPLICATIONS
•
•
•
Intel Advanced Microprocessors
TM
AMD Athlon power supplies
Servers/Workstations, high density power supplies
ORDERING INFORMATION
(1)
Programmable Under Voltage Lockout assures proper
start-up and shutdown by synchronizing the controller
to the driver supply. Wide PWM frequency range allows
use of low profile, surface mount components.
PACKAGE
TEMP. RANGE (TJ)
SC2422ACS.TR
SO-16
0 - 125°C
SC2422A.EVB
Evaluation Board
Note:
(1) Only available in tape and reel packaging. A reel contains 1000 devices.
TYPICAL APPLICATION SCHEMATIC
INPUT
DEVICE
VIN
VID3
BGOUT
VID2
OC+
VID1
OUT1
VID0
OUT2
16
3
2
15
4
5
6
ERROUT
OC-
FB
UVLO
8
GND
RREF
5
11
VIN
10
9
IN
DRVH
VCC
PHASE
VDD
DRVL
7
6
5
SC1305
2
SC2422A
DRVL
12
4
Rref
VDD
6
SC1305
3
Rf
PHASE
13
1
7
VCC
7
2
4
14
DRVH
8
3
IN
BOOST
VCC
PGND
To Processor
VID control
VID4
PGND
1
1
BOOST
8
Rsens
Ri
Vout
1
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Maximum
Units
VIN
V
V
°C
°C
°C/W
Input DC Rail Voltage to GND
PGND to GND
Operating Temperature Range
Junction Temperature
Thermal Resistance Junction to Case
θJC
15
+1
-20 to 125
0 to 125
20
Thermal Resistance Junction to Ambient
θJA
60
°C/W
TSTG
TLEAD
-65 to +150
300
°C
°C
TA
TJ
Storage Temperature Range
Lead Temperature (Soldering) 10 sec
ELECTRICAL CHARACTERISTICS
Unless specified: VCC = +5V, TAMB = 25°C, RREF = 11.5kΩ. See Typical Application Circuit
Parameter
Conditions
Min
Typ
Max
Units
4.5
5
14
V
Chip_Supply
IC Supply Voltage
IC Supply Current
VCC = 5.0 ~ 12.0V
9
mA
CBG = 4.7nF
1.5
V
3
kΩ
VCC = 5.0V ~ 12.0V
2
mV/V
RI = 6.49kΩ, RREF = 11.5kΩ
25
mV
Reference Section
Bandgap Output
Source Impedance
Supply Rejection
VID Step
Voltage Accuracy
-1
1
%
Temperature Stability
0°C < TAMB < 70°C
5
%
Voltage Accuracy
0°C < TAMB < 70°C
+/-1
%
Oscillator Section
Frequency Range
400
Frequency Accuracy
VIN = 12.0V, RREF = 13kΩ
or VIN = 5.0V, RREF =11.5kΩ
Temperature Stability
0°C < TAMB < 70°C
450
500
1000
kHz
550
kHz
+/-5
%
Input Offset Voltage
+/-5
mV
Input Offset Current
0.1
µA
1V < VERROUT < 4V
90
dB
PSRR
VCC = 5 - 12V
80
dB
Output Sink Current
VERROUT = 1V
2.5
mA
Output Source Current
VERROUT = 4V
2
mA
Unity Gain Bandwidth
IO < 100µA
5
MHz
Slew Rate
IO < 100µA
10
V/uS
Voltage Error Amplifier
Open Loop Gain
2
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
ELECTRICAL CHARACTERISTICS (Cont)
Unless specified: VCC = +5V, TAMB = 25°C, RREF = 11.5kΩ.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Current Sense Amplifier
Amplifier Gain
(VOC- - VOC+ ) < 100mV
26
dB
Input Offset Voltage,
Input Referred
(VOC- - VOC+ ) < 100mV
4
mV
CMRR
VICM = 9 ~ 14V @ DC
80
dB
PSRR
VCC = 9 ~ 14V @ DC
80
dB
Input Common Mode Range
Max Differential Signal/
Current Limit Threshold
VCC +/0.3
VOC- - VOC+
100
mV
Current limit activation to OUT 1 & OUT
2 switching off
60
ns
UVLO Ramp-up Threshold
RSOURCE UVLO pin = 20kΩ
1.475
V
UVLO Ramp-down Threshold
RSOURCE UVLO pin = 20kΩ
1.375
V
Per phase, FOSC = 500kHz
47
%
I-Limit Delay
Protection
Outputs (OUT 1, OUT 2)
Max Duty Cycle
Duty Match
Typical Output Voltage Swing
FOSC = 500kHz
-.5
.5
%
RL = 10kΩ
.8
2.5
V
RL = 100kΩ
.2
3.3
V
0.8
2
V
VID Logic Threshold
VID Logic Pin Bias Current
VIN = 0
12
µA
Note:
1. If the VID pins are driven high by an external source (in contrast to being left open), then all VIDs input will need
to be externally pulled high. If VIDs are left open, no external pull-up is required.
2. This device is ESD sensitive. Use of standard ESD handling precautions is required.
3
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
PIN DESCRIPTION
Pin 1: VID4 , MSB
sense resistor.
Pin 12: OUT2 PWM output for phase 2. Drives external Power MOSFET driver.
Pin 2: VID3
Pin 13: OUT1 PWM output for phase 1. Drives external Power MOSFET driver.
Pin 3: VID2
Pin 4: VID 1
Pin 14: OC+ Input current sense positive input. This
pin is connected to MOSFET side of the current sense
resistor.
Pin 5: VID0 , LSB
Pin 6: ERROUT Error-amplifier output.
Pin 8: RREF Frequency setting resistor pin. Also programs the DAC current step size. (see application information for programming the frequency)
Pin 15: BGOUT Soft start and reference. Bypass to
ground (GSEN) with a .022µF - 0.1µF capacitor to implement soft start in conjunction with internal 3KΩ resistor. To ensure output voltage accuracy, the maximum current source/sink from this pin should be limited to 0.5 uA.
Pin 9: GND Chip ground.
Pin 16: VCC Chip positive supply.
Pin 7: FB Error-amplifier inverting input.
Pin 10: UVLO Programmable Under Voltage LockOut. This pin may be connected to the MOSFET driver
supply through a voltage divider to inhibit the SC2422A
until the drivers are on. The UVLO comparator trip
point is 1.5V.
Pin 11: OC- Input current sense, negative input. This
pin is connected to the input supply side of the current
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAM
Top View
(16-Pin SOIC)
4
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
OUTPUT VOLTAGE (VRM 9.0)
Unless specified: 0 = GND; 1 = High (or Floating).
TA = 25°C, VCC = 5V, 2-Phase operation
VCCCORE
VID4
VID3
VID2
VID1
VID0
(VDC)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Output Off
1.1
1.125
1.15
1.175
1.2
1.225
1.250
1.275
1.3
1.325
1.35
1.375
1.4
1.425
1.45
1.475
1.5
1.525
1.55
1.575
1.6
1.625
1.65
1.675
1.7
1.725
1.75
1.775
1.8
1.825
1.85
5
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
C9
1u,16V
S1
8
7
6
5
4
3
2
1
Vout/Clk switch
9
10
11
12
13
14
15
16
C7
820uf,16V
TO OPERATE
FROM +12V:
R3=20.5
R6=open
R11=2.7K
R14=12.40K
R17=7.50K
R19=31.6K
R30=20.5
R32=120K
R33=22K
C25=150pf
C99=1nf
Place jumper for
EN control
of SC1205's
INPUT
1
2
3
4
5
6
J1
+5V
820uf,16V
ENABLE
EN
C34
820uf,16V
6.49k
R17
R19
26.1k
C25
100pf
10k
R11
C6
U2
RREF
FB
11.5k
C13
1uf
local gnd
SC2422A
ERROUT
VID0
VID1
VID2
VID3
VID4
R14
8
7
6
5
4
3
2
1
R2
10
GND
UVLO
OC-
OUT2
OUT1
OC+
BGOUT
VCC
9
10
11
12
13
14
15
16
R30
0
X
*
.1
*
C99
open
41.2
36k
R33
R32 C21
75k
R99
0
R31
open
C11
10nf
R3
C26
10uf
+5V
C18
EN
+5V
10uf
VIN
Cut at X and install R99 to
enable Driver side UVLO
6
10k
R20
4
5
6
C1
1uf
4
EN5
* Droop=95mv at 1.6V and 35A load, with above values.
Change R10 to change droop. Large changes may affect
DC offsets. R19 controls output offset, set for
VID=01010=1.600V
100k
R10
C10
10u,CER
R6
.005
R1
.005
1
R18
SC1205S
CO
EN
VS
U3
LL42
D6
SC1205S
CO
EN
VS
LL42
U1
D7
3
TG
BG
DRN
TG
BG
7
1
2
7
1
2
10u,CER
C2
DRN
BST
GND
8
3
BST
GND
8
© 2000 SEMTECH CORP.
*
C3
0
Q1
Q5
GFB70N03
Q4
R4
2.2
C8
.01
L1
TTIB1106-450
2.2
R21
C27
.01
C30
.01
2.2
R15
L2
R22 TTIB1106-450
2.2
.01
C32
.1
C15
VCORE
.1
FDB7030BL
C22
Q3
GFB70N03
R8
0
R9
C4
1uf
FDB7030BL
R5
0
VIN
R13
0
10u,CER
Vin
10u,CER
C31
10u,CER
C29
10u,CER
C28
10u,CER
C24
10u,CER
C23
10u,CER
C20
10u,CER
C19
10u,CER
C17
10u,CER
C16
820uf,16V
C35
820uf,16V
C14
820uf,16V
C12
820uf,16V
C5
820uf,OS
C33
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
Figure 1:
TM
SC2422A SCHEMATIC WITH +5V INPUT FOR THE AMD ATHLON PROCESSOR
6
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
Applications Information
The SC2422A is an Input Current Mode Controller designed for High Current, High performance two phase
DC/DC converters. The Current mode control is implemented by generating the PWM ramp from the Input
Current, rather than the output current. This has the
advantage of eliminating the output current sense resistors, and the power loss associated with output current sensing. Eliminating the output current sense resistors has the added advantage of improving the transient response by reducing the output impedance.
The output voltage is programmed via a 5-bit DAC in
32 steps. A novel technique allows programmable
DAC step size and output offset, allowing the SC2422A
based DC/DC converters to work in VRM9.0, VRM 8.3,
VRM8.4, VRM8.5 or future specified voltage ranges.
ramp voltage equals the error amplifier output signal.
The current mode control is inherently immune to input
voltage changes because the ramp amplitude reflects
the input voltage changes.
Since the input current sense resistor is the same for
both phases, the inherent inaccuracy due to mismatch
between output current sense resistors is avoided.
Also, since the comparator threshold is the same for
both phases, accurate current matching is achieved
between phases. This implements a pulse by pulse
current matching with a faster response to changes in
output current by monitoring the input current for each
phase.
Programming the SC2422A
Figure 2 below, is the connection schematic for the Internal Error Amplifier.
Theory of Operation
Bandgap
1.5V
3K
Pulse by Pulse Current Matching
BGOUT (P15)
E/A
Vid0
The operation of the Input Current Mode, ICM, is as
follows:
The SC2422A Oscillator generates the OUT1 and
OUT2 logic output drives. OUT1 and OUT2 are nonoverlapping and sequentially command an external,
power MOSFET driver to turn on the Top MOSFETs.
When the Top MOSFET is enhanced (each phase),
the input voltage is impressed across the MOSFET
and the output Inductor. The AC current in the inductor
is:
IL =
( VIN − VOUT ) x TON ( VIN
=
L
−
VOUT ) x D
+
Io
DAC
Ccomp
Vid4
VOUT
ERROUT(P6)
Rcomp
FB(P7)
Ri
Rf
Ros
Figure 2: Error amplifier connections
The external components, RI, ROS and RF set the DAC
step size, output voltage offset and droop, accordingly.
A resistor from RREF (pin 8) to ground programs the
frequency as well as the DAC current step size.
FxL
Programming the Switching Frequency
Where F is the frequency (per phase) and L is the output inductor. D is the duty cycle and is approximately
equal to VO/VIN. The approximation arises from the
fact that the Duty cycle extends slightly to compensate
for losses in the current path. These losses include
RDS_ON of the MOSFET, the Equivalent Series Resistance of the Inductors and the PCB trace resistances.
The inductor current flows in the input current sense
resistor, generating a PWM ramp, same as in all current mode controllers. The ramp is compared with an
amplified, level shifted and filtered version of the output
voltage at the PWM comparator. The comparator then
outputs a gate drive pulse that terminates when the
The oscillator frequency can be selected first by setting
the value of RREF resistor (pin 8) to ground.
fOSC =
13 k Ω * 500 kHz
R REF
VIN = 12 V
The switching frequency per phase is 1/2 of the above
oscillator frequency.
7
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
Programming the DAC Step Size
The SC2422A allows programming the output voltage
and the DAC step size by selecting external resistors.
The DAC current step size, for one MSB is:
IDAC _ MSB =
VBG
R REF
where RREF is the resistor from RREF pin to Ground.
The DAC MSB voltage step size is calculated as follows:
VDAC_MSB = IDAC_MSB * RI
VDAC _ LSB =
VDAC _ MSB
32
or
VDAC _ LSB =
VBG
R
∗ I
R REF
32
Note that changing RREF affects both frequency and
DAC step size. RI must be proportionally adjusted to
keep the same step size at different frequencies. The
advantage of this method is that all new VID specifications can be accommodated by modifying external
components while maintaining the required precision
without the need for converter redesign.
Programming the DAC Offset Voltage
Kirchoff’s current law can be applied to the error amplifier’s Inverting node (see figure 2) to calculate ROS, the
DAC offset setting resistor. The output Offset at zero
DAC current (VID=00000), is set as follows:
R OS =
VBG
VO − VBG VEO − VBG
+
RI
RF
Where VEO is the error amplifier output voltage and as
a first approximation is equal to 1.75V.
Where VBG = Precision Reference Voltage = 1.50V.
The value of ROS can be fine trimmed using a potentiometer connected from the FB pin to ground.
the output voltage specification. As the load is increased, the output “droops” towards the lower limit.
This makes optimum use of the output voltage error
band, yielding minimum output capacitor size and cost.
Active drooping, does not compromise the converter
response time as does passive droop techniques. The
active droop also allows for an accurate Inter-Module
current sharing scheme, where multiple DC/DC converters are required to share the current required by a
DC bus. As one module supplies more current, that
modules output voltage ”droops”, allowing other modules to provide the balance of the required current.Any
changes in the output voltage is instantaneously reflected to the error amplifier, which has a high Slew
Rate and wide Gain-Bandwidth product to recover the
output voltage to its nominal level with minimal delay.
The droop is adjusted by setting the feedback resistor,
Rf. While the optimum value of RF may be derived experimentally, the following equation can provide the
droop at a given output current:
VDROOP =
G CA * R I * R S * IOUT
2 RF
The Gain of the current amplifier is set to 20 (26dB),
while RS is the input sense resistor.
The effective inductance of the sense resistor must be
minimized to achieve accurate correlation between the
above equation and actual droop achieved. This is because the inductive spike, which may also be caused
by layout inductance's, will alter the PWM comparator
trip point. The value of RF may have to be adjusted to
compensate for such parasitic effects.
Since Rf also sets the DC gain of the system, changing
the value of Rf affects the offset voltage, which is set
via Ros. The value of Ros can be modified to achieve
exact offset after the droop resistor has been chosen.It
must be noted that the Current Amplifier gain is quite
precise, with greater than 80dB of Common Mode Rejection Ratio (CMRR). Thus the droop’s accuracy is
limited primarily by external components tolerances
and the external parasitic effects.
Loop Gain Considerations
The Modulator gain in Input Current Mode control is
equal to:
Programming the Dynamic (Active) Droop
The SC2422A employs a novel approach to active
drooping for optimum transient response. The output
voltage is regulated as a function of output current. At
zero current the output is regulated to the upper limit of
K MOD =
VIN
VRAMP
VRAMP = 0.3 V + R SENSE X TOSC X GCA X
VIN − VO
L
8
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
Where:
RS = Input current sense resistor
TOSC = Oscillator period
GCA = Current Amplifier Gain
0.3V is the ramp added for slope compensation when
the output current is near zero.
The DC loop gain is the product of the modulator gain
and the error amplifier gain and is calculated as follows:
GLOOP =
VIN * RF
VRAMP * RI
Refer to Application note AN00-1 for detailed treatment
of frequency compensation component selection as well
as programming the SC2422A. The application note is
available on the Semtech website or by contacting the
factory.
Programming the Under Voltage Lockout
The SC2422A may be operated from any supply in +5V
to +12V range. A pin has been dedicated to externally
selecting the voltage at which the SC2422A outputs are
active. A good typical turn-on threshold value is 4.5V for
a +5V input supply and 9V for a +12V supply. A voltage
divider connected to the UVLO pin selects this threshold.
The UVLO comparator trip point is approximately
1.475V. Sufficient hysterisis is provided to ensure
proper DC/DC converter shutdown.
The UVLO setting should consider external MOSFET
driver’s UVLO threshold. Ideally, the external MOSFET
driver should turn on before the SC2422 controller and
turn off before the controller. This assures the converter
output will rise and fall slowly using the soft start feature
and that the output voltage will not go negative at turnoff.
PCB layout
Considerations in Input Current Mode DC/DC Converters”. This application note is available by contacting the factory.
Remote Sensing Capability
The SC2422 has a single ground for error amplifier
and DAC reference and for the internal biasing of the
chip. Since the chip uses approximately 10ma of quiescent current, the ground pin may be connected to a
remote location without fear of ground loops. When
used as a microprocessor power supply, connecting
the ground pin directly to the ground plane may result
in undesirable voltage drops in the plane at high output current. This is not entirely predictable since the
error amplifier is correcting for the DC error with reference with the ground plane and not the processor
“feedback ground”. Thus any voltage difference between the two ground will result in a DC error. This
error will obviously consume valuable static error
band tolerance. To avoid this DC error, the SC2422
ground pin (pin 9) can be connected to a copper
“Island”, to which Rref (frequency setting resistor)
and Ros (offset setting resistor) will also be connected. This “Island” in turn will only be connected to
the “Processor Feedback” ground via a trace. While
the trace may be long, it should not be routed through
or near the switching sections or noisy components.
This method of remote sensing will alleviate the need
for a differential amplifier to sense the output voltage/
output return pair and the design effort and costs associated with it.
SC2422A Evaluation Board
The SC2422A based DC/DC converter utilizes the
SC1205 High Speed MOSFET drivers to achieve
VRM 9.0 output Voltage Specifications. SC2422A
Evaluation Board Schematic (Figure 1) shows the
circuit for a 40A, BiPhase DC/DC converter. The
Evaluation board is available by contacting the factory or Semtech website at WWW.Semtech.com.
Care must be excercised when laying out the PC board
for SC2422 or other input current mode DC/DC converters. SInce the current is delivered and sensed in pulse
packets, the inductance of the current carrying traces
and thus their length must be minimized. Ceramic bypass capacitors must be located near the sense resistor.
For a detailed treatment and circuit parasitic models,
consult application note:
AN00-7:“Component Selection and PC Board layout
9
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
OUTLINE DRAWING SO-16
Jedec MS-012AC
LAND PATTERN SO-16
ECN00-1242
10
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320