SR2.8 RailClamp™ Low Capacitance TVS Diode Array PROTECTION PRODUCTS Description Features ! ESD protection to IEC 61000-4-2, Level 4 ! Array of surge rated diodes with internal RailClamps are surge rated diode arrays designed to protect high speed data interfaces. The SR series has been specifically designed to protect sensitive components which are connected to data and transmission lines from overvoltage caused by ESD (electrostatic discharge), EFT (electrical fast transients), and tertiary lightning. The unique design of the SR series devices incorporates four surge rated, low capacitance steering diodes and a TVS diode in a single package. The TVS diode is constructed using Semtech’s proprietary low voltage EPD technology for superior electrical characteristics at 2.8 volts. During transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground. The internal TVS diode prevents over-voltage on the power line, protecting any downstream components. The low capacitance array configuration allows the user to protect two high-speed data or transmission lines. The low inductance construction minimizes voltage overshoot during high current surges. ! ! ! ! ! EPD TVS diode Protects two I/O lines Low capacitance (<10pF) for high-speed interfaces Low leakage current (< 1µA) Low operating voltage: 2.8V Solid-state technology Mechanical Characteristics ! ! ! ! JEDEC SOT-143 package Molding compound flammability rating: UL 94V-0 Marking : R2.8 Packaging : Tape and Reel per EIA 481 Applications ! ! ! ! ! ! ! Circuit Diagram 10/100 Ethernet Firewire Sensitive Analog Inputs Video Line Protection Portable Electronics Microcontroller Input Protection WAN/LAN Equipment Schematic & PIN Configuration Pin 4 4 1 Pin 2 Pin 3 2 3 Pin 1 SOT-143 (Top View) Revision 9/2000 1 www.semtech.com SR2.8 PROTECTION PRODUCTS Absolute Maximum Rating R ating Symbol Value Units Peak Pulse Power (tp = 8/20µs) Pp k 200 Watts Peak Pulse Current (tp = 8/20µs) IP P 14 A Peak Forward Voltage (IF = 1A, tp=8/20µs) VFP 1.5 V Lead Soldering Temperature TL 260 (10 sec.) °C Operating Temperature TJ -55 to +125 °C TSTG -55 to +150 °C Storage Temperature Electrical Characteristics SR 2.8 Par ame te r Reverse Stand-Off Voltage Symbo l Co nditio ns Minimum Typical VRWM Maximum Units 2.8 V Punch-Through Voltage V PT IPT = 2µ A 3.0 V Snap -Back Voltage VSB ISB = 50mA 2.8 V Reverse Leakage Current IR VRWM = 2.8V, T=25°C 1 µA Clamp ing Voltage VC IPP = 1A, tp = 8/20µ s 5.0 V Clamp ing Voltage VC IPP = 5A, tp = 8/20µ s 8.5 V Maximum Peak Pulse Current IP P tp = 8/20µ s 14 A Junction Cap acitance Cj Between I/O p ins and Gnd VR = 0V, f = 1MHz 6 10 pF Between I/O p ins VR = 0V, f = 1MHz 3 2000 Semtech Corp. 2 pF www.semtech.com SR2.8 PROTECTION PRODUCTS Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time Power Derating Curve 10 110 % of Rated Power or PI P Peak Pulse Power - PPP (kW) 100 1 0.1 90 80 70 60 50 40 30 20 10 0 0.01 0.1 1 10 100 0 1000 25 50 Pulse Duration - tp (µ µs) 75 100 125 150 Ambient Temperature - TA (oC) Pulse Waveform Clamping Voltage vs. Peak Pulse Current 110 80 70 18 Clamping Voltage - V C (V) 90 Percent of IPP 20 Waveform Parameters: tr = 8µs td = 20µs 100 -t e 60 50 40 td = IPP/2 30 20 16 14 12 10 8 6 Waveform Parameters: tr = 8µs td = 20µs 4 2 10 0 0 0 5 10 15 20 25 30 0 Time (µ µs) 5 10 15 20 Peak Pulse Current - IPP (A) Forward Voltage vs. Forward Current 10 Forward Voltage - VF (V) 9 8 7 6 5 4 3 Waveform Parameters: tr = 8µs td = 20µs 2 1 0 0 5 10 15 20 25 30 35 40 45 50 Forward Current - I F (A) 2000 Semtech Corp. 3 www.semtech.com SR2.8 PROTECTION PRODUCTS Applications Information Data Line and Power Supply Protection Using Vcc as reference Device Connection Options for Protection of Two High-Speed Data Lines The SR2.8 TVS is designed to protect two data lines from transient over-voltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode VF) the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at pins 2 and 3. The negative reference (REF1) is connected at pin 1. This pin should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic inductance. The positive reference (REF2) is connected at pin 4. The options for connecting the positive reference are as follows: Data Line Protection with Bias and Power Supply Isolation Resistor 1. To protect data lines and the power line, connect pin 4 directly to the positive supply rail (VCC). In this configuration the data lines are referenced to the supply voltage. The internal TVS diode prevents over-voltage on the supply rail. 2. The SR2.8 can be isolated from the power supply by adding a series resistor between pin 4 and VCC. A value of 10kΩ is recommended. The internal TVS and steering diodes remain biased, providing the advantage of lower capacitance. 3. In applications where no positive supply reference is available, or complete supply isolation is desired, the internal TVS may be used as the reference. In this case, pin 4 is not connected. The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of the TVS (plus one diode drop). Data Line Protection Using Internal TVS Diode as Reference Board Layout Considerations for ESD Protection Board layout plays an important role in the suppression of extremely fast rise-time ESD transients. Recall that the voltage developed across an inductive load is proportional to the time rate of change of current through the load (V = L di/dt). The total clamping voltage seen by the protected load will be the sum of 2000 Semtech Corp. 4 www.semtech.com SR2.8 PROTECTION PRODUCTS Applications Information (continued) the TVS clamping voltage and the voltage due to the parasitic inductance (VC(TOT) = VC + L di/dt) . Parasitic inductance in the protection path can result in significant voltage overshoot, reducing the effectiveness of the suppression circuit. An ESD induced transient for example reaches a peak in approximately 1ns. For a PIN Descriptions 30A pulse (per IEC 61000-4-2 Level 4), 1nH of series inductance will increase the effective clamping voltage by 30V (V = 1x10-9 (30/1x10-9)). For maximum effectiveness, the following board layout guidelines are recommended: " " " I PP I SB I PT VBRR IR VRWM VSB VPT VC I BRR Minimize the path length between the SR2.8 and the protected line. Place the SR2.8 near the RJ45 connector to restrict transient coupling in nearby traces. Minimize the path length (inductance) between the RJ45 connector and the SR2.8. Figure 1 - EPD TVS IV Characteristic Curve EPD TVS Characteristics The internal TVS of the SR2.8 is constructed using Semtech’s proprietary EPD technology. The structure of the EPD TVS is vastly different from the traditional pn-junction devices. At voltages below 5V, high leakage current and junction capacitance render conventional avalanche technology impractical for most applications. However, by utilizing the EPD technology, the SR2.8 can effectively operate at 2.8V while maintaining excellent electrical characteristics. The IV characteristic curve of the EPD device is shown in Figure 1. The device represents a high impedance to the circuit up to the working voltage (VRWM). During a transient event, the device will begin to conduct as it is biased in the reverse direction. When the punchthrough voltage (VPT) is exceeded, the device enters a low impedance state, diverting the transient current away from the protected circuit. When the device is conducting current, it will exhibit a slight “snap-back” or negative resistance characteristic due to its structure. This must be considered when connecting the device to a power supply rail. To return to a non-conducting state, the current through the device must fall below the snap-back current (approximately < 50mA). The EPD TVS employs a complex nppn structure in contrast to the pn structure normally found in traditional silicon-avalanche TVS diodes. The EPD mechanism is achieved by engineering the center region of the device such that the reverse biased junction does not avalanche, but will “punch-through” to a conducting state. This structure results in a device with superior dc electrical parameters at low voltages while maintaining the capability to absorb high transient currents. 2000 Semtech Corp. 5 www.semtech.com SR2.8 PROTECTION PRODUCTS Typical Applications 10/100 Ethernet ESD Protection 10/100 Ethernet ICs are vulnerable to damage from electrostatic discharge (ESD). The fatal discharge may originate from a charged cable (cable discharge event or CDE) or the body of a user. Charges can exceed several thousand volts under the right conditions. If the circuit is left unprotected, the voltage will be capacitively coupled thru the transformer, potentially damaging or latching-up the Ethernet Phy chip. The figure above illustrates how to use the SR2.8 to protect one 10/100 Ethernet line pair. The devices are connected differentially between transmit and receive line pairs. When the voltage on the data lines exceeds the TVS punchthrough (plus one diode drop), the internal rectifiers are forward biased conducting the transient current away from the protected chip. The design takes advantage of the isolation provided by the line transformer to suppress common mode surges. 2000 Semtech Corp. 6 www.semtech.com SR2.8 PROTECTION PRODUCTS Outline Drawing - SOT-143 Notes: (1) Controlling dimension: Inch (unless otherwise specified). (2) Dimension A and B do not include mold protrusions. Mold protrusions are .006” max. Land Pattern - SOT-143 2000 Semtech Corp. 7 www.semtech.com SR2.8 PROTECTION PRODUCTS Marking Codes Part Number Marking Code SR2.8 R2.8 Ordering Information Par t Number Working Voltage Qty per Reel R eel Size SR2.8.TC 2.8V 3,000 7 Inch SR2.8.TG 2.8V 10,000 13 Inch Contact Information Semtech Corporation Protection Products Division 652 Mitchell Rd., Newbury Park, CA 91320 Phone: (805)498-2111 FAX (805)498-3804 2000 Semtech Corp. 8 www.semtech.com