74V2T125 DUAL BUS BUFFER (3-STATE) PRELIMINARY DATA ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V2T125 is an advanced high-speed CMOS DUAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. 3-STATE control input nG has to be set HIGH to place the output into the high impedance state. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on SOT23-8L SOT323-8L ORDER CODES PACKAGE T&R SOT23-8L SOT323-8L 74V2T125STR 74V2T125CTR inputs with no regard to the supply voltage. This device can be used to interface 3V to 5V systems and it is ideal for portable applications like personal digital assistant, camcorder and all battery-powered equipment. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS December 2001 1/10 This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice. 74V2T125 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 7 2, 5 3, 6 4 1G, 2G 1A, 2A 2Y, 1Y GND VCC 8 NAME AND FUNCTION Output Enable Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A G Y X L H H L L Z L H X: "H" or "L" Z: High Impedance ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to VCC + 0.5 − 20 V mA IIK DC Input Diode Current IOK DC Output Diode Current − 20 mA IO DC Output Current ± 25 mA ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) ± 50 mA -65 to +150 °C 260 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Unit 4.5 to 5.5 V VI Input Voltage 0 to 5.5 V VO Output Voltage 0 to VCC V Top Operating Temperature dt/dv Input Rise and Fall Time (note 1) (VCC = 5.0 ± 0.5V) 1) VIN from 0.8V to 2V 2/10 Value -55 to 125 °C 0 to 20 ns/V 74V2T125 DC SPECIFICATION Test Condition Symbol VIH VIL VOH VOL IOZ II IOPD ICC ICC Parameter 4.5 to 5.5 4.5 to 5.5 Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Power down Output Leakage Current Quiescent Supply Current Additional Worst Case Supply Current TA = 25°C VCC (V) High Level Input Voltage Low Level Input Voltage High Level Ouput Voltage Value Min. Typ. Max. 0.8 -40 to 85°C -55 to 125°C Min. Min. 0.8 2.0 4.5 IO=-50 µA 4.4 4.5 IO=-8 mA 3.94 4.5 IO=50 µA 4.5 Max. 4.5 0.0 Max. 0.8 2.0 V 2.0 4.4 4.4 3.8 3.7 Unit V V 0.1 0.1 0.1 IO=8 mA 0.36 0.44 0.55 5.5 VI = VIH or VIL VO = 5.5 or GND ±0.25 ± 2.5 ±5 µA 0 to 5.5 VI = 5.5V or GND ± 0.1 ±1 ±1 µA 0 VO = 5.5 0.5 5 10 µA 5.5 VI = VCC or GND 1 10 20 µA One Input at 3.4V, other input at VCC or GND 1.35 1.5 1.5 mA 5.5 V AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time tPLZ tPHZ tPZL tPZH VCC (V) Value TA = 25°C CL (pF) -55 to 125°C Typ. Max. Min. Max. Min. Max. 15 3.8 5.5 1.0 6.5 1.0 7.5 50 4.3 6.5 1.0 7.5 1.0 8.5 RL = 1 KΩ 3.6 5.0 1.0 6.0 1.0 7.0 50 RL = 1 KΩ 5.1 7.0 1.0 8.0 1.0 9.0 5.0(*) 15 RL = 1 KΩ 3.7 5.9 1.0 7.0 1.0 8.0 5.0(*) 50 RL = 1 KΩ 4.1 6.5 1.0 7.5 1.0 8.5 5.0 (*) 5.0 (*) Output Disable Time 5.0 (*) 15 5.0 (*) Output Enable Time Min. -40 to 85°C Unit ns (*) Voltage range is 5.0V ± 0.5V 3/10 74V2T125 CAPACITIVE CHARACTERISTICS Test Condition Symbol Value TA = 25°C Parameter Min. CIN Input Capacitance COUT Output Capacitance Power Dissipation Capacitance (note 1) CPD Typ. Max. 4 10 -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. 10 10 pF 6 pF 14 pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 TEST CIRCUIT TEST CIRCUIT TEST tPLH, tPHL SWITCH Open tPZL, tPLZ VCC tPZH, tPHZ GND CL =15/50pF or equivalent (includes jig and probe capacitance) R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) 4/10 74V2T125 WAVEFORM 1 : PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 5/10 74V2T125 SOT23-8L MECHANICAL DATA mm. mils DIM. MIN. MAX. MIN. TYP. MAX. A 0.90 1.45 35.4 57.1 A1 0.00 0.15 0.0 5.9 A2 0.90 1.30 35.4 51.2 b 0.22 0.38 8.6 14.9 C 0.09 0.20 3.5 7.8 D 2.80 3.00 110.2 118.1 E 2.60 3.00 102.3 118.1 E1 1.50 1.75 59.0 68.8 e 0 e1 L 6/10 TYP 0.35 .65 25.6 1.95 76.7 0.55 13.7 21.6 74V2T125 SOT323-8L MECHANICAL DATA mm. mils DIM. MIN. TYP MAX. MIN. TYP. MAX. A 0.80 1.10 31.5 43.3 A1 0.00 0.10 0.0 3.9 A2 0.80 1.00 31.5 34.9 b 0.13 0.28 5.1 11.0 C 0.10 0.18 3.9 7.1 D 1.80 2.20 70.9 86.6 E 1.80 2.40 70.9 94.5 E1 1.15 1.35 45.3 53.1 e 0.5 19.7 e1 1.5 59.0 L 0.10 0.30 3.9 11.8 7/10 74V2T125 Tape & Reel SOT23-xL MECHANICAL DATA mm. inch DIM. MIN. TYP A MIN. TYP. 180 13.0 13.2 MAX. 7.086 C 12.8 D 20.2 0.795 N 60 2.362 T 8/10 MAX. 0.504 0.512 14.4 0.519 0.567 Ao 3.13 3.23 3.33 0.123 0.127 0.131 Bo 3.07 3.17 3.27 0.120 0.124 0.128 Ko 1.27 1.37 1.47 0.050 0.054 0.0.58 Po 3.9 4.0 4.1 0.153 0.157 0.161 P 3.9 4.0 4.1 0.153 0.157 0.161 74V2T125 Tape & Reel SOT323-xL MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 175 180 185 6.889 7.086 7.283 C 12.8 13 13.2 0.504 0.512 0.519 D 20.2 N 59.5 0.795 60 T 60.5 2.362 14.4 0.567 Ao 2.25 0.088 Bo 2.7 0.106 Ko 1.2 0.047 Po 3.98 4 4.2 0.156 0.157 0.165 P 3.98 4 4.2 0.156 0.157 0.165 9/10 74V2T125 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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