74V1G125 SINGLE BUS BUFFER (3-STATE) ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V1G125 is an advanced high-speed CMOS SINGLE BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. S (SOT23-5L) C (SC-70) ORDER CODE: 74V1G125S 3-STATE control input G has to be set high to place the output into the high impedance state. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. PIN CONNECTION AND IEC LOGIC SYMBOLS October 1999 1/8 74V1G125 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1 1G Output Enable Input NAME AND FUNCT ION 2 1A Data Input 4 1Y Data Output 3 GND Ground (0V) 5 VCC Positive Supply Voltage TRUTH TABLE A G Y X H Z L L L H L H X:”H” or ”L” Z:High Impadance ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA ICC or IGND DC VCC or Ground Current Tstg TL Storage Temperature Lead Temperature (10 sec) -65 to +150 o 260 o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature dt/dv Input Rise and Fall Time (see note 1) (VCC = 3.3 ± 0.3V) (V CC = 5.0 ± 0.5V) 1) VIN from 30% to70%of VCC 2/8 Valu e Unit 2.0 to 5.5 V 0 to 5.5 V 0 to VCC -40 to +85 0 to 100 0 to 20 V o C ns/V ns/V 74V1G125 DC SPECIFICATIONS Symb ol VIH VIL VOH VOL Parameter T est Cond ition s Min. II ICC Typ . Un it -40 to 85 o C Max. Min . Max. High Level Input Voltage 2.0 1.5 1.5 3.0 to 5.5 0.7VCC 0.7VCC Low Level Input Voltage 2.0 0.5 0.5 3.0 to 5.5 0.3VCC 0.3VCC High Level Output Voltage Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current V 2.0 I O =-50 µA 1.9 2.0 1.9 3.0 IO=-50 µA IO=-50 µA 2.9 3.0 2.9 4.5 4.4 4.5 4.4 3.0 IO=-4 mA 2.58 2.48 4.5 IO=-8 mA 3.94 3.8 2.0 I O=50 µA 0.0 0.1 0.1 3.0 IO=50 µA IO=50 µA 0.0 0.1 0.1 0.0 0.1 0.1 0.44 4.5 IOZ Value T A = 25 o C V CC (V) V V V 3.0 IO=4 mA 0.36 4.5 IO=8 mA 0.36 0.44 ±0.25 ±2.5 µA 5.5 VI = VIH or VIL VO = VCC or GND 0 to 5.5 VI = 5.5V or GND ±0.1 ±1.0 µA 5.5 VI = VCC or GND 1 10 µA AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns) Symb ol Parameter 3.3(*) 15 Value o T A = 25 C Min. Typ . Max. 5.6 8.0 (*) 3.3 5.0(**) 50 15 8.1 3.8 11.5 5.5 1.0 1.0 13.0 6.5 (**) 50 15 50 15 50 50 50 5.3 5.4 7.9 3.6 5.1 9.5 6.1 7.5 8.0 11.5 5.0 7.0 13.0 8.5 1.0 1.0 1.0 1.0 1.0 1.0 1.0 8.5 9.5 13.0 6.0 8.0 15.0 10.0 V CC (V) tPLH tPHL Propagation Delay Time tPLZ tPHZ Output Disable Time tPZL tPZH Output Enable Time Test Co ndition CL (pF ) 5.0 3.3(*) 3.3(*) 5.0(**) 5.0(**) 3.3(*) 5.0(**) R L = 1KΩ R L = 1KΩ Un it o -40 to 85 C Min . Max. 1.0 9.5 ns ns ns (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5V ± 0.5V 3/8 74V1G125 CAPACITIVE CHARACTERISTICS Symb ol Parameter Test Co nditions Valu e T A = 25 oC Min. T yp. Input Capacitance 4 COUT Output Capacitance 6 CPD Power Dissipation Capacitance (note 1) 14 C IN Un it -40 to 85 o C Max. Min. Max. pF 10 10 pF pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC TEST CIRCUIT T EST tPLH , tPHL SW IT CH Open tPZL , tPLZ VCC tPZH , tPHZ GND CL = 15/50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ orequivalent RT = ZOUT of pulse generator (typically 50Ω) 4/8 74V1G125 WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 5/8 74V1G125 SOT23-5L MECHANICAL DATA mm DIM. MIN. 6/8 TYP. mils MAX. MIN. TYP. MAX. A 0.90 1.45 35.4 57.1 A1 0.00 0.15 0.0 5.9 A2 0.90 1.30 35.4 51.2 b 0.35 0.50 13.7 19.7 C 0.09 0.20 3.5 7.8 D 2.80 3.00 110.2 118.1 E 2.60 3.00 102.3 118.1 E1 1.50 1.75 59.0 68.8 L 0.35 0.55 13.7 21.6 e 0.95 37.4 e1 1.9 74.8 74V1G125 SC-70 MECHANICAL DATA mm DIM. MIN. TYP. mils MAX. MIN. TYP. MAX. A 0.80 1.10 31.5 43.3 A1 0.00 0.10 0.0 3.9 A2 0.80 1.00 31.5 39.4 b 0.15 0.30 5.9 11.8 C 0.10 0.18 3.9 7.1 D 1.80 2.20 70.9 86.6 E 1.80 2.40 70.9 94.5 E1 1.15 1.35 45.3 53.1 L 0.10 0.30 3.9 11.8 e 0.65 25.6 e1 1.3 51.2 7/8 74V1G125 Information furnished is believed to be accurate and reliable. However, STMicroelectronic s assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems withoutexpress written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com . 8/8