STMICROELECTRONICS EMIF10

EMIF10-LCD01C1
®
10 LINES EMI FILTER
AND ESD PROTECTION
IPAD™
MAIN PRODUCT CHARACTERISTICS:
Where EMI filtering in ESD sensitive equipment is
required :
■ LCD for Mobile phones
■ Computers and printers
■ Communication systems
■ MCU Boards
DESCRIPTION
The EMIF10-LCD01C1 is a 10 lines highly integrated devices designed to suppress EMI/RFI
noise in all systems subjected to electromagnetic
interferences. The EMIF10 flip chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry,
which prevents the device from destruction when
subjected to ESD surges up 15kV.
Flip-Chip
(25 bumps)
Figure 1: Pin Configuration (ball side)
BENEFITS
■
■
■
■
■
■
■
■
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Very low PCB space consuming: < 7mm2
Coating resin on back side
Very thin package: 0.69 mm
High efficiency in ESD suppression on input
pins (IEC61000-4-2 level 4)
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration and wafer level packaging.
5
4
3
2
1
I5
I4
I3
I2
I1
A
I10
I9
I8
I7
I6
B
GND
GND
GND
GND
GND
C
O10
O9
O8
O7
O6
D
O5
O4
O3
O2
O1
E
Figure 2: Basic Cell Configuration
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2:
Level 4 input pins 15kV (air discharge)
8kV (contact discharge)
Level 1 output pins 2kV (air discharge)
2kV (contact discharge)
MIL STD 833E - Method 3015-6 Class 3
Table 1: Order Code
Part Number
EMIF10-LCD01C1
September 2004
Low-pass Filter
Output
Input
Ri/o = 100Ω
Cline = 35pF
GND
GND
GND
Marking
FL
REV. 1
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EMIF10-LCD01C1
Table 2: Absolute Maximum Ratings (Tamb = 25°C)
Symbol
Parameter
Tj
Junction temperature
Value
Unit
125
°C
Top
Operating temperature range
-40 to + 85
°C
Tstg
Storage temperature range
-55 to +150
°C
Table 3: Electrical Characteristics (Tamb = 25°C)
Symbol
Parameter
VBR
Breakdown voltage
IF
IRM
Leakage current @ VRM
VRM
Stand-off voltage
VCL
Clamping voltage
Rd
IPP
Dynamic resistance
Peak pulse current
RI/O
Series resistance between Input & Output
Cline
Input capacitance per line
Symbol
VBR
IR = 1 mA
IRM
VRM = 3V
I
VF
VCL VBR VRM
V
IRM
IR
IPP
Test conditions
RI/O
Min.
Typ.
Max.
Unit
6
8
10
V
500
nA
110
Ω
90
Cline
@ 0V bias
Rt / Ft
Induced rise and fall time 10-90% at 26 MHz frequency signal V = 1.9 V (Rt / Ft input 1 ns, 50Ω
impedance generator)
100
47
pF
8 (1)
ns
(1) guaranteed by design
Figure 3: S21(dB) all lines attenuation
measurement and Aplac simulation
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Figure 4: Analog cross talk measurements
EMIF10-LCD01C1
Figure 5: ESD response to IEC61000-4-2
(+15kV air discharge) on one input and on one
output
Figure 6: ESD response to IEC61000-4-2 (-15kV
air discharge) on one input and on one output
Vin
Vout
Figure 7: Line capacitance versus applied
voltage
CLine(pF)
35
30
25
20
15
10
5
0
0.0
1.0
Figure 8: Rise time 10-90% measurements with
1.9V signal at 26 MHz frequency (50Ω
Ω
generator)
VLine(V)
2.0
3.0
4.0
5.0
Figure 9: Fall time 10-90% measurements with
1.9V signal at 26 MHz frequency (50Ω
Ω
generator)
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EMIF10-LCD01C1
Figure 10: Aplac model
EMIF10-LCD01C1 model
Ground return
Figure 11: Aplac parameters
ZRZ structure
aplacvar Remif10low 100
aplacvar Cemif10flow 17.5pF
Bumps
aplacvar Lbump 50pH
aplacvar Rbump 20m
aplacvar Cbump 1.5pF
Bulk
aplacvar Rsub 100m
Gnd connections
aplacvar Rgnd 100m
aplacvar Lgnd 200pH
aplacvar Cgnd 0.15pF
BV = 7
CJO = Cemif10low
IBV = 1u
IKF = 1000
IS = 10f
ISR = 100p
N=1
M = 0.3333
RS = 0.015
VJ = 0.6
TT = 50n
Figure 12: Order Code
EMIF
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
x = 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
= 3: Leadfree Pitch = 400µm, Bump = 250µm
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yy
-
xxx zz
Fx
EMIF10-LCD01C1
Figure 13: FLIP-CHIP Package Mechanical Data
2.64mm ± 50µm
Figure 14: Foot Print Recommendations
250µm ± 40
Figure 15: Marking
545
Dot, ST logo
xx = marking
z = packaging location
yww = datecode
(y = year
ww = week)
400
545
Copper pad Diameter :
250µm recommended , 300µm max
695µm ± 75
315µm ± 50
2.64mm ± 50µm
500µm ± 50
500µm ± 50
Solder stencil opening : 330µm
x x z
y ww
100
230
Solder mask opening recommendation :
340µm min for 315µm copper pad diameter
All dimensions in µm
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EMIF10-LCD01C1
Figure 16: FLIP-CHIP Tape and Reel Specification
Dot identifying Pin A1 location
3.5 +/- 0.1
ST
xxz
yww
ST
xxz
yww
ST
xxz
yww
8 +/- 0.3
0.73 +/- 0.05
All dimensions in mm
1.75 +/- 0.1
Ø 1.5 +/- 0.1
4 +/- 0.1
4 +/- 0.1
User direction of unreeling
Table 4: Ordering Information
Part Number
EMIF10-LCD01C1
Marking
FL
Package
Flip-Chip
Weight
9.3 mg
Base qty
5000
Delivery mode
Tape & reel (7”)
Note: Further packing information available in the application notes
- AN1235: ''Flip-Chip: Package description and recommandations for use''
- AN1751: "EMI Filters: Recommendations and measurements"
Table 5: Revision History
Date
Sep-2004
6/7
Revision
1
Description of Changes
First issue
EMIF10-LCD01C1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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