L4955 5A ULDO LINEAR REGULATORS FAMILY UP TO 5A OUTPUT CURRENT ±2% PRECISE OUTPUT VOLTAGES FAST TRANSIENT RESPONSE 0.75V TYP. DROP OUT VOLTAGE AT 5A OPERATING INPUT VOLTAGE FROM 4.5V ADJUSTABLE VERSION: • VO = 1.26V • INHIBIT (IQ = 120µA TYP.) • POWER GOOD • PROGRAMMABLE CURRENT LIMIT • HEPTAWATT PACKAGE FIXED VERSION: • 3.3V, 5.1V OUTPUTS • VERSAWATT PACKAGE VERY LOW QUIESCENT CURRENT SHORT CIRCUIT PROTECTION (Foldback function) THERMAL SHUTDOWN APPLICATIONS PENTIUM AND POWER PC SUPPLIES POST REGULATOR FOR SMPS LOW COST SOLUTION FOR 5V TO 3.3V CONVERSION LOW COST BATTERY CHARGER CONSTANT CURRENT REGULATOR SUITABLE FOR APPLICATION WITH STANDBY FEATURE DESCRIPTION The L4955 is a family of monolithic ultra very low drop linear regulators designed to supply the most recent microprocessors. MULTIPOWER BCD TECHNOLOGY HEPTAWATT VERSAWATT (TO-220) OUTPUT VOLTAGE ORDERING NUMBERS L4955 PACKAGE 1.26V ADJ HEPTAWATT L4955V3.3 3.3V VERSAWATT L4955V5.1 5.1V VERSAWATT The dropout voltage is only 0.75V (Typ.) at 5A, directly dependent on the output current conditions. Realized in BCDII technology, it has on board a charge pump to properly drive an N-channel power mos Transistor with 150mΩ of RDSON. It operates from a 4.5V minimum supply, with a very low quiescent current irrespective of the load; a minimum of 22µF output capacitor is required for stability. The on-chip trimming techniques improve the precision of the available output voltages to ±2%. Ancillary functions like power good, inhibit with low power consumption, programmable output voltage and current limiting make the flexible heptawatt version usable in applications where power management, stand-by, features, post regulation and adjustable current generators for battery chargers are important. TYPICAL APPLICATIONS IN VIN 1 INH PG 3 6 7 OUT L4955 2 C1 CL 4 VOUT R1 5 GND ADJ C2 R2 IN VIN C1 1 L4955VXXX 3 OUT 2 VOUT C2 GND D97IN590 D97IN589 February 1999 1/14 L4955 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Supply Input Voltage VIN ADJ and CL pins PG and INH pins PTOT Power Dissipation @ Tamb = 50°C Power Dissipation @ Tcase = 90°C Tst, Ti Storage Temperature Unit 24 V -0.3 to 4 0 to VIN V V 2 15 W W -40 to +150 °C PIN CONNECTIONS (Top views) 7 OUT 6 PG 5 ADJ 4 GND 3 INH 2 CL 1 IN 3 OUT GND 1 IN D96IN369 tab connected to pin 4 D96IN367 VERSAWATT (TO220) HEPTAWATT BLOCK DIAGRAM VIN IN 1(1) 10µF VREF= 1.26V FIXED C.L. + PRE REGULATOR - CHARGE PUMP FOLDBACK PROGRAM. C.L. OUT 7(3) 3 R1 ADJ VREF INHIBIT ACTIVE HIGH 5 + 0.9V REF - 4(2) 2 PIN x = HEPTAWATT PIN (x) = VERSAWATT RCL (1/4W, 1%) - 1.26V 2/14 THERMAL SHUTDOWN + INH POWER DMOS 150mΩ BUFFER E/A CL GND 6 PG D96IN366 R2 VOUT 22µF L4955 PIN FUNCTIONS HW VW Name Function 1 1 IN Unregulated input voltage; this pin must be bypassed with a capacitor larger than 10µF. 2 – CL A resistor connected between this pin and ground sets the programmable current limiting value. When the programmable current limiting is not used the pin must be connected to GND. 3 – INH TTL-CMOS input. A logic high level on this input disables the device. An internal pull-down insures full functionally even if the pin is open. 4 2 GND Ground. 5 – ADJ The output is connected directly to this terminal for 1.26V operation; it is connected to the output through a resistive divider for higher voltages. 6 – PG Open drain output, this signal is low when the output voltage is lower than 90%, otherwise is high. 7 3 OUT Regulated output voltage. A minimum bypass capacitor of 22µF is required to insure stability. THERMAL DATA (HEPTAWATT & VERSAWATT packages) Symbol Parameter Value Unit Rth j-case Thermal Resistance Junction-case Max. 2.5 °C/W Rth j-amb Thermal Resistance Junction-ambient Max. 50 °C/W Thermal Shutdown Typ. 150 °C Thermal Hysteresis Typ. 20 °C L4955 - ELECTRICAL CHARACTERISTICS (Tj = 25°C, Vin = 12V, unless otherwise specified). • = Specifications referred to TJ from 0°C to +125°C. Symbol Parameter VIN Operating Supply Voltage VO Output Voltage (1) ∆V O Line regulation ∆V O VO Test Condition 0.1A < IO < 5A; 4.5V < VIN <12V • Max. Unit 22 V V 1.235 1.26 1.285 1.222 1.26 1.298 V 4.5V < VIN <22V; IO = 10mA 2 10 mV Load regulation (1) 0.1A < IO < 5A 2 10 mV Dropout Voltage IO = 5A VIN ≥ 4.5V (1) • • • • • • IO = 2A IQ Typ. 4.5 4.5V < VIN < 12V; 0.1A < IO < 5A IO Min. Current Limiting Short Circuit Current VO = 0V Programmable Current Limiting Rlim = 13kΩ Rlim = 47kΩ Quiescent Current 0.1A < IO < 5A Stand By Current INH = 5V Inhibit Threshold Rising Edge 5.1 1.1 V 1.1 1.5 V 0.55 0.75 V 6.3 7.5 A 3 0.85 3.45 1.00 A A 2 2.7 3 4 mA mA 120 200 1.26 1.42 µA V 60 µA 1.8 2.55 0.70 CL = 0 C L = 13k • 0.75 1.1 Inhibit Hysteresis A 0.2 Inhibit Bias Sink Current INH = 5V or 0.8V Power Good Threshold Rising Edge Power Good Hysteresis Power Good Saturation IPG = 4mA Ripple Rejection f = 120Hz, IO = 5A VIN = 6V ∆VIN = 2VPP 20 V V 0.9 x VO • • 0.2 0.1 60 75 V 0.4 V dB (1) Output voltage connected to ADJ. 3/14 L4955 L4955V3.3 - ELECTRICAL CHARACTERISTICS (Tj = 25°C, Vin = 5V, unless otherwise specified) • = Specifications referred to TJ from 0°C to +125°C. Symbol Parameter VIN Operating Input Voltage VO Output Voltage Test Condition Min. Typ. 4.5 4.75V < VIN < 12V; 0.1A < IO < 5A 4.75V < VIN < 12V; 0.1A < IO < 5A • Max. Unit 22 V 3.234 3.300 3.366 V 3.201 3.300 3.399 V ∆V O Line regulation 4.5V < VIN <12V; IO = 10mA 2 10 mV ∆V O Load regulation 0.1A < IO < 5A 3 15 mV IO Current Limiting 6.3 7.5 A IQ • • Short Circuit Current VO = 0V Quiescent Current 0.1A < IO < 5A Ripple Rejection f = 120Hz, IO = 5A VIN = 6V ∆VIN = 2VPP 5.1 1.8 2 57 A 3 70 mA dB L4955V5.1 - ELECTRICAL CHARACTERISTICS (Tj = 25°C, Vin = 8V, unless otherwise specified) • = Specifications referred to TJ from 0°C to +125°C. Symbol Parameter VIN Operating Input Voltage VO Output Voltage Test Condition Drop-out Voltage 6.75V < VIN < 15V; 0.1A < IO < 5A • Max. Unit 22 V 5.000 5.100 5.200 V 4.950 5.100 5.250 V 0.75 1.1 V 1.1 1.5 V 0.55 0.75 V IO = 5A IO = 2A • • ∆V O Line regulation 6.5V < VIN <15V; IO = 10mA 2 10 mV ∆V O Load regulation 0.1A < IO < 5A 5 20 mV IO Current Limiting 6.3 7.5 A IQ 4/14 Typ. VO+VD 6.75V < VIN < 15V; 0.1A < IO < 5A VD Min. Short Circuit Current VO = 0V Quiescent Current 0.1A < IO < 5A Ripple Rejection f = 120Hz, IO = 5A VIN = 8V ∆VIN = 2VPP • • 5.1 1.8 2 55 65 A 3 mA dB L4955 L4955 Figure 1: L4955 DC Operating Area Figure 2: Output Voltage Stability vs. Junction Temperature O u tput C ur rent [A ] 8 Vo u t [V ] 7 1 .2 8 V in > 4.5V T j = 125°C C urr ent Lim itation 6 1 .2 7 5 1 .2 6 5 R dson lim it 4 Pow er D is sipation Lim it 1 .2 6 T c = 25°C P dm ax = 40W 3 2 1 .2 5 5 1 .2 5 D C O perating A re a 1 0 V in = 1 2 V Io u t= 1 0 m A 1 .2 7 5 1 .2 4 5 T c = 70°C P dm ax = 22W 0 2.5 5 7.5 10 12.5 15 (V in - Vou t) [V ] 17.5 20 22.5 40 1 20 160 5 [m V ] 5 4 .5 4 4 .5V < V in< 2 2V Iou t= 1 0 m A 3 2 .5 2 1 .5 1 V in = 1 2 V T j = 25 ° C 3 D eviation 4 3 .5 ( P u ls e d t e c h n iq u e h a s b e e n u s e d ) 2 Vo u t = V A D J 1 0 -1 -2 -3 0 .5 -4 0 -4 0 -2 0 0 20 40 60 80 100 120 140 160 -5 0 1 2 T j [°C ] 3 4 5 Io u t [A ] Figure 5: Dropout Voltage M in im u m V in - Vo u t Vo lta g e [V ] 80 Figure 4: Load Regulation O utput Voltage [m V Deviation Voltage 0 T j [°C ] Figure 3: Line Regulation vs. Junction Temperature Output 1 .2 4 -40 Figure 6: Maximum OutputCurrent vs. Junction Temperaturewith internalcurrent limiting 1 .2 5 O utput C urrent [A] 10 9 1 8 T j = 1 2 5 °C 7 0 .7 5 6 T j = 2 5 °C 5 0 .5 4 T j = -4 0 °C 3 (Vin-Vout) > 2V pin 2 = G ND 2 0 .2 5 1 P u l s e d t e c h n iq u e h a s b e e n u s e d 0 0 1 2 3 Io u t [A ] 4 5 6 0 -40 -20 0 20 40 60 80 100 120 140 160 Tj [°C] *P ulsed tecnique ha s been used 5/14 L4955 L4955 Figure 7: Short-circuit Current vs. Junction Temperature with Programmable Current Limiting Figure 8: Quiescent Current vs. Temperature (CL = 0V) S h o r t- c ir c uit C u r r e nt [A ] 3 .5 Iq [m A ] 2 .6 2 .4 3 2 .2 R lim = 1 3 kΩ 2 .5 2 1 .8 2 1 .6 R lim = 1 9 k Ω 1 .5 1 .4 1 .2 1 1 0 .5 0 .8 R lim = 4 7 k Ω 0 -40 -20 0 20 4 0 60 80 T j [ °C ] V in = 1 2 V Io u t =1 0 m A t o 5 A 0 .6 10 0 12 0 1 40 160 0 .4 -4 0 - 2 0 0 20 40 * P u ls ed te c ni q u e h as b e e n u s e d 6 0 8 0 1 00 1 20 1 4 0 1 6 0 T j [° C ] Figure 9: Quiescent Current vs. Supply voltage (CL = 0V) Figure 10: Quiescent Current vs. Supply Voltage with Programmable Current Limiting I q [m A ] 5 Iq [mA] 5 4 .5 4.5 4 4 Tj = 25°C Io = 1 0 m A t o 5 A 3 .5 3.5 3 3 2 .5 2.5 T j= - 4 0 ° C 2 1 .5 2 Rlim = 47kΩ 1.5 T j= 2 5 ° C T j= 1 2 5 ° C 1 Rli m = 13kΩ 1 0.5 0 .5 0 0 0 5 10 15 V in [ V ] 20 25 Figure 11: Stand-by Current vs. Supply Voltage with INH = LOGIC HIGH Iq [u A ] 400 0 5 10 15 20 25 Vin [V] Figure 12: Ripple Rejection vs. Frequency R i p p le R e je c tio n [d B ] 1 00 T j= 2 5 ° C 350 90 V r ip p le = 3 V p - p 80 300 V r ip p le = 0 . 5 V p - p 70 250 60 200 50 150 40 100 30 C in = 2 2 u F C o u t = 2 2uF V o ut = 1.26 V V in m in = 4 . 5 V Io u t = 5 A 20 50 10 0 0 5 10 15 V in [V ] 6/14 20 25 0 10 100 1k F r e q u e n c y [H z ] 10k 1 00 k L4955 L4955 Figure 13: Ripple Rejection vs. Output Current Figure 14: Power Good Function R i p p le R e je c t io n [d B ] 100 90 VADJ VOUT=VADJ (R1+R2)/R2 F r ip p le = 1 2 0 H z V r ip p le = 3 V p - p 80 0.9 VADJ hyst = 200mV F r ip p l e = 1 k H z V r ip p le = 0 . 5 V p - p 70 60 t F r ip p l e = 1 0 k H z V r ip p le = 0 . 5 V p - p 50 PG 40 30 F r ip p l e = 5 0 k H z V r ip p le = 0 . 5 V p -p C in = 2 2 u F C o u t= 2 2 u F V o u t= 1 .2 6 V V in m i n = 4 . 5 V 20 10 Low High Low t 0 D96IN364B 0 1 2 3 I o u t [A ] 4 5 Figure 15: Inhibit Function VINH Vref = 1.26V hyst = 200mV t regulator ON regulator OFF regulator ON D96IN365A t 7/14 L4955 LINE TRANSIENT RESPONSE Figure 16. Figure 17. Figure 18. Test condition: VIN = 12V; ∆VIN = 1V; VO = 3.3V; IO = 200mA; CIN = 10µF (electrolytic capacitor); Cout = 22µF (electrolytic capacitor); dV/dt = 0.1 V/µs; TJ = 25°C 8/14 L4955 LOAD TRANSIENT RESPONSE Figure 19. Figure 20. Figure 21. Test condition: VIN = 5V, VOUT = 3.3V; Load Transient from 0.5A to 5A; dIout = 20A ⁄ µs; TJ = 25°C dt Figure 22: Load transient test circuit. PG VIN = 5V IN 1 7 6 L4955 C1,C2 470µF/25V Panasonic HFQ 2 CL 4 GND 3 5 INH OUT ADJ VOUT = 3.3V R4 910 R5 560 C4 to C9 100µF/10V AVX TPS 6 each C10 to C15 1µF AVX X7R 6 each D97IN546 9/14 L4955 L4955V3.3 Figure 23: DC operating area. Figure 24: Output Voltage Stability vs. Junction Temperature. O utput Current [A] Vo ut [V ] 8 3 .4 7 V in = 5V Iou t = 1 0mA Vout = 3.3V T j = 125°C Current Lim itation 6 3 .35 Power Dissipation Lim it 5 Rdson lim it 4 T c = 25°C Pdm ax=40W 3 .3 3 2 3 .25 DC O perating Area 1 0 3 4.5 6 7.5 9 T c=70°C Pdm ax=22W 10.5 12 13.5 15 16.5 18 19.5 21 22.5 3 .2 -4 0 0 40 Input Voltage [V] 80 120 1 60 4 5 T j [°C ] Figure 25: Quiescent Current vs. Temperature. Figure 26: Load Regulation Iq [m A] 5 3 4 Output Voltage Deviation [mV] 2 .7 5 2 .5 2 .2 5 2 1 .7 5 1 .5 1 .2 5 1 V in= 5 V I ou t = 10 m A to 5 A 0 .7 5 0 .5 2 1 0 -1 -2 -3 Vin=5V Tj = 25 °C (Pulsed tecnique has been used) -4 0 .2 5 0 -4 0 -5 -2 0 0 20 40 60 T j [°C ] 80 1 00 120 1 40 5 3 Figure 28: MaximumOutput Current vs.Junction Temperaturewith internalcurrent limiting 9 8 4.5 V < V in < 12 V Io u t = 1 0 m A 7 3 6 2.5 5 2 4 1.5 3 1 2 (Vin-Vout) > 2V pin 2 = G ND 1 0.5 10/14 2 O utput C urrent [A] 10 4 0 -40 1 Iout [A] 4.5 3.5 0 160 Figure 27: Line regulation vs. Junction Temperature. Output Voltage Deviation [mV] 3 -2 0 0 20 40 60 80 T j [°C ] 10 0 1 20 1 40 160 0 -40 -20 0 20 40 60 80 100 120 140 160 Tj [°C] *P ulsed tecnique ha s been used L4955 L4955V5.1 Figure 29: DC operating area. Figure 30: Output Voltage Stability vs. Junction Temperature. Vout [V] 5.2 O ut put C u rr e nt [A ] 8 Vou t = 5.1V T j = 125 °C 7 C u rre nt L im itatio n V in = 8V Iout = 1 0mA 5.15 6 Rd so n lim it 5 5.1 Pow er D issip a tio n Lim it 4 5.05 T c = 2 5°C P d m a x = 4 0W 3 5 DC O pe ratin g A re a 2 4.95 T c = 70 °C P dm a x = 2 2W 1 4.9 0 0 2 .5 5 7 .5 10 (V in - Vou t) [V ] 1 2 .5 15 -4 0 1 7 .5 0 40 80 12 0 1 60 4 5 T j [°C ] Figure 31: Quiescent Current vs. Temperature. Figure 32: Load Regulation 10 Iq [mA] 3 8 Output Voltage Deviation [mV] 2 .75 2.5 2 .25 2 1 .75 1.5 1 .25 1 0 .75 6 4 2 0 -2 -4 -8 0 .25 0 -40 -10 -20 0 20 40 60 T j [°C] 80 100 1 20 140 5 Output Voltage Deviation [mV] 1 2 3 Io u t [A] Figure 34: Maximum OutputCurrent vs. Junction Temperaturewith internalcurrent limiting O utput C urrent [A] 10 4.5 3.5 0 160 Figure 33: Line regulation vs. Junction Temperature. 4 V in = 8 V Tj = 2 5 ° C (P uls e d tec n iq u e h as be en us ed ) -6 Vin = 8V Iout = 10mA to 5A 0.5 9 6.5V < Vin < 15V Iout = 10mA 8 7 3 6 2.5 5 2 4 1.5 3 1 2 0.5 1 0 -40 -20 0 20 40 60 80 Tj [°C] 100 120 140 160 (Vin-Vout) > 2V pin 2 = G ND 0 -40 -20 0 20 40 60 80 100 120 140 160 Tj [°C] *P ulsed tecnique ha s been used 11/14 L4955 DIM. A C D D1 E E1 F F1 G G1 G2 H2 H3 L L1 L2 L3 L4 L5 L6 L7 L9 M M1 V4 Dia MIN. mm TYP. 2.4 1.2 0.35 0.7 0.6 2.34 4.88 7.42 10.05 16.7 21.24 22.27 2.6 15.1 6 2.55 4.83 2.54 5.08 7.62 16.9 14.92 21.54 22.52 2.8 15.5 6.35 0.2 2.8 5.08 3.65 MAX. 4.8 1.37 2.8 1.35 0.55 0.97 0.8 0.9 2.74 5.28 7.82 10.4 10.4 17.1 inch TYP. MIN. 0.094 0.047 0.014 0.028 0.024 0.095 0.193 0.295 0.396 0.657 21.84 22.77 1.29 3 15.8 6.6 0.386 0.877 3.05 5.33 40° 3.85 0.100 0.190 (typ.) 0.144 0.102 0.594 0.236 0.100 0.200 0.300 0.668 0.587 0.848 0.891 0.110 0.610 0.250 0.008 0.110 0.200 OUTLINE AND MECHANICAL DATA MAX. 0.189 0.054 0.110 0.053 0.022 0.038 0.031 0.035 0.105 0.205 0.307 0.409 0.409 0.673 0.860 0.896 0.051 0.118 0.622 0.260 0.120 0.210 Heptawatt V 0.152 V L V E L1 M1 A M D C D1 L5 H2 L2 L3 F E E1 V4 L9 H3 H1 G G1 G2 Dia. F L7 L4 L6 12/14 H2 F1 HEPTAMEC L4955 mm MIN. TYP. inch MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.40 2.70 0.094 0.106 H2 10.0 10.4 0.393 0.409 L2 16.4 0.645 L4 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.20 6.60 0.244 0.260 L9 3.50 3.93 0.137 0.154 M Dia 2.6 3.75 OUTLINE AND MECHANICAL DATA 0.102 3.85 0.147 Versawatt (TO220) 0.151 M DIM. TO220MEC 13/14 L4955 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publicationsupersedes and replaces all information previously supplied. STMicroelectronics products are notauthorizedfor use as critical components in life support devices or systems without express writtenapproval of STMicroelectronics. The ST logois a registered trademark of STMicroelectronics 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com 14/14