TDA7293 ® 120V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY VERY HIGH OPERATING VOLTAGE RANGE (±50V) DMOS POWER STAGE HIGH OUTPUT POWER (100W @ THD = 10%, RL = 8Ω, VS = ±40V) MUTING/STAND-BY FUNCTIONS NO SWITCH ON/OFF NOISE VERY LOW DISTORTION VERY LOW NOISE SHORT CIRCUIT PROTECTED (WITH NO INPUT SIGNAL APPLIED) THERMAL SHUTDOWN CLIP DETECTOR MODULARITY (MORE DEVICES CAN BE EASILY CONNECTED IN PARALLEL TO DRIVE VERY LOW IMPEDANCES) MULTIPOWER BCD TECHNOLOGY Multiwatt15V Multiwatt15H ORDERING NUMBERS: TDA7293V TDA7293HS class TV). Thanks to the wide voltage range and to the high out current capability it is able to supply the highest power into both 4Ω and 8Ω loads. The built in muting function with turn on delay simplifies the remote operation avoiding switching on-off noises. Parallel mode is made possible by connecting more device through of pin11. High output power can be delivered to very low impedance loads, so optimizing the thermal dissipation of the system. DESCRIPTION The TDA7293 is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications (Home Stereo, self powered loudspeakers, TopFigure 1: Typical Application and Test Circuit +Vs C7 100nF C6 1000µF R3 22K C2 22µF BUFFER DRIVER +Vs R2 680Ω C1 470nF IN- 2 IN+ 3 +PWVs 11 7 13 - R5 10K MUTE STBY BOOT LOADER C5 22µF 6 10 5 THERMAL SHUTDOWN MUTE VSTBY 12 4 (**) VMUTE OUT + R1 22K SGND 14 9 S/C PROTECTION (*) BOOTSTRAP CLIP DET VCLIP STBY R4 22K C3 10µF C4 10µF 1 8 15 STBY-GND -Vs -PWVs C9 100nF C8 1000µF D97AU805A (*) see Application note (**) for SLAVE function January 2003 -Vs 1/15 TDA7293 PIN CONNECTION (Top view) 15 -VS (POWER) 14 OUT 13 +VS (POWER) 12 BOOTSTRAP LOADER 11 BUFFER DRIVER 10 MUTE 9 STAND-BY 8 -VS (SIGNAL) 7 +VS (SIGNAL) 6 BOOTSTRAP 5 CLIP AND SHORT CIRCUIT DETECTOR 4 SIGNAL GROUND 3 NON INVERTING INPUT 2 INVERTING INPUT 1 STAND-BY GND TAB CONNECTED TO PIN 8 D97AU806 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit ±60 90 V VS V1 Supply Voltage (No Signal) V2 Input Voltage (inverting) Referred to -VS 90 V Maximum Differential Inputs ±30 V V2 - V3 VSTAND-BY GND Voltage Referred to -VS (pin 8) V V3 Input Voltage (non inverting) Referred to -VS 90 V V4 Signal GND Voltage Referred to -VS 90 V V5 Clip Detector Voltage Referred to -VS 120 V V6 V9 Bootstrap Voltage Referred to -VS Stand-by Voltage Referred to -VS 120 120 V V V10 Mute Voltage Referred to -VS 120 V V11 Buffer Voltage Referred to -VS 120 V V12 Bootstrap Loader Voltage Referred to -VS 100 V Output Peak Current 10 A 50 0 to 70 W °C 150 °C IO Ptot Top Tstg, Tj Power Dissipation Tcase = 70°C Operating Ambient Temperature Range Storage and Junction Temperature THERMAL DATA Symbol Rth j-case 2/15 Description Thermal Resistance Junction-case Typ Max Unit 1 1.5 °C/W TDA7293 ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = ±40V, RL = 8Ω, Rg = 50 Ω; Tamb = 25°C, f = 1 kHz; unless otherwise specified). Symbol Parameter VS Iq Supply Range Quiescent Current Ib Input Bias Current VOS Input Offset Voltage IOS Input Offset Current PO RMS Continuous Output Power d Total Harmonic Distortion (**) ISC Current Limiter Threshold SR Slew Rate GV Open Loop Voltage Gain GV eN Closed Loop Voltage Gain (1) Ri SVR TS Total Input Noise Test Condition Min. Typ. Max. Unit 50 ±50 100 V mA ±12 0.3 -10 d = 1%: RL = 4Ω; VS = ± 29V, 75 d = 10% RL = 4Ω ; VS = ±29V PO = 5W; f = 1kHz PO = 0.1 to 50W; f = 20Hz to 15kHz 90 1 µA 10 mV 0.2 µA 80 80 100 100 W W 0.005 0.1 VS ≤ ± 40V 6.5 A 5 10 V/µs 29 30 31 dB 1 3 10 µV µV 80 A = curve f = 20Hz to 20kHz Input Resistance % % dB 100 kΩ Supply Voltage Rejection f = 100Hz; Vripple = 0.5Vrms 75 dB Thermal Protection DEVICE MUTED 150 °C DEVICE SHUT DOWN 160 °C STAND-BY FUNCTION (Ref: to pin 1) VST on VST off ATTst-by Iq st-by Stand-by on Threshold 1.5 Stand-by off Threshold 3.5 Stand-by Attenuation 70 Quiescent Current @ Stand-by V V 90 0.5 dB 1 mA 1.5 V MUTE FUNCTION (Ref: to pin 1) VMon Mute on Threshold VMoff Mute off Threshold 3.5 Mute AttenuatIon 60 ATTmute V 80 dB CLIP DETECTOR Duty Duty Cycle ( pin 5) THD = 1% ; RL = 10KΩ to 5V THD = 10% ; RL = 10KΩ to 5V 10 30 PO = 50W ICLEAK 40 % 50 % 3 µA 1 V V SLAVE FUNCTION pin 4 (Ref: to pin 8 -VS) VSlave VMaster SlaveThreshold Master Threshold 3 Note (1): GVmin ≥ 26dB Note: Pin 11 only for modular connection. Max external load 1MΩ/10 pF, only for test purpose Note (**): Tested with optimized Application Board (see fig. 2) 3/15 TDA7293 Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1) 4/15 TDA7293 APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1) The recommended values of the external components are those shown on the application circuit of Figure 1. Different values can be used; the following table can help the designer. LARGER THAN SUGGESTED SMALLER THAN SUGGESTED INCREASE INPUT IMPEDANCE DECREASE INPUT IMPEDANCE COMPONENTS SUGGESTED VALUE PURPOSE R1 (*) 22k INPUT RESISTANCE R2 680Ω R3 (*) 22k R4 22k ST-BY TIME CONSTANT LARGER ST-BY ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE R5 10k MUTE TIME CONSTANT LARGER MUTE ON/OFF TIME SMALLER MUTE ON/OFF TIME C1 0.47µF INPUT DC DECOUPLING HIGHER LOW FREQUENCY CUTOFF C2 22µF FEEDBACK DC DECOUPLING HIGHER LOW FREQUENCY CUTOFF C3 10µF MUTE TIME CONSTANT LARGER MUTE ON/OFF TIME SMALLER MUTE ON/OFF TIME C4 10µF ST-BY TIME CONSTANT LARGER ST-BY ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE C5 22µFXN (***) BOOTSTRAPPING C6, C8 1000µF SUPPLY VOLTAGE BYPASS C7, C9 0.1µF SUPPLY VOLTAGE BYPASS CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN SET TO 30dB (**) INCREASE OF GAIN DECREASE OF GAIN SIGNAL DEGRADATION AT LOW FREQUENCY DANGER OF OSCILLATION (*) R1 = R3 for pop optimization (**) Closed Loop Gain has to be ≥ 26dB (***) Multiplay this value for the number of modular part connected Slave function: pin 4 (Ref to pin 8 -VS) -VS +3V -VS +1V -VS MASTER UNDEFINED Note: If in the application, the speakers are connected via long wires, it is a good rule to add between the output and GND, a Boucherot Cell, in order to avoid dangerous spurious oscillations when the speakers terminal are shorted. The suggested Boucherot Resistor is 3.9Ω/2W and the capacitor is 1µF. SLAVE D98AU821 5/15 TDA7293 INTRODUCTION In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the performance obtained from the best discrete designs. The task of realizing this linear integrated circuit in conventional bipolar technology is made extremely difficult by the occurence of 2nd breakdown phoenomenon. It limits the safe operating area (SOA) of the power devices, and, as a consequence, the maximum attainable output power, especially in presence of highly reactive loads. Moreover, full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated protection circuits. To overcome these substantial drawbacks, the use of power MOS devices, which are immune from secondary breakdown is highly desirable. The device described has therefore been developed in a mixed bipolar-MOS high voltage technology called BCDII 100/120. 1) Output Stage The main design task in developping a power operational amplifier, independently of the technology used, is that of realization of the output stage. The solution shown as a principle shematic by Fig3 represents the DMOS unity - gain output buffer of the TDA7293. This large-signal, high-power buffer must be capable of handling extremely high current and voltage levels while maintaining acceptably low harmonic distortion and good behaviour over frequency response; moreover, an accurate control of quiescent current is required. A local linearizing feedback, provided by differential amplifier A, is used to fullfil the above requirements, allowing a simple and effective quiescent current setting. Proper biasing of the power output transistors alone is however not enough to guarantee the absence of crossover distortion. While a linearization of the DC transfer characteristic of the stage is obtained, the dynamic behaviour of the system must be taken into account. A significant aid in keeping the distortion contributed by the final stage as low as possible is provided by the compensation scheme, which exploits the direct connection of the Miller capacitor at the amplifier’s output to introduce a local AC feedback path enclosing the output stage itself. 2) Protections In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overload conditions. Due to the absence of the 2nd breakdown phenomenon, the SOA of the power DMOS transistors is delimited only by a maximum dissipation curve dependent on the duration of the applied stimulus. In order to fully exploit the capabilities of the power transistors, the protection scheme implemented in this device combines a conventional SOA protection circuit with a novel local temperature sensing technique which " dynamically" controls the maximum dissipation. Figure 3: Principle Schematic of a DMOS unity-gain buffer. 6/15 TDA7293 Figure 4: Turn ON/OFF Suggested Sequence +Vs (V) +40 -40 -Vs VIN (mV) VST-BY PIN #9 (V) 5V VMUTE PIN #10 (V) 5V IQ (mA) VOUT (V) OFF ST-BY PLAY MUTE ST-BY OFF MUTE D98AU817 In addition to the overload protection described above, the device features a thermal shutdown circuit which initially puts the device into a muting state (@ Tj = 150 oC) and then into stand-by (@ Tj = 160 oC). Full protection against electrostatic discharges on every pin is included. Figure 5: Single Signal ST-BY/MUTE Control Circuit MUTE MUTE/ ST-BY STBY 20K 10K 30K 1N4148 mute functions, independently driven by two CMOS logic compatible input pins. The circuits dedicated to the switching on and off of the amplifier have been carefully optimized to avoid any kind of uncontrolled audible transient at the output. The sequence that we recommend during the ON/OFF transients is shown by Figure 4. The application of figure 5 shows the possibility of using only one command for both st-by and mute functions. On both the pins, the maximum applicable range corresponds to the operating supply voltage. 10µF 10µF D93AU014 3) Other Features The device is provided with both stand-by and APPLICATION INFORMATION HIGH-EFFICIENCY Constraints of implementing high power solutions are the power dissipation and the size of the power supply. These are both due to the low efficiency of conventional AB class amplifier approaches. Here below (figure 6) is described a circuit proposal for a high efficiency amplifier which can be adopted for both HI-FI and CAR-RADIO applications. 7/15 TDA7293 The TDA7293 is a monolithic MOS power amplifier which can be operated at 100V supply voltage (120V with no signal applied) while delivering output currents up to ±6.5 A. This allows the use of this device as a very high power amplifier (up to 180W as peak power with T.H.D.=10 % and Rl = 4 Ohm); the only drawback is the power dissipation, hardly manageable in the above power range. The typical junction-to-case thermal resistance of the TDA7293 is 1 oC/W (max= 1.5 oC/W). To avoid that, in worst case conditions, the chip temperature exceedes 150 oC, the thermal resistance of the heatsink must be 0.038 oC/W (@ max ambient temperature of 50 oC). As the above value is pratically unreachable; a high efficiency system is needed in those cases where the continuous RMS output power is higher than 50-60 W. The TDA7293 was designed to work also in higher efficiency way. For this reason there are four power supply pins: two intended for the signal part and two for the power part. T1 and T2 are two power transistors that only operate when the output power reaches a certain threshold (e.g. 20 W). If the output power increases, these transistors are switched on during the portion of the signal where more output voltage swing is needed, thus "bootstrapping" the power supply pins (#13 and #15). The current generators formed by T4, T7, zener diodes Z1, Z2 and resistors R7,R8 define the minimum drop across the power MOS transistors of the TDA7293. L1, L2, L3 and the snubbers C9, R1 and C10, R2 stabilize the loops formed by the "bootstrap" circuits and the output stage of the TDA7293. By considering again a maximum average output power (music signal) of 20W, in case of the high efficiency application, the thermal resistance value needed from the heatsink is 2.2 oC/W (Vs =±50 V and Rl= 8 Ohm). All components (TDA7293 and power transistors T1 and T2) can be placed on a 1.5 oC/W heatsink, with the power darlingtons electrically insulated from the heatsink. Since the total power dissipation is less than that of a usual class AB amplifier, additional cost savings can be obtained while optimizing the power supply, even with a high heatsink . BRIDGE APPLICATION Another application suggestion is the BRIDGE configuration, where two TDA7293 are used. In this application, the value of the load must not be lower than 8 Ohm for dissipation and current capability reasons. A suitable field of application includes HI-FI/TV subwoofers realizations. 8/15 The main advantages offered by this solution are: - High power performances with limited supply voltage level. - Considerably high output power even with high load values (i.e. 16 Ohm). With Rl= 8 Ohm, Vs = ±25V the maximum output power obtainable is 150 W, while with Rl=16 Ohm, Vs = ±40V the maximum Pout is 200 W. APPLICATION NOTE: (ref. fig. 7) Modular Application (more Devices in Parallel) The use of the modular application lets very high power be delivered to very low impedance loads. The modular application implies one device to act as a master and the others as slaves. The slave power stages are driven by the master device and work in parallel all together, while the input and the gain stages of the slave device are disabled, the figure below shows the connections required to configure two devices to work together. The master chip connections are the same as the normal single ones. The outputs can be connected together without the need of any ballast resistance. The slave SGND pin must be tied to the negative supply. The slave ST-BY and MUTE pins must be connected to the master ST-BY and MUTE pins. The bootstrap lines must be connected together and the bootstrap capacitor must be increased: for N devices the boostrap capacitor must be 22µF times N. The slave IN-pin must be connected to the negative supply. THE BOOTSTRAP CAPACITOR For compatibility purpose with the previous devices of the family, the boostrap capacitor can be connected both between the bootstrap pin (6) and the output pin (14) or between the boostrap pin (6) and the bootstrap loader pin (12). When the bootcap is connected between pin 6 and 14, the maximum supply voltage in presence of output signal is limited to 100V, due the bootstrap capacitor overvoltage. When the bootcap is connected between pins 6 and 12 the maximum supply voltage extend to the full voltage that the technology can stand: 120V. This is accomplished by the clamp introduced at the bootstrap loader pin (12): this pin follows the output voltage up to 100V and remains clamped at 100V for higher output voltages. This feature lets the output voltage swing up to a gate-source voltage from the positive supply (VS -3 to 6V). TDA7293 Figure 6: High Efficiency Application Circuit +50V D6 1N4001 T1 BDX53A T3 BC394 R4 270 D1 BYW98100 +25V T4 BC393 R17 270 L1 1µH D3 1N4148 C12 330nF R20 20K C1 1000µF 63V C3 100nF C5 1000µF 35V C7 100nF R22 10K C9 330nF IN C2 1000µF 63V 13 TDA7293 C13 10µF C4 100nF C6 1000µF 35V R23 10K C8 100nF R2 2 C10 330nF D5 1N4148 1 R15 10K 10 C14 10µF D2 BYW98100 -25V D7 1N4001 R6 20K C11 22µF R7 3.3K L3 5µH OUT R18 270 C15 22µF R8 3.3K 12 8 C16 1.8nF 14 R13 20K R14 30K R3 680 R16 13K 6 9 ST-BY R21 20K 7 2 4 PLAY GND T5 BC393 Z1 3.9V 3 R12 13K R1 2 R5 270 C17 1.8nF Pot 15 Z2 3.9V L2 1µH D4 1N4148 T7 BC394 R19 270 T2 BDX54A T6 BC393 R9 270 T8 BC394 R10 270 R11 20K -50V D97AU807C Figure 6a: PCB and Component Layout of the fig. 6 9/15 TDA7293 Figure 6b: PCB - Solder Side of the fig. 6. Figure 7: Modular Application Circuit +Vs C7 100nF C6 1000µF R3 22K MASTER BUFFER DRIVER +Vs C2 22µF R2 680Ω C1 470nF IN- 2 IN+ 3 7 +PWVs 13 11 - R1 22K VMUTE R5 10K SGND 4 MUTE 10 STBY 9 R4 22K C4 10µF OUT 12 BOOT LOADER 6 MUTE VSTBY 14 + THERMAL SHUTDOWN STBY S/C PROTECTION 1 8 15 STBY-GND -Vs -PWVs C9 100nF C3 10µF 5 C10 100nF R7 2Ω C5 47µF BOOTSTRAP CLIP DET C8 1000µF -Vs +Vs C7 100nF C6 1000µF BUFFER DRIVER +Vs IN- 2 IN+ 3 7 +PWVs 13 11 - SLAVE SGND 4 MUTE 10 9 STBY OUT 12 BOOT LOADER 6 MUTE THERMAL SHUTDOWN STBY S/C PROTECTION 1 8 15 STBY-GND -Vs -PWVs C9 100nF C8 1000µF -Vs 10/15 14 + 5 BOOTSTRAP D97AU808D TDA7293 Figure 8a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE) Figure 8b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE) 11/15 TDA7293 Figure 12: Modular Application Derating Rload vs Vsupply (ref. fig. 7) Figure 9: Distortion vs Output Power T.H.D (%) 10 6 5 Minimum Allovable Load (ohm) 2 1 0.5 0.2 Vs = +/-29V Rl = 4 Ohm 0.1 f = 20 KHz 0.05 0.02 f = 1KHz 0.01 0.005 5 4 3 2 Forbidden Area Pd > 50W at Tcase=70°C 1 0.002 0 0.001 2 5 10 20 50 100 20 25 Pout (W) 30 35 40 45 50 Supply Voltage (+/-Vcc) Figure 10: Distortion vs Output Power Figure 13: Modular Application Pd vs Vsupply (ref. fig. 7) T.H.D (%) 10 5 60 Pd limit at Tcase=70°C 2 Dissipated Power for each device of the modular application 4ohm 50 Vs = +/-40V Rl = 8 Ohm 0.5 0.2 0.1 0.05 Pdissipated (W) 1 f = 20 KHz 0.02 0.01 40 30 8ohm 20 f = 1KHz 0.005 10 0.002 0.001 2 5 10 20 50 0 100 20 Pout (W) 25 30 35 40 45 50 Supply Voltage (+/-Vcc) Figure 11: Distortion vs Frequency Figure 14: Output Power vs. Supply Voltage T.H.D. (%) Po (W) 10 120 110 100 1 VS= +/- 35 V 90 Rl= 8 Ohm 80 Rl=8 Ohm f= 1 KHz T.H.D.=10 % 70 60 0.1 50 40 Pout=100 mW THD=0.5 % 30 0.01 20 10 Po=50 W 0 0.001 0 12/15 0.1 1 Frequency (KHz) 10 100 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 Vs (+/-V) TDA7293 13/15 TDA7293 mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 5 0.197 B 2.65 0.104 C 1.6 E 0.49 0.55 0.063 0.019 0.022 F 0.66 0.75 0.026 G 1.14 1.27 1.4 0.045 0.050 0.055 G1 17.57 17.78 17.91 0.692 0.700 0.705 H1 19.6 0.030 0.772 H2 20.2 0.795 L 20.57 0.810 L1 18.03 0.710 L2 2.54 0.100 L3 17.25 17.5 17.75 0.679 0.689 0.699 L4 10.3 10.7 10.9 0.406 0.421 0.429 L5 5.28 0.208 L6 2.38 0.094 L7 2.65 2.9 0.104 0.114 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 14/15 OUTLINE AND MECHANICAL DATA Multiwatt15 H TDA7293 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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