L6911B 5 BIT PROGRAMMABLE POWER SUPPLY CONTROLLER FOR PENTIUM II PROCESSOR OPERATING SUPPLY VOLTAGE FROM 5V TO 12V TTL-COMPATIBLE 5BIT PROGRAMMABLE OUTPUT FROM: -1.3V TO 2.05V WITH 0.05V BINARY STEPS -2.1V TO 3.5V WITH 0.1V BINARY STEPS VOLTAGE MODE PWM CONTROL EXCELLENT OUTPUT ACCURACY +/-1% OVERLINE, AND TEMPERATURE VARIATIONS HIGH PRECISION INTERNAL REFERENCE DIGITALLY TRIMMED VERY FAST LOAD TRANSIENT 0% TO 100% DUTY CYCLE POWER GOOD OUTPUT OVERVOLTAGE PROTECTION OVERCURRENT PROTECTION REALISED USING THE MOSFET’s RDSon OPERATING FREQUENCY FROM 50KHz TO 1MHz MEETS INTEL PENTIUM II SPECIFICATION DISABLE FUNCTION SO20 Applications POWER SUPPLY FOR ADVANCED MICROPROCESSOR SUPPLIES POWER SUPPLY FOR PENTIUM II INTEL PROCESSORS DESCRIPTION The L6911B is a power supply controller specifically designed to provide a high performance DC/DC conversion for Pentium II Microprocessors. A precise 5 bit digital to analog converter APPLICATION CIRCUIT Vin 5V/12V VCC 5V/12V OCSET VCC OSC OVP VD0 VD1 VD2 VD3 VD4 SS PGOOD 18 20 19 4 2 15 14 13 17 16 6 11 8 3 12 UGATE Vo 1.3V to 3.5V 5 7 BOOT 1 10 9 PHASE LGATE PGND GND VSEN VFB COMP D98IN956B April 1999 1/7 L6911B DESCRIPTION (continued) (DAC) allows to adjust the output voltage from 1.3V to 2.05V with 0.05V binary steps and from 2.1V to 3.5V with 0.1V binary steps. The high precision internal reference, digitally trimmed, assures the selected output voltage to within +/-1%. Thanks to the window comparator system, the device provides excellent load transient performance. The high peak current gate drive affords to have fast switching to the external power mos, performing an high efficiency. The L6911B assures a fast protection against load overvoltage and load overcurrent. An external SCR is triggered to crowbar the input supply in case of overvoltage. In case of output short circuit the soft start capacitor is discharged and the system works in hiccup mode. ABSOLUTE MAXIMUM RATINGS Symbol Parameter VCC VCC to PGND VBOOT-VPHASE Boot Voltage Input, Output or I/O Voltage Value Unit 15 V 15 V -0.3 to VCC+0.3 V BLOCK DIAGRAM V CC 12V Vin 5V VCC PGOOD OCSET BOOT SS MONITOR and PROTECTION UGATE OVP RT PHASE OSC LGATE VD0 PGND VD1 VD2 VD3 VD4 - D/A + + - D98IN957A Vo 1.8V to 3.5V GND PWM VSEN VFB E/A COMP THERMAL DATA Symbol Value Unit Thermal Resistance Junction to Ambient 110 °C/W Tmax Maximum Junction Temperature 150 °C Tstg Storage Temperature Range -65 to 150 °C Value Unit 5V ±10%/12V ±10% V Rthj-amb Parameter RECOMMENDED OPERATING CONDITION Symbol 2/7 Parameter VCC VCC to PGND Tamb Ambient Temperature Range 0 to 70 °C TJ Junction Temperature Range 0 to 125 °C L6911B PIN CONNECTION VSEN 1 20 RT OCSET 2 19 OVP SS 3 18 VCC VID0 4 17 LGATE VID1 5 16 PGND VID2 6 15 BOOT VID3 7 14 UGATE VID4 8 13 PHASE COMP 9 12 PGOOD 10 11 GND FB D98IN958 PIN FUNCTIONS N° Name 1 VSEN Connected to the output voltage is able to manage overvoltage conditions and the PGOOD signal. Description 2 OCSET A resistor connected from this pin and the upper Mos Drain sets the current limit protection. The internal 200µA current generator sinks a current from the drain through the external resistor. The overcurrent threshold is due to the following equation: IP = Iocs ⋅ Rocs Rdson 3 SS The soft start time is programmed connecting an external capacitor from this pin and GND. The internal current generator forces through the capacitor 10µA. This pin can be used to disable the device forcing a voltage lower than 0.4V. 4-8 VID0 - 4 9 COMP This pin is connected to the error amplifier output and is used to compensate the voltage control feedback loop. 10 FB This pin is connected to the error amplifier inverting input and is used to compensate the voltage control feedback loop. 11 GND 12 PGOOD This pin is an open collector output and is pulled low if the output voltage is not within ±10% of the programmed voltage. This pin is forced high if the ”11111” VID is set. 13 PHASE This pin is connected to the source of the upper mosfet and provides the return path for the high side driver. This pin monitors the drop across the upper mosfet for the current limit. 14 UGATE High side gate driver output. Voltage Identification code pins. These input are open collector and TTL compatible. Are used to program the output voltage as specified in Table 1 and to set the overvoltage and powergood thresholds. All internal voltage reference are referred to this pin. 15 BOOT Bootstrap capacitor pin. Through this pin is supplied the high side driver and the upper mosfet. 16 PGND Power ground pin. This pin has to be connected closely to the low side mosfet source in order to reduce the noise injection into the device. 17 LGATE This pin is the lower mosfet gate driver output. 18 VCC Device supply voltage. The operative supply voltage range is 4.5V to 12V. Do not connect VIN to 12V if VCC is 5V. 19 OVP Over voltage protection. If the output voltage reach the 15% above the programmed voltage this pin is driven high and can be used to drive an external SCR that crowbar the supply voltage. 3/7 L6911B PIN FUNCTION (continued) N° Name Description 20 RT Oscillator Switching frequency pin. Connecting an external resistor from this pin to ground the switching frequency is increased according to the equation: fS = 200kHz + 5 ⋅ 106 RT(KΩ) Connecting the resistor from this pin and the Vcc the Switching frequency is reduced according to the equation: fS = 200kHz − 4 ⋅ 107 RT(KΩ) If the pin is not connected the switching frequency is 200kHz. ELECTRICAL CHARACTERISTICS Symbol Parameter Test Condition Min. Typ. Max. Unit - 5 - mA VCC SUPPLY CURRENT ICC Supply current UGATE and LGATE open POWER-ON Rising VCC Threshold VOCSET = 4.5V - - 4.6 V Falling VCC Threshold VOCSET = 4.5V 3.6 - - V - 1.26 - V Rising VOCSET Threshold OSCILLATOR ∆Vosc Free Running Frequency RT = open 185 200 215 kHz Total Variation RT to GND >6kΩ, RT to VCC = 12V > 200kΩ -15 - 15 % Ramp Amplitude RT = open - 1.9 - V VID0, VID1, VID2, VID3 see Table1 -1 - 1 % DC Gain - 88 - dB Gain-Bandwidth Product - 15 - MHz - 10 - V/µs 0.6 1 - A - 1.5 3 Ω 1.2 2 - A - 1 2 Ω - 115 120 % 200 230 REFERENCE and DAC DACOUT voltage Accuracy ERROR AMPLIFIER GBW SR Slew Rate COMP = 10pF GATE DRIVERS IUGATE Upper Gate Source VBOOT - Vphase = 12V, VUGATE = 6V RUGATE Upper Gate Sink ILGATE = 0.3A ILGATE Lower Gate Source VCC = 12V, VLGATE = 6V RLGATE Lower Gate Sink ILGATE = 0.3A PROTECTION Overvoltage Trip (VSEN/DACOUT) 4/7 IOCSET OCSET Current Source VOCSET = 4.5VDC 170 IOVP OVP Sourcing Current VSEN = 5.5V, VOVP = 0V 60 ISS Soft Start Current µA mA 10 µA L6911B ELECTRICAL CHARACTERISTICS (continued) Symbol VPGOOD Parameter Test Condition Min. Typ. Max. Unit Upper Threshold (VSEN/DACOUT) VSEN Rising 106 - 111 % Upper Threshold (VSEN/DACOUT) VSEN Rising 89 - 94 % Hysteresis (VSEN/DACOUT) Upper and Lower Threshold - 2 - % PGOOD Voltage Low IPGOOD = -5mA - 0.5 - V Table 1. VID4 VID3 VID2 VID1 VID0 OUTPUT VOLTAGE (V) 0 1 1 1 1 1.3 0 1 1 1 0 1.35 0 1 1 0 1 1.4 0 1 1 0 0 1.45 0 1 0 1 1 1.5 0 1 0 1 0 1.55 0 1 0 0 1 1.6 0 1 0 0 0 1.65 0 0 1 1 1 1.7 0 0 1 1 0 1.75 0 0 1 0 1 1.8 0 0 1 0 0 1.85 0 0 0 1 1 1.9 0 0 0 1 0 1.95 0 0 0 0 1 2 0 0 0 0 0 2.05 1 1 1 1 1 0 1 1 1 1 0 2.1 1 1 1 0 1 2.2 1 1 1 0 0 2.3 1 1 0 1 1 2.4 1 1 0 1 0 2.5 1 1 0 0 1 2.6 1 1 0 0 0 2.7 1 0 1 1 1 2.8 1 0 1 1 0 2.9 1 0 1 0 1 3 1 0 1 0 0 3.1 1 0 0 1 1 3.2 1 0 0 1 0 3.3 1 0 0 0 1 3.4 1 0 0 0 0 3.5 5/7 L6911B mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.1 0.3 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.6 13 0.496 0.512 E 7.4 7.6 0.291 0.299 e 1.27 OUTLINE AND MECHANICAL DATA 0.050 H 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.4 1.27 0.016 0.050 SO20 K 0° (min.)8° (max.) L h x 45° A B e A1 K H D 20 11 E 1 1 0 SO20MEC 6/7 C L6911B Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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