STMICROELECTRONICS LIS2L02AQ

LIS2L02AQ
INERTIAL SENSOR:
2Axis - 2g/6g LINEAR ACCELEROMETER
PRODUCT PREVIEW
■
3V TO 5.25V SINGLE SUPPLY OPERATION
THE SENSITIVITY IS ADJUSTED WITH A
TOTAL ACCURACY OF ±10%
THE OUTPUT VOLTAGE, OFFSET,
SENSITIVITY AND TEST VOLTAGE ARE
RATIOMETRIC TO THE SUPPLY VOLTAGE
DEVICE SENSITIVITY IS ON-CHIP FACTORY
TRIMMED
EMBEDDED SELF TEST
■
HIGH SHOCK SURVIVABILITY
■
■
■
■
DESCRIPTION
The LIS2L02AQ is a dual-axis linear accelerometer
that includes a sensing element and an IC interface
able to take the information from the sensing element
and to provide an analog signal to the external world.
The sensing element, capable to detect the acceleration, is manufactured using a dedicated process
called THELMA (Thick Epi-Poly Layer for Microactuators and Accelerometers) developed by ST to produce inertial sensors and actuators in silicon.
QFN-44
ORDERING NUMBER: LIS2L02AQ
over a maximum bandwidth of 4.0 KHz for both the X
and Y axis. The device bandwidth may be reduced by
using external capacitances. A self-test capability allows the user to check the functioning of the system.
The LIS2L02AQ is available in plastic SMD package
and it is specified over a temperature range extending from -40°C to +85°C.
The LIS2L02AQ belongs to a family of products suitable for a variety of applications:
– Antitheft systems
The IC interface instead is manufactured using a
CMOS process that allows high level of integration to
design a dedicated circuit which is trimmed to better
match the sensing element characteristics.
The LIS2L02AQ has a user selectable full scale of
2g, 6g and it is capable of measuring accelerations
– Inertial navigation
– Virtual reality input devices
– Vibration Monitoring, recording and compensation
– Appliance control
– Robotics
BLOCK DIAGRAM
CHARGE
AMPLIFIER
S1X
S1Y
rot
MUX
Routx
Voutx
Routy
Vouty
S/H
DEMUX
S2Y
S2X
S/H
VOLTAGE & CURRENT
REFERENCE
TRIMMING CIRCUIT
&
TEST INTERFACE
CLOCK
&
PHASE GENERATOR
December 2002
This is preliminary information on a new product now in development. Details are subject to change without notice.
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LIS2L02AQ
PIN DESCRIPTION
N°
Pin
Function
1 to 3
NC
4
GND
0V supply
5
Vdd
Power supply
6
Vouty
7
ST
Internally not connected
Output Voltage
Self Test (Logic 0: normal mode; Logic 1: Self-test)
8
Voutx
9-13
NC
Internally not connected
14
PD
Power Down (Logic 0: normal mode; Logic 1: Power-Down mode)
15
NC
Internally not connected
Full Scale selection (Logic 0: 2g Full-scale; Logic 1: 6g Full-scale)
16
FS
17-18
Reserved
19
NC
20
Reserved
Output Voltage
Leave unconnected
Internally not connected
Leave unconnected
21
NC
22-23
Reserved
Internally not connected
24-25
NC
Internally not connected
26
Reserved
Connect to Vdd or GND
27
Reserved
Leave unconnected or connect to Vdd
28
Reserved
Leave unconnected or connect to GND
29-44
NC
Leave unconnected
Internally not connected
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
GND
NC
Vdd
NC
LIS2L02AQ
Vouty
Reserved
ST
Reserved
Voutx
Reserved
Reserved
NC
Reserved
Reserved
Reserved
Reserved
Reserved
NC
NC
PD
NC
NC
NC
NC
NC
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NC
NC
FS
X
DIRECTION OF THE
DETECTABLE
ACCELERATIONS
NC
NC
Y
NC
1
NC
NC
PIN CONNECTION (Top view)
LIS2L02AQ
ELECTRICAL CHARACTERISTCS (Temperature range -40°C to +85°C)
Symbol
Parameter
Test Condition
Vdd
Supply voltage
Idd
Supply current
Voff
Zero-g level
Tamb = 25°C
ratiometric to Vdd
Ar
Acceleration range
0V on FS pin
Min.
3
1
Sensitivity ratiometric to
Vdd
Max.
Unit
5.25
V
1.0
mA
Vdd/2-10%
Vdd/2
Vdd/2+10%
V
±1.8
±2.0
±2.2
g
±6.0
Vdd on FS pin
So
Typ.
g
Tamb = 25°C
Full-scale = 2g
Vdd/5–10%
Vdd/5
Vdd/5+10%
V/g
Tamb = 25°C
Full-scale = 6g
Vdd/15–10%
Vdd/15
Vdd/15+10%
V/g
NL
Non Linearity
Best fit straight line
X, Y axis
Full-scale = 2g
±0.3
%
fuc
Sensing Element
Resonant Frequency
X, Y axis
4.0
KHz
an
Acceleration noise
density
Vdd = 5V
Full-scale = 2g
50
µg/ Hz
Vt
Self test output voltage
Ratiometric to Vdd
Tamb = 25°C
@ 5V
100
Vst
Self test input
Logic 0 level
0
0.8
V
Logic 1 level
2.8
Vdd
V
Rout
Output impedance
Cload
Capacitive load drive
mV
100
320
kΩ
pF
FUNCTIONALITY
1.1 Sensing element
The THELMA process is utilized to create a surface micro-machined accelerometer. The technology allows to
carry out suspended silicon structures which are attached to the substrate in a few points called anchors and
free to move on a plane parallel to the substrate itself. To be compatible with the traditional packaging techniques a cap is placed on top of the sensing element to avoid blocking the moving parts during the molding
phase.
The equivalent circuit for the sensing element is shown in the below figure; when a linear acceleration is applied,
the proof mass displaces from its nominal position, causing an imbalance in the capacitive half-bridge. This imbalance is measured using charge integration in response to a voltage pulse applied to the sense capacitor.
The nominal value of the capacitors, at steady state, is few pF and when an acceleration is applied the maximum
variation of the capacitive load is few tenth of pF.
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LIS2L02AQ
Figure 1. Equivalent electrical circuit
Cps1
Rs1
S1x
Cs1x
Cpr
Rr
Cs2x
S2x
Cps2
Rs2
Cps1
rot
Rs1
S1y
Cs1y
Cpr
Rr
Cs2y
S2y
Cps2
Rs2
1.2 IC Interface
The complete signal processing uses a fully differential structure, while the final stage converts the differential
signal into a single-ended one to be compatible with the external world.
The first stage is a low-noise capacitive amplifier that implements a Correlated Double Sampling (CDS) at its
output to cancel the offset and the 1/f noise. The produced signal is then sent to two different S&Hs, one for
each channel, and made available to the outside.
The low noise input amplifier operates at 200 kHz while the two S&Hs operate at a sampling frequency of 66
kHz. This allows a large oversampling ratio, which leads to in-band noise reduction and to an accurate output
waveform.
All the analog parameters (output offset voltage and sensitivity) are ratiometric to the voltage supply. Increasing
or decreasing the voltage supply, the sensitivity and the offset will increase or decrease linearly. The feature
provides the cancellation of the error related to the voltage supply along an analog to digital conversion chain.
1.3 Factory calibration
The IC interface is factory calibrated to provide to the final user a device ready to operate. The parameters which
are trimmed are: gain, offset, common mode and internal clock frequency.
The trimming values are stored inside the device by a poly-fuse structure. Any time the device is turned on, the
memorized bits are downloaded into the registers to be employed during the normal operation. The poly-fuse
approach allows the final user to utilize the device without any need for further calibration
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LIS2L02AQ
mm
inch
OUTLINE AND
MECHANICAL DATA
DIM.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
1.70
1.80
1.90
0.067
0.071
0.075
A1
0.19
0.21
0.007
b
0.20
0.30
0.008
0.01
D
7.0
0.276
E
7.0
0.276
e
0.50
0.020
0.012
J
5.04
5.24
0.198
0.206
K
5.04
5.24
0.198
0.206
L
0.38
0.58
0.015
P
0.48
45 REF
0.019
0.023
QFN-44 (7x7x1.8mm)
Quad Flat Package No lead
45 REF
SEATING PLANE
0.25
0.008
M
G
M
N
34
44
44
1
33
1
DETAIL "N"
23
11
22
12
DETAIL G
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LIS2L02AQ
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
 2002 STMicroelectronics - All Rights Reserved
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