STLVDS32 HIGH SPEED DIFFERENTIAL LINE RECEIVERS ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI TIA/EIA-644 STANDARD OPERATES WITH A SINGLE 3.3V SUPPLY DESIGNED FOR SIGNALING RATE UP TO 400Mbps DIFFERENTIAL INPUT THRESHOLDS ±100mV MAX TYPICAL PROPAGATION DELAY TIME OF 2.5ns POWER DISSIPATION 60mW TYPICAL PER RECEIVER AT 200MHz LOW VOLATGE TTL (LVTTL) LOGIC OUTPUT LEVELS PIN COMPATIBLE WITH THE AM26LS32, SN65LVD32 OPEN CIRCUIT FAIL SAFE ESD PROTECTION: 7KV RECEIVER PINS 3KV ALL PINS VS GND DESCRIPTION The STLVDS32 is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allow operations with a 3.3V supply rail. This differential receiver provides a SOP TSSOP valid logical output state with a 3.3V supply rail. It also provides a valid logical output state with a ±100mV differential input voltage within the input common mode voltage range. The input common mode voltage allows 1V of ground potential difference between two LVDS nodes. The intended application of this device and signalling technique is both point-to-point and multidrop data transmission over controlled impedance media approximately 100Ω. The transmission media may be printed circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer depend upon the attenuation characteristics of the media and noise coupling to the environment. The STLVDS32 version is characterized for operation from -40°C to 85°C. ORDERING CODES Type Temperature Range Package Comments STLVDS32BD STLVDS32BDR STLVDS32BTR -40 to 85 °C -40 to 85 °C -40 to 85 °C SO-16 (Tube) SO-16 (Tape & Reel) TSSOP16 (Tape & Reel) 50parts per tube / 20tube per box 2500 parts per reel 2500 parts per reel May 2003 1/13 STLVDS32 PIN CONFIGURATION PIN DESCRIPTION PlN N° SYMBOL 2, 6, 10, 14 1, 7, 9, 15 3, 5, 11, 13 4 12 8 1A to 4A 1B to 4B 1Y to 4Y G G GND VCC 16 LOGIC DIAGRAM AND LOGIC SYMBOL 2/13 NAME AND FUNCTION Receiver Inputs Negated Receiver Inputs Receiver Outputs Enable Enable Ground Supply Voltage STLVDS32 TRUTH TABLE DIFFERENTIAL INPUTS ENABLES OUTPUT A, B G G Y VID ≥ 100mV H X H X H X L H X X L X L X L H X L H H ? ? L L Z H H -100mV < VID < 100mV VID ≤ -100mV X OPEN L = Low level, H = High Level, X = Don’t care, Z = High Impedance,? = Indeterminate ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage (Note 1) VI Input Voltage VI Input Voltage (A or B inputs) ESD Tstg Human Body Model Value Unit -0.5 to 4.6 V -0.5 to (VCC + 0.5) V -0.5 to 4.6 V 7 3 KV -65 to +150 °C Pins Receivers All Pins vs GND Storage Temperature Range Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. Note 1: All voltages except differential I/O bus voltage, are with respect to the network ground terminal. RECOMMENDED OPERATING CONDITIONS Symbol Min. Typ. Max. Unit VCC Supply Voltage Parameter 3.0 3.3 3.6 V VIH HIGH Level Input Voltage (ENABLE) 2.0 VIL LOW Level Input Voltage (ENABLE) |VID| Magnitude of Differential Input Voltage VIC Common Mode Input Voltage V 0.8 V 0.1 0.6 V 0.5|VID| 2.4-0.5|VID| V VCC - 0.8 TA Operating Temperature Range -40 85 °C 3/13 STLVDS32 ELECTRICAL CHARACTERISTICS (Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25°C, and VCC = 3.3V) Symbol Parameter VITH+ Positive Going Differential Input Voltage Threshold Negative Going Differential Input Voltage Threshold High Level Output Voltage VITHVOH Test Conditions 2.4 V 2.8 IOH = 8mA ICC Enabled, No Load Disabled No Load Supply Current for STLVDS9637 Input Current (A or B inputs) VI = 0V 0.4 V 10 0.25 4 18 0.5 10 mA mA mA -10 -20 µA 20 µA VIH = 2V 10 µA VIL = 0.8V 10 µA ± 10 µA -2 VI = 2.4V IIL IOZ 4/13 mV IOH = -8mA Supply Current for STLVDS32, STLVDS3486 IIH Unit 100 IOH = -4mA Low Level Output Voltage Power off Input Current (A or B inputs) High Level Input Current (EN, G, G or Inputs) Low Level Input Current (EN, G, G or Inputs) High Impedance Output Current Max. mV ICC II(OFF) Typ. -100 VOL II Min. VCC = 0 -1.2 VI = 3.6V VO = 0 or VCC -3 10 STLVDS32 SWITCHING CHARACTERISTICS (Unless otherwise noted. Typical values are referred to TA = 25°C and VCC = 3.3V) Symbol tPLH tPHL tr tf tsk(O) tsk(P) tsk(PP) tPZH tPZL tPHZ tPLZ Parameter Test Conditions Propagation Delay Time, CL = 10pF Low to High Output Propagation Delay Time, High to Low Output Differential Output Signal Rise Time Differential Output Signal Fall Time Channel to Channel Output Skew (note1) Pulse Skew (|tPHL - tPLH|) (note2) Part to Part Skew (note3) Propagation Delay Time, High Impedance to High Level Output Propagation Delay Time, High Impedance to Low Level Output Propagation Delay Time, High Level to High Impedance Output Propagation Delay Time, Low Level to High Impedance Output Fig. 2 Fig. 1 Min. Typ. Max. Unit 1.5 2.5 3.3 ns 1.5 2.5 3.3 ns 0.4 ns 0.4 ns 0.1 0.3 ns 0.2 0.4 ns 1 ns 3 12 ns 5 12 ns 5 12 ns 5 12 ns Note 1: tsk(O) is the maximum delay time difference between the propagation delay of one channel and that of the others on the same chip with any event on the inputs. Note 2: tsk(P) is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. Note 3: tsk(PP) is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same VCC, and within 5°C of each other within the operating temperature range. 5/13 STLVDS32 Figure 1 : Timing Test Circuit, Timing And Waveforms Note A: All input pulse are supplied by a generator having the following characteristics: tr or tf ≤ 1ns, pulse repetition rate (PRR) = 50Mpps, pulse width = 10 ± 0.2ns. Note B: CL includes instrumentation and fixture capacitance within 6mm of the D.U.T. 6/13 STLVDS32 Figure 2 : Enable And Disable Time Test Circuit And Waveform Note A: All input pulse are supplied by a generator having the following characteristics: tr or tf ≤ 1ns, pulse repetition rate (PRR) = 50Mpps, pulse width = 500 ± 10ns. Note B: CL includes instrumentation and fixture capacitance within 6mm of the D.U.T. 7/13 STLVDS32 TYPICAL PERFORMANCE CHARACTERISTICS (unless otherwise specified Tj = 25°C) Figure 3 : Output Current vs Output Voltage 8/13 Figure 4 : Output Current vs Output Voltage STLVDS32 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.004 0.008 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45˚ (typ.) D 9.8 E 5.8 10 0.385 6.2 0.228 0.393 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 8 0.024 ˚ (max.) PO13H 9/13 STLVDS32 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 10/13 STLVDS32 Tape & Reel SO-16 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 22.4 0.519 0.882 Ao 6.45 6.65 0.254 0.262 Bo 10.3 10.5 0.406 0.414 Ko 2.1 2.3 0.082 0.090 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 11/13 STLVDS32 Tape & Reel TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 12/13 TYP 0.504 22.4 0.519 0.882 Ao 6.7 6.9 0.264 0.272 Bo 5.3 5.5 0.209 0.217 Ko 1.6 1.8 0.063 0.071 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 STLVDS32 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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