® STV6432 Audio/Video Output Buffers for STB and DVD Devices FEATURES ■ VIDEO SECTION ● Y/C/CVBS Inputs ● Y/C Outputs for TV ● 4 CVBS Outputs (for TV, VCR, Aux and RF Modulator) ● 6 dB Gain with Fine Adjustment ● Integrated 150Ω Buffers ● Sync Bottom Clamp on all CVBS/Y And Bias on C Inputs ● Crosstalk: 50 dB (Typ.) ● Bandwidth: 15 MHz ■ AUDIO SECTION ● 1 pair of Stereo Inputs ● 1 pair of Stereo Outputs (TV, VCR, AUX) ● Stereo-to-Mono Capability (RF Mod output) ● 6 dB Gain ● Crosstalk: 80 dB min. SO28 ORDER CODE: STV6432 DESCRIPTION The STV6432 is an audio/video output interface for US STB and DVD. It adapts in amplitude and impedance the audio and video signals coming from the digital decoder to provide them to the TV set, VCR, Auxiliary and RF modulator. The video gains are adjustable from 5 dB to 8 dB in steps of 1 dB. September 2003 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/15 STV6432 TABLE OF CONTENTS Chapter 1 PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Chapter 2 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 2.1 Absolute Maximum Ratings ................................................................................................ 5 2.2 Thermal Data ...................................................................................................................... 5 2.3 Supply Section ..................................................................................................................... 5 2.4 Audio Section ....................................................................................................................... 6 2.5 Video Section ....................................................................................................................... 7 2.6 Chroma Section ................................................................................................................... 8 Chapter 3 INPUT/OUTPUT GROUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Chapter 4 APPLICATION DIAGRAMS Chapter 5 PACKAGE MECHANICAL DATA Chapter 6 REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 2/15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 STV6432 1 PIN CONNECTIONS PIN CONNECTIONS Figure 1: Pin Connections on SO28 Package CVBSOUT_VCR CVBSOUT_TV VCCB2 COUT_TV VCCB3 YOUT_TV FINE_GAIN NC GND VCCV DECV CVBSIN_ENC CIN_ENC YIN_ENC 1 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 GNDB CVBSOUT_AUX VCCB1 VOUT_RF AOUT_RF VCC12 LOUT ROUT VCCA GNDA DECA LIN_ENC RIN_ENC GND Table 1: Pin List Description Pin No. Symbol Description 1 2 3 CVBSOUT_VCR CVBSOUT_TV VCCB2 CVBS Output to VCR CVBS Output to TV +5 V Video Output Buffers Supply 4 5 COUT_TV VCCB3 Chroma Output to TV +5 V Video Output Buffers Supply 6 7 8 9 10 YOUT_TV FINE_GAIN NC GND VCCV 11 12 13 14 15 16 17 18 19 20 DECV CVBSIN_ENC CIN_ENC YIN_ENC GND RIN_ENC LIN_ENC DECA GNDA VCCA 21 22 23 ROUT LOUT VCC12 24 25 26 AOUT_RF VOUT_RF VCCB1 27 28 CVBSOUT_AUX GNDB Y Output to TV Y/C/CVBS Output Gain Fine Adjustment Ground +5 V Video Supply Video Decoupling Capacitor CVBS Input from Encoder Chroma Input from Encoder Y Input from Encoder Ground Audio Right Input from Encoder Audio Left Input from Encoder Audio Decoupling Capacitor Audio Ground +9 V Audio Supply or Audio Supply Decoupling Audio Right Output Audio Left Output Audio Supply (+12V or +9V) Audio (L+R) Output to RF Modulator CVBS Video Output to RF Modulator +5 V Video Output Buffers Supply CVBS Output to Auxiliary Video Buffer Ground 3/15 PIN CONNECTIONS STV6432 Figure 2: STV6432 Block Diagram STV 6432 YIN_ENC LPF 14 Clamp 6 dB DIGITAL DECODER YOUT_TV CIN_ENC 13 LPF Clamp 6 dB COUT_TV CVBSOUT_TV 6 4 TV 2 CVBSIN_ENC LPF 12 Clamp 6 dB CVBSOUT_VCR VOUT_RF FINE_GAIN 7 CVBSOUT_AUX 1 VCR 25 27 AUX LIN_ENC 17 6 dB AOUT_RF DAC 16 RIN_ENC 4/15 LOUT 6 dB ROUT RF Mod 22 24 21 STV6432 ELECTRICAL CHARACTERISTICS 2 ELECTRICAL CHARACTERISTICS 2.1 Absolute Maximum Ratings Table 2: Absolute Maximum Ratings Symbol Parameter Value Unit VCC12 Audio Section 13 V VCCA Audio Section 10 V VCCV, VCCB Video Sections 6 V 0, VCCA or VCC12 0, VCCV or VCCB V Voltage at Pin 1 to GND - Audio pins - Video pins VI Toper Maximum ESD voltage allowed. 100 pF capacitor discharged through 1.5 kΩ serial resistor (Human Body Model) Operating Ambient Temperature 0, +70 °C Tstg Storage Temperature 0, +150 °C Value Unit 71 (Max.) °C/W VESD 2.2 ±4 kV Thermal Data Table 3: Thermal Data Symbol Rth(j-a) 2.3 Parameter Junction-ambient Thermal Resistance Supply Section TAMB = 25° C, VCCV = 5 V, VCCB = 5 V, VCCA = 9 V RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 75 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 4: Supply Data Symbol Parameter Test Conditions Min. Typ. Max. Unit VCC12 Audio Operating Supply Voltage Decoupling capacitor on VCCA 11.5 12 12.5 V VCC12 Audio Operating Supply Voltage VCC12 connected to VCCA 8.5 9 9.5 V VCCA Audio Operating Supply Voltage 8.5 9 9.5 V VCCV Video Operating Supply Voltage 4.5 5 5.5 V VCCB Video Buffers Supply Voltage 4.5 5 5.5 V ICC12 Audio Output Supply Current VCC12 = 12 V, No load 5 mA ICCA Audio Output Supply Current VCCA = 9 V, No load 4 mA ICCV Video Supply Current (VCCV) VCCV = 5 V, No load 12 mA ICCB Video Buffers Supply Current (VCCB) VCCB = 5 V, No load 20 mA 5/15 ELECTRICAL CHARACTERISTICS 2.4 STV6432 Audio Section TAMB = 25° C, VCCV = 5 V, VCCB = 5 V, VCCA = 9 V RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 75 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 5: Audio Data Symbol Parameter SVR100 Supply Voltage Rejection SVR1K Supply Voltage Rejection VINDC Input DC Level VINAC Input Signal Amplitude RIN RINmatch Test Conditions VRIPPLE = 500 mVRMS at 120 Hz, DECA filter cap = 47 µF DECA filter cap = 220 µF VRIPPLE = 500 mVRMS at 1 kHz DECA filter cap = 220 µF VCCA = 9 V Typ. 70 80 dB 60 70 80 dB VCCA/2 V 30 Input Resistance Matching Bandwidth Flatness Spread of Gain in Audio Band (Peak-to-Peak) CS Channel Separation between L & R TV outputs Ci Channel Isolation from video inputs VOUT Output DC Level ROUT Output Resistance 50 ±2 -3 dB, VIN = 0.5 VRMS RLOAD = 10 kΩ VIN = 0.5 VRMS 20 Hz to 20 kHz VIN = 0.5 VRMS at 1 kHz on one input, RLOAD = 10 kΩ on both outputs Phase Difference ASN Audio Signal/Noise ratio eNI1 Equivalent RMS Input Voltage Noise GAL 6 dB Gain GMA Gain matching between Left/Right outputs VIN = 0.5 VRMS at 1 kHz Gain = 6 dB THD Total Harmonic Distortion ENC Input with Gain = 6 dB VIN = 0.5 VRMS at 1 kHz Low Pass Filter at 80 kHz VCL Output Clipping Level THD = 0.2% at 1 kHz, Output Load Resistance VIN = 1 VRMS, THD = 0.3%, % dB 90 dB 85 dB VCCA/2 V 120 Ω 3 Degree 80 dB 5 5.5 VRMS kHz 60 PHD ±10 ±0.5 80 Unit kΩ 50 VIN = 1 VPP at 15 kHz on one video input VCCA = 9 V VIN = 1 VRMS at 1 kHz on each input channel VIN = 1 VRMS A weighted at 1 kHz, Gain = 6 dB BW = 20 Hz at 20 kHz unweighted, Gain = 6 dB VIN = 0.5 VRMS, RLOAD = 10 kΩ 6 -1 0.005 µV +6.5 dB 1 dB 0.05 % 2.1 2.3 VRMS 2 2.25 kΩ 1. eNI is the total unweighted output noise in a 20 Hz to 20 kHz bandwidth divided by the gain. 6/15 Max. 2 Input Resistance FRANGE RL Min. STV6432 2.5 ELECTRICAL CHARACTERISTICS Video Section TAMB = 25° C, VCCV = 5 V, VCCB = 5 V, VCCA = 9 V RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 75 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 6: Video Data Symbol Parameter Test Conditions VDCIN DC Input Level ICLAMP Clamping Current Bottom Sync Pulse VIN = VDCIN -400 mV Input Leakage Current VIN = VDCIN +1 V ILEAK Min. Typ. Max. 2 1 V 2 1 Unit mA 10 µA CIN Input Capacitance VIN Maximum Input Signal VCCV = 5 V, Gain = 6 dB 1.5 pF VPP DYN Dynamic Output Signal VCCV = 5 V, Gain = 6 dB 3 VPP Bandwidth on Y and CVBS Outputs Spread of Gain in Video Band (15 kHz to 5 MHz) of Y and CVBS VIN = 1 VPP, at -3 dB, Gain = 6 dB 15 MHz VIN = 1 VPP VCTO Video Crosstalk Output Crosstalk Isolation between Output Channels VIN = 1 VPP at 3.58 MHz on either YIN_ENC or CIN_ENC inputs RLOAD = 150 Ω; Gain = 6dB VCTO1 Video Crosstalk Output Crosstalk Isolation between Output Channels when CVBSIN_ENC is driven VCTO4 Video Crosstalk Output Crosstalk Isolation between Output Channels when CVBSIN_ENC is driven VIN = 1 VPP at 3.58 MHz on CVBSIN_ENC input; Only one CVBS output loaded at 150 Ω; Gain = 6 dB VIN = 1 VPP at 3.58 MHz on CVBSIN_ENC input; All 4 CVBS outputs loaded at 150 Ω; Gain = 6 dB BW Flatness ROUT 2 8 ±0.5 Output Resistance dB 50 dB 50 dB 44 dB 5 10 Ω GV5 5 dB Gain on Y and CVBS Channels VIN = 1 VPP Pin 7 to GND or Logic “0” 4.5 5 5.5 dB GV6 6 dB Gain on Y and CVBS Channels VIN = 1 VPP. Pin 7 is open1 5.5 6 6.5 dB GV7 7 dB Gain on Y and CVBS Channels VIN = 1 VPP; Pin 7 connected to VCCV (5 V) via 22 kΩ or to 3.3 V 6.5 7 7.5 dB GV8 8 dB Gain on Y and CVBS Channels VIN = 1 VPP Pin 7 to VCCV (5 V) 7.5 8 8.5 dB VH5 5 dB Gain: Max. VIN Voltage on Pin 7 Pin 7 to Ground or Logic “0” (IIN < 160 µA) 1.1 V VL6 6 dB Gain: Min. VIN Voltage on Pin 7 Pin 7 is open. VH6 6 dB Gain: Max. VIN Voltage on Pin 7 Pin 7 is open. Pin 7 connected to VCCV (5 V) via 7 dB Gain: Min. VIN Voltage on Pin 7 22 kΩ or to 3.3 V (IIN < 140 µA) VL7 VH7 7 dB Gain: Max. VIN Voltage on Pin 7 Pin 7 connected to VCCV (5 V) via 22 kΩ or to 3.3 V (IIN < 140 µA) VL8 8 dB Gain: Min. VIN Voltage on Pin 7 Pin 7 connected to VCCV (5 V) (IIN < 350 µA) DCOUT DC Output Voltage DPHI Differential Phase DG LNL VSN Differential Gain Luminance Non-Linearity Video S/N Ratio2 1.3 V 1.7 1.9 V V 4.0 4.2 V V Bottom sync pulse VIN = 1 VPP at 3.58 MHz 0.6 1 5 Degree VIN = 1 VPP at 3.58 MHz 1 0.3 5 3 % % dB 65 V 1. When Pin 7 is left open, its voltage is determined by an internal voltage divider consisting of 42 kΩ to VCC (5 V) and 18 kΩ to Ground 2. S/N = 20 log (VOUT Black to White = 0.7 VPP / VNoise (mVRMS) weighted CCIR 567). 7/15 ELECTRICAL CHARACTERISTICS 2.6 STV6432 Chroma Section TAMB = 25° C, VCCV = 5 V, VCCB = 5 V, VCCA = 9 V RGA = 600 Ω, RLOUTA = 10 kΩ, RGV = 75 Ω, RLOUTV = 150 Ω, unless otherwise specified. Table 7: Supply Data Symbol VDCIN Parameter Test Conditions Min. DC Input Level Typ. Max. Unit 3 V 50 kΩ RIN Input Resistance CIN Input Capacitance 2 pF VIN Max Input Signal Gain = 6 dB 1.5 VPP Dynamic Output Signal Gain = 6 dB 3 VPP DYN DCOUT DC Output Voltage CBW Chroma Bandwidth CCTO Chroma Crosstalk Output Crosstalk Isolation between Output Channels CCTO1 Chroma Crosstalk Output Crosstalk Isolation between Output Channels when CVBSIN_ENC is driven CCTO4 Chroma Crosstalk Output Crosstalk Isolation between Output Channels when CVBSIN_ENC is driven ROUT 30 2.2 VIN = 1 VPP at -3 dB Gain = 6 dB VIN = 1 VPP at 3.58 MHz on input YIN_ENC RLOAD = 150 Ω, Gain = 6 dB VIN = 1 VPP at 3.58 MHz on CVBSIN_ENC input; Only one CVBS output loaded at 150 Ω; Gain = 6 dB VIN = 1 VPP at 3.58 MHz on CVBSIN_ENC input; All 4 CVBS outputs loaded at 150 Ω; Gain = 6 dB MHz 50 dB 50 dB 44 dB 5 10 Ω 4.5 5 5.5 dB VIN = 1 VPP, Pin 7 is open1 VIN = 1 VPP; Pin 7 connected to 5.5 6 6.5 dB VCCV (5 V) via 22 kΩ or to 3.3 V 6.5 7 7.5 dB 7.5 8 8.5 dB 20 ns Output Resistance VIN = 1 VPP Pin 7 to GND or Logic “0” GC5 5 dB Gain on Chroma Channels GC6 6 dB Gain on Chroma Channels GC7 7 dB Gain on Chroma Channels GC8 8 dB Gain on Chroma Channels VIN = 1 VPP Pin 7 to VCCV (5 V) Chroma to Luma Delay, Source Y/C VIN = 1 VPP at 3.58 MHz CToYdel V 8 1. When Pin 7 is left open, its voltage is determined by an internal voltage divider consisting of 42 kΩ to VCC (5 V) and 18 kΩ to Ground 8/15 STV6432 3 INPUT/OUTPUT GROUPS INPUT/OUTPUT GROUPS Figure 3: Bottom Clamped Video Inputs (Pins 12 & 14) VCCA 9 V VCCV 5 V VCCV 5 V Figure 6: Audio Inputs (Pins 16 and 17) 2 V + VD 1 kΩ VCCA/2 Protected Pad Protected Pad Figure 4: Average Clamped Video Inputs (Pin 13) Figure 7: Audio Outputs (Pins 21, 22 and 24) VCCV 5 V VCCV 5 V VCC12 12 V IB 50 kΩ 3V 60 Ω Protected Pad Protected Pad Figure 5: Video Outputs (Pins 1, 2, 4, 6, 25 and 27) VCCV 5 V VCCB1,2,3 5 V Figure 8: Fine Gain Control Input (Pin 7) VCCV 5 V V CCV 5 V 42 kΩ IB 18 kΩ Protected Pad Protected Pad 9/15 INPUT/OUTPUT GROUPS STV6432 Figure 9: Video Decoupling (Pin 11) VCCA 5 V Figure 10: Audio Decoupling (Pin 18) VCCA 5 V VCCA 9 V VCCA 9 V 10 kΩ 25 kΩ 40 kΩ 25 kΩ Protected Pad Protected Pad Figure 11: Power Supply Connections VCCB1 26 VCCB2 VCCB3 3 5 VCCV 5V 10 VCCA 5V 20 VCC12 10 V 28 9 19 15 GNDB GND GNDA GND These symbols represent some large diode and Zener-like components used for the ESD protection of the device. They are not supposed to be paths for any current in normal operation mode. 10/15 23 12 V 10p C10 C7 47p 47p R2 C9 100n 100n C6 L1 10µ C5 5dB 6dB 7dB 8dB 47n C16 R4 75 R5 75 R3 75 R6 75 C8 C1 100n C20 100n C21 100n 100n Expected signals on Video Fine Gain pin: 5V for 8dB gain, 22K pull up or 3.3V for 7dB gain, NC for 6dB gain, and GND for 5dB gain. R1 and R2 must be adapted to MPEG DAC expected output load. LPF is an example of reconstruction filter that you can place after a video DAC. In this schematic, Fc=7.3MHz (Fc=1/(2pi*sqrt(LC))), C5, is used to add a little peaking at Fc. 1 CVBSOUT_VCR YIN_ENC CIN_ENC CVBSIN_ENC DECV Vccv GND NC Fine Gain YOUT_TV Vccb3 COUT_TV Vccb2 CVBSOUT_TV STV6432 GND RIN_ENC LIN_ENC DECA GNDA Vcca ROUT LOUT Vcc12 AOUT_RF VOUT_RF Vccb1 CVBSOUT_AUX 15 16 17 18 19 20 21 22 23 24 25 26 27 28 All grounds must be linked under the IC 14 13 12 11 10 9 8 7 6 5 4 3 2 GNDB 10µF 10µF C1, C3, C8, C19, C20 and C22 capacitors must be placed very close to the IC pins. R1 LPF LPF Enc. YOUT Enc. COUT R LPF 5V Enc. CVBSOUT Fine Gain TV Y TV C TV CVBS VCR CVBS C2 12V C12 C15 1µF 1µF C11 10µF C14 10µF C13 10µF 100µF C18 220 R9 220 R8 C22 100n 100n C17 75 R10 75 C3 100n R7 100n C19 DAC ROUT DAC LOUT 10µF C20 Audio R Audio L RF Modulator AUX CVBS 4 C4 5V STV6432 APPLICATION DIAGRAMS APPLICATION DIAGRAMS Figure 12: Application Diagram for 5V/12V Power Supplies 11/15 12/15 R1 LPF 10p C7 47p C6 47p L1 10µ C5 5dB 6dB 7dB 8dB C10 100n 47n C16 C9 100n R2 75 R4 75 R5 R3 75 R6 75 C8 C1 100n C20 100n C21 100n 100n Expected signals on Video Fine Gain pin: 5V for 8dB gain, 22K pull up or 3.3V for 7dB gain, NC for 6dB gain, and GND for 5dB gain. R1 and R2 must be adapted to MPEG DAC expected output load. LPF is an example of reconstruction filter that you can place after a video DAC. In this schematic, Fc=7.3MHz (Fc=1/(2pi*sqrt(LC))), C5, is used to add a little peaking at Fc. 1 CVBSOUT_VCR YIN_ENC CIN_ENC CVBSIN_ENC DECV Vccv GND NC Fine Gain YOUT_TV Vccb3 COUT_TV Vccb2 CVBSOUT_TV STV6432 GND RIN_ENC LIN_ENC DECA GNDA Vcca ROUT LOUT Vcc12 AOUT_RF VOUT_RF Vccb1 CVBSOUT_AUX GNDB 15 16 17 18 19 20 21 22 23 24 25 26 27 28 All grounds must be linked under the IC 14 13 12 11 10 9 8 7 6 5 4 3 2 10µF 10µF C1, C3, C8, C19, C20 and C22 capacitors must be placed very close to the IC pins. Enc. YOUT LPF Enc. COUT R LPF 5V Enc. CVBSOUT Fine Gain TV Y TV C TV CVBS VCR CVBS C2 9V C4 5V C12 C15 1µF 100n C17 1µF 100n C19 C11 10µF C14 10µF C13 10µF 100µF C18 R9 220 R8 220 C22 100n R10 75 C3 100n R7 75 DAC ROUT DAC LOUT Audio R Audio L RF Modulator AUX CVBS APPLICATION DIAGRAMS STV6432 Figure 13: Application Diagram for 5V/9V Power Supplies STV6432 5 PACKAGE MECHANICAL DATA PACKAGE MECHANICAL DATA Figure 14: SO28 28-pin Plastic Small Outline Package (300-mil width) Table 8: SO28 Physical Characteristics mm Dim. Min. A A1 B C D E e H h K L G Typ. Inches Max. Min. 2.65 0.30 0.51 0.32 18.10 7.60 0.0926 0.0040 0.013 0.0091 0.6969 0.2914 10.01 0.25 10.64 0.74 0.41 1.27 0.10 0.394 0.010 0° 0.016 2.35 0.10 0.33 0.23 17.70 7.40 1.27 Typ. Max. 0.1043 0.0118 0.020 0.0125 0.7125 0.2992 0.0500 0.419 0.029 8° 0.050 0.004 13/15 REVISION HISTORY 6 STV6432 REVISION HISTORY Table 9: Summary of Modifications Revision Main Changes Date 1.0 First Issue Addition of Section 4: APPLICATION DIAGRAMS on page 11 and Section 6: REVISION HISTORY on page 14. Reformat of Page Layout. Addition of Video and Audio Crosstalk Values (VCTO1 and CCTO1). Modification of Application Diagrams. March 2001 1.1 1.2 14/15 26 April 2001 29 June 2001 STV6432 REVISION HISTORY Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. 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