STV6411A AUDIO/VIDEO SWITCH MATRIX .. . .. .. .. . .. . .. . I2C BUS CONTROL STANDBY MODE VIDEO SECTION 4 CVBS INPUTS, 3 CVBS OUTPUTS (ONE WITH SELECTABLE CHROMA TRAP FILTER) 4 Y/C INPUTS, 2 Y/C OUTPUTS 6dB GAIN ON ALL CVBS/Y AND C OUTPUTS 1 Y/C ADDER 2 RGB/FB INPUTS, 1 RGB/FB OUTPUT WITH 6dB ADJUSTABLE GAIN VIDEO MUTING ON ALL THE OUTPUTS 2 SLOW BLANKING INPUTS/OUTPUTS SYNC BOTTOM CLAMP ON ALL CVBS/Y AND RGB INPUTS, AVERAGE ON C INPUTS BANDWIDTH : 15MHz CROSSTALK : 60dB Typ. AUDIO SECTION 4 STEREO INPUTS, 3 STEREO OUTPUTS (TWO WITH LEVEL ADJUSTMENT) MONO SOUND OUTPUT STEREO TO MONO CAPABILITY ON BOTH SCARTS AUDIO MUTING ON ALL THE OUTPUTS TQFP64 (10 x 10 x 1.4mm) (Full Plastic Quad Flat Pack) ORDER CODE : STV6411AD DESCRIPTION The STV6411A is a highly integrated I2C bus-controlled audio and video switch matrix, optimized for use in digital set-top box applications. It provides all the audio and video routings required in a full two scart set-top box design. It is also fully pin compatible with STV6410A, the three scart version. December 1998 1/20 STV6411A AOUT_RF YCVBSOUT_VCR NC COUT_VCR NC YCVBSOUT_TV LOUT_TV RCOUT_TV 7 6 5 4 3 2 1 28 53 LIN_TV GNDV1 29 52 YCVBSIN_TV GIN_VCR (see Note 1) 30 51 VREF NC 31 50 YCVBSIN_VCR BIN_VCR (see Note 1) 32 49 LIN_VCR 48 CIN_TV RIN_VCR (see Note 1) CIN_VCR 54 47 27 RIN_VCR VCCA SLB_VCR 46 55 BIN_ENC 26 45 RIN_TV NC LIN_ENC 56 44 25 GIN_ENC GNDA SLB_TV 43 57 RIN_ENC 24 42 ROUT_CINCH NC RCIN_ENC 58 41 23 LIN_STB LOUT_CINCH VCC12 40 59 CIN_ENC 22 39 ROUT_VCR SDA 38 60 RIN_STB 21 YIN_ENC BOUT_TV SCL 37 61 NC 20 36 LOUT_VCR ADD YCVBSIN_ENC 62 35 19 NC GOUT_TV FBIN_ENC 34 ROUT_TV 63 33 64 18 VCC1 17 CVBSIN_STB FBOUT_TV FBIN_VCR (see Note 1) 6411A-01.EPS VOUT_RF GNDV3 10 8 FILTER 11 9 NC VCC3 GNDV2 14 12 NC 15 13 VCC2 16 PIN CONNECTIONS Note 1 : Pins (xx_VCR) identified as xx_AUX in STV6410A. Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 2/20 Symbol RCOUT_TV LOUT_TV YCVBSOUT_TV NC COUT_VCR NC YCVBSOUT_VCR AOUT_RF VOUT_RF GNDV3 FILTER VCCV3 NC GNDV2 NC VCCV2 Description Red/chroma Output, to TV Scart Audio Left Output, to TV Scart Y/CVBS Output, to TV scart Not Connected Chroma Output, to VCR Scart Not Connected Y/CVBS Output, to VCR Scart Audio (L+R) Output to RF Modulator Video (CVBS) Output to RF Modulator Video Switches Ground 3 Chroma Trap Filter Video Switches Supply 3 (8V) Not Connected Video Switches Ground 2 Not Connected Video Switches Supply 2 (8V) 6411A-01.TBL PIN LIST STV6411A PIN LIST (continued) Symbol FBOUT_TV FBIN_VCR (see Note 1) FBIN_ENC ADD SCL SDA VCC12 NC SLB_TV NC SLB_VCR RIN_VCR (see Note 1) GNDV1 GIN_VCR (see Note 1) NC BIN_VCR (see Note 1) VCCV1 CVBSIN_STB NC YCVBSIN_ENC NC YIN_ENC RIN_STB CIN_ENC LIN_STB RCIN_ENC RIN_ENC GIN_ENC LIN_ENC BIN_ENC RIN_VCR CIN_VCR LIN_VCR YCVBSIN_VCR VREF YCVBSIN_TV LIN_TV CIN_TV VCCA RIN_TV GNDA ROUT_CINCH LOUT_CINCH ROUT_VCR BOUT_TV LOUT_VCR GOUT_TV ROUT_TV Description Fast Blanking Output, to TV Scart Fast Blanking Input, from VCR Scart Fast Blanking Input, from Encoder I2C Bus IC Address Programmation I2C Bus Clock I2C Bus Data Slow Blanking Power Supply (12V) Not Connected Slow Blanking Input/Ouput from TV Not Connected Slow Blanking Input/Ouput from VCR Red Input, from VCR Scart Video Switches Ground 1 Green Input, from VCR Scart Not Connected Blue Input, from VCR Scart Video Switches Supply 1 (8V) CVBS Input from STB Not Connected Y/CVBS Input from Encoder Not Connected Y Input, from Encoder Audio Right Input, from STB Chroma Input, from Encoder Audio Left Input, from STB Red/Chroma Input, from Encoder Audio Right Input, from Encoder Green Input, from Encoder Audio Left Input, from Encoder Blue Input, from Encoder Audio Right Input, from VCR Scart Chroma Input, from VCR Scart Audio Left Input, from VCR Y/CVBS Input from VCR Scart Voltage Reference Decoupling Y/CVBS Input, from TV Scart Audio Left Input, from TV Scart Chroma Input, from TV Scart Audio Switches Supply (8V) Audio right input, from TV Scart Audio Switches Ground Audio Right Output, to CINCH Audio Left Output, to CINCH Audio Right Output, to VCR sCart Blue Output, to TV Scart Audio Left Output, to VCR Scart Green Output, to TV Scart Audio Right Output, to TV Scart 6411A-01.TBL Pin Number 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Notes : 1. Pins (xx_VCR) identified as xx_AUX in STV6410A. 2. In application, all unused pins should be left open or high frequency bypassed to ground. 3/20 STV6411A BLOCK DIAGRAM FB SWITCH FBIN_ENC 19 4V 0V FBIN_VCR 18 (see Note 1) BIN_ENC 46 17 FBOUT_TV RGB SWITCH B_ENC B_VCR G_ENC G_VCR R/C_ENC R_VCR MUTE BIN_VCR 32 (see Note 1) GIN_ENC 44 GIN_VCR 30 (see Note 1) RCIN_ENC 42 6dB 61 BOUT_TV 6dB 63 GOUT_TV 6dB RCOUT_TV 9 VOUT_RF C SWITCH R/C_ENC C_ENC C_VCR MUTE RIN_VCR 28 (see Note 1) CIN_ENC 40 6dB Y/CVBS SWITCH CVBS/Y_ENC CVBS/Y_VCR CVBS_STB Y_ENC MUTE CIN_VCR 48 TRAP 11 FILTER 6dB C SWITCH R/C_ENC C_ENC C_TV MUTE CIN_TV 54 CVBSIN_STB 34 6dB Y/CVBS SWITCH CVBS_STB CVBS/Y_ENC CVBS/Y_TV Y_ENC MUTE YCVBSIN_ENC 36 YCVBSIN_TV 52 SLOW BLANK, I/O MONITOR 3 YCVBS/OUT_TV 5 COUT_VCR 7 YCVBSOUT_VCR 25 SLB_TV 27 SLB_VCR 6dB YCVBSIN_VCR 50 I2C BUS DECODER YIN_ENC 38 LIN_ENC 45 LIN_STB 1 41 21 SCL 22 SDA 0/6dB 59 LOUT_CINCH 0/6dB 58 ROUT_CINCH VCR SWITCH LIN_VCR 49 RIN_TV 56 L_ENC L_STB L_TV RIN_STB 39 RIN_ENC 43 RIN_VCR 47 62 LOUT_VCR STEREO/ MONO R_ENC R_STB R_TV MUTE 60 ROUT_VCR TV SWITCH L_ENC L_STB L_VCR R_VCR R_STB R_ENC MUTE -14dB 0/6dB STEREO/ MONO -14dB 0/6dB 4/20 AOUT_RF 2 LOUT_TV 64 ROUT_TV STV6411A Note 1 : Pins (xx_VCR) identified as xx_AUX in STV6410A. 8 6411A-02.EPS LIN_TV 53 STV6411A Symbol Parameter AVCC,VVCC VI Supply Voltage for Audio and Video Sections Voltage at Pin i to GND. Except SDA, SCL at 5.5V Max. VCC12 Supply Voltage for Slow Blanking Sections VSLBK Voltage at slow blanking pins to GND VESD Maximum ESD Voltage allowed (100pF capacitor discharged through 1.5kΩ serial resistor - Human Body Model) Toper Operating Ambient Temperature Tstg Storage Temperature Value Unit 10 V 0, VCC V 13.2 V 0, VCC12 V ±4 kV 0, +70 o C -20, +150 o C 6411A-02.TBL ABSOLUTE MAXIMUM RATINGS Symbol Rth (j-a) Parameter Value Junction-ambient Thermal Resistance Max. Unit o 68 C/W 6411A-03.TBL THERMAL DATA ELECTRICAL CHARACTERISTICS Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit V AVCC Audio Operating Supply Voltage 7.5 8 8.5 VVCC Video Operating Supply Voltage 7.5 8 8.5 V VCC12 Slow Blanking Control Supply Voltage 11.2 12 12.8 V ACTIVE (all channels ON) ICCA Audio Supply Current AVCC = 8V, no input signal 10 15 mA ICCV Video Supply Current (ICCV1 + ICCV2 + ICCV3) VVCC = 8V, no input signal 65 80 mA ICC12 12V Supply Current VCC12 = 12V SlBlk input mode SlBlk output mode, no load 0 2.0 2 3 µA mA ICCAstd Audio Supply Current in stand by mode AVCC = 8V 1.2 mA ICCVstd Video Supply Current in stand by mode (ICCV1 + ICCV2 + ICCV3) VVCC = 8V 9 mA 5/20 6411A-04.TBL STANDBY (all channels OFF) STV6411A ELECTRICAL CHARACTERISTICS (continued) Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit VRIPPLE = 500mVRMS at f = 100Hz, Gain = 0dB, VREF filter cap = 47µF VREF filter cap = 220µF 60 72 82 dB dB Supply Voltage Rejection VRIPPLE = 500mVRMS at f = 1kHz, Gain = 0dB 70 80 dB VINDC Input DC Level AVCC = 8V VCC/2 V VINAC Input signal amplitude AUDIO SECTION SVR1K RIN RINmatch Frange Flatness Supply Voltage Rejection 2 Input Resistance 45 55 ±1 Input resistance matching Bandwith -3dB, 0.5VRMS, RL = 10kΩ, Gain = 0dB Spread of gain in audio band 0.5VRMS, 20Hz to 20kHz, Gain = 0dB VRMS kΩ ±10 50 % kHz 0.5 Channel Separation (from audio inputs) VIN = 0.5VRMS, f = 1kHz, on one input, RL =10kΩ, Gain = 0dB Between L &R of TV outputs 80 70 74 dB Ci Channel Isolation from video inputs VIN = 1 VPP, f = 15kHz, on one input, RL = 10kΩ, Gain = 0dB 70 85 dB VOUT Output DC Level AVCC = 8V VOFF DC Offset change Switching between inputs ROUT Output Resistance 1 V ±15 Equivalent Input Voltage Noise BW = 20Hz, 20kHz, Gain = 0dB 0dB Gain 0.5VRMS, RL = 10kΩ, Gain = 0dB -0.5 Step of Gain -14dB to +6dB 1.75 GMATCH1 Gain matching between different inputs on one output VIN = 0.5VRMS, 1kHz, Gain = 0dB GMATCH2 Gain matching between Left/Right outputs of one input channel VIN = 0.5VRMS, 1kHz, Gain = 0dB Total Harmonic Distorsion 1kHz, LPF @ 80kHz VIN = VOUT = 0.5VRMS VIN = VOUT = 2VRMS mV Ω 60 G0 THD dB VCC/2 eNI GSTEP 90 dB Cs µV 5 +0.5 dB 2.25 dB -0.5 0.5 dB -0.5 0.5 dB 0.05 % % 2 0.002 0.003 VCL Output clipping Level THD = 0.2%, 1kHz 2.1 2.25 VRMS RL Output Load Resistance VIN = 1VRMS, THD = 0.3%, Gain = 0dB 2 2.25 kΩ Mute Suppression VIN = 0.5VRMS, on one input 90 Mute 6/20 dB 6411A-05.TBL SVR100 STV6411A ELECTRICAL CHARACTERISTICS (continued) Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit 2 V 1 2 mA VIDEO SECTION VDCIN DC Input Level Bottom Synch Pulse ICLAMP Clamping current at VDCIN - 400mV Input Leakage Current VIN = VDCIN + 1V ILEAK CIN Input Capacitance VIN Max Input Signal VVCC = 8V 1 1.5 10 µA 2 pF 2 VPP DYN Dynamic Output Signal VVCC = 8V 3 4 VPP BW Bandwidth at -3dB Y/CVBS RGB Y/C mixer (on RF out) VIN = 1VPP VIN = 1VPP VINY = 1VPP, VINC = muted 15 15 10 18 18 15 MHz MHz MHz CT Crosstalk Isolation between Channels VIN = 1VPP at f = 5MHz, on one input 50 60 dB 50 Ω ROUT Output Resistance RLOAD Load Impedance 1 4.7 ∞ GRGB Gain at RGB outputs VIN = 1VPP, gain set to 6dB 5.5 6 6.5 dB Gain matching between R, G, B VIN = 1VPP, gain set to 6dB -0.3 0 0.3 dB Step of Gain 3dB to 6dB 0.75 1 1.25 dB Gain on Y/CVBS channels VIN = 1VPP 5.5 6 6.5 dB Gain matching between Y, CVBS inputs VIN = 1VPP -0.5 0 0.5 dB GRGBM GRGBSTEP GYCVBS GYCVBSM kΩ DCOUT DC Output Voltage Bottom sync pulse 1.1 1.3 V DCOUT RF RF Output Voltage Bottom sync pulse 1.5 1.8 V DPHI Differential Phase VIN = 1VPP, 4.43MHz 0.7 ° Differential Gain VIN = 1VPP, 4.43MHz Mute Mute Suppression VIN = 1VPP at f = 5MHz, on one input -55 IVOUT Output Current VOUT DC @ +1V 1.5 DG 0.4 % dB 2.5 mA 3 V 55 kΩ CHROMA SECTION DC Input Level RIN Input Resistance CIN Input Capacitance VIN Max Input Signal Dyn Dynamic Output Signal 45 DCOUT DC Output Voltage CBW Chroma Bandwidth CIN = 1VPP at - 3dB Crosstalk Isolation between channel VIN = 1VPP at f = 5MHz, on one input CT ROUT Output Resistance GOUTC 2 pF 1.5 2 VPP V 3 3.8 1.9 2.3 V 10 19 MHz 52 dB 50 Ω Gain at OUTC VIN = 1VPP 5.5 6 6.5 GCM Gain matching between C inputs VIN = 1VPP -0.5 0 0.5 Mute Mute Suppression VIN = 1VPP at f = 5MHz, on one input CtoYdel Chroma to luma delay, source Y/C Pin other than RF_OUT 1, VPP @ 5MHz ±4 ±20 ns CtoYdel Chroma to luma delay, source Y/C Pin RF_OUT ±4 ±20 ns 55 dB dB dB 7/20 6411A-06.TBL VDCIN STV6411A ELECTRICAL CHARACTERISTICS (continued) Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit SLOW BLANKING SECTION INPUT (Input mode VCC8 = 8V ±5%) SLBlow Input Low Level Threshold 2.5 3.25 4 V SLBhigh Input High Level Threshold 7.5 8.25 9 V 50 100 µA IIN Input current OUTPUT (Output mode VCC12 = 12V ±5%, VCC8 = 8V ±5%, RLOAD > 10kΩ) SLBLOW Output Low Level (int. TV) 0 0.02 1.5 V SLBMED Output Med Level (ext. 16/9) 5 5.75 6.5 V SLBHIGH Output High Level (ext. 4/3) 10 11 12 V 0.4 0.7 0.9 V 2 10 µA 0.7 0.3 V V FAST BLANKING SECTION INPUT (Input mode VCCV = 8V ±5%) FBlow/high Input Low/High Level Threshold IIN Input current OUTPUT (Output mode VCCV = 8V ±5%, RLOAD > 1kΩ) FBLOW Output Low Level IIN = 1.0mA IIN = 0.2mA FBHIGH Output High Level IOUT = 1.0mA FBDEL Fast blanking to RGB delay At 50% on digital RGB transients, at 2.7VON FB rise transient, at 1.5V on FB fall CLOAD = 10pF max Fast Blanking transitions at FB output Rise Time Fall Time CLOAD = 10pF max between 10% and 90% between 90% and 10% FBTRANS 0 3.6 4 4.4 V 30 ns 30 30 ns ns ADDsel_L Address selection low level ADDsel_H Address selection high level ILEAK 8/20 Leakage Current 0 4 0.2 V VCC (8V) V 10 µA 6411A-07.TBL ADDRESS SELECTION INPUT STV6411A ELECTRICAL CHARACTERISTICS (continued) Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ, unless otherwise specified. Symbol Parameter Test Conditions Min. Typ. Max. Unit 2 I C BUS CHARACTERISTICS SCL VIL Low Level Input Voltage -0.3 1.5 V VIH High Level Input Voltage 3 5.5 V ILI Input Leakage Current fSCL Clock Frequency tR Input Rise Time tF Input Fall Time Cl Input Capacitance 10 µA 100 kHz 1.5V to 3V 1 µs 1.5V to 3V 300 ns 10 pF VIN = 0 to 5.5V -10 0 0 SDA VIL Low Level Input Voltage -0.3 1.5 V VIH High Level Input Voltage 3 5.5 V 10 µA 10 pF ILI Input Leakage Current Cl Input Capacitance tR Input Rise Time 1.5V to 3V 1 µs tF Input Fall Time 1.5V to 3V 300 ns Low level Output Voltage IOL = 3mA 0.4 V tF Output Fall Time 3V to 1.5V CL Load Capacitance VOL VIN = 0 to 5.5V -10 0 250 ns 400 pF TIMING tLOW Clock Low Period 4.7 µs tHIGH Clock High Period 4 µs tSU,DAT Data Set-up Time 250 ns tHD,DAT Data Hold Time 0 tSU,STO Set-up Time from Clock High to Stop 4 µs 4.7 µs 4 µs 4.7 µs Start Set-up Time following a Stop tHD,STA Start Hold Time tSU,STA Start Set-up Time following Clock Low to High Transition ns 9/20 6411A-08.TBL tBUF 340 STV6411A I2C BUS SELECTION Data transfers follow the usual I2C format: after the start condition (S), a 7-bit slave address is sent, followed by an eighth bit which is a data direction bit (W). A 8-bit subadress is sent to select a register, followed by a 8-bit data word to put in it. The IC’s I2C bus decoder permits the automatic incrementation mode in write mode. String Format Write only mode (S : start condition, P : stop condition, A : acknowledge) S SLAVE ADDRESS 0 A SUBADDRESS A DATA A P A DATA A P Read only mode S SLAVE ADDRESS 1 Slave Address Address A6 A5 A4 A3 A2 A1 A0 Value 1 0 0 1 0 1 X Auto Increment Mode S SLAVE ADDRESS 0 A SUBADDRESS A DATA0 A DATA1 A ........ DATAN A P I2C Bus Address Write Address : 1001 01X0 Read Address : 1001 01X1 Address Selection Pin Grounded : X = 0, write address = 94HEX, read address = 95HEX Address Selection Pin to Supply : X = 1, write address = 96HEX, read address = 97HEX Input Signals Summary (Write Mode) Reg. Addr. (HEX) 00 01 DATA D7 DATA D6 DATA D5 TV/Cinch Audio Level Adjustment Identical values should be written to both registers DATA D4 DATA D3 0/6dB TV Gain TV Mono TV Audio Outputs Control 0/6dB Cinch Gain Not used Cinch Audio Outputs Control 02 STV6410A only VCR Mono STV6410A only 03 Not used TV Chroma Mute Y/CVBS & Chroma TV Outputs Control 04 TV RGB Output Control TV FB Output Control STV6410A only TV RF Ouput Control STV6410A only RGB Gain Slow Blanking VCR SCART Not used Not used 07 VCR Output OFF STV6410A only Set to 1 TV Output OFF ENCOD Clamp disable TV Clamp disable ASTB Clamp disable 08 Not used Not used Not used Not used Not used Not used 10/20 DATA D0 TV R/C Ouput Control R/Csub Encoder Clamp VCR Y/CVBS & Chroma Outputs Control 06 Not used data must be put to "0" DATA D1 VCR Audio Outputs Control VCR Chroma Mute STV6410A only 05 DATA D2 Slow Blanking TV SCART VCR Clamp disable RGB Clamp disable RF Mod CINCH Output OFF Output OFF STV6411A I2C BUS SELECTION (continued) Input Signals (Write Mode) Data Byte TV Audio Output Reg. Addr. Description (HEX) 00 Audio Output selection Data Bits 3 Stereo or Mono Mode 1 6dB Extra Gain 1 Level Adjustment 3 d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X 0 1 X X X X X X X X X X X X 0 1 X X X X X X X X X X X X 0 1 X X X X X X X X X X 0 1 X X X X X X X X X X 0 1 X X X X 0 0 0 0 1 1 1 1 X X X X X X 0 0 1 1 0 0 1 1 X X X X X X 0 1 0 1 0 1 0 1 X X X X X X Comments Muted NOT ALLOWED VCR inputs selected ASTB inputs selected NOT ALLOWED Encoder inputs selected NOT ALLOWED NOT ALLOWED 0 = Stereo 1 = Mono 0 = 0dB 1 = +6dB 0dB Adjustment -14dB Adjustment (-2dB/step) Audio Cinch Output Reg. Addr. Description (HEX) 01 Audio Output Selection Level Adjustment 6dB Extra Gain Data Bits d7 d6 d5 d4 d3 d2 d1 d0 3 d7 d6 d5 X X 1 X X 0 1 X X X X X X Comments d2 d1 d0 Used in STV6410A. In STV6411A applications d7d6d5d2d1d0 data should be identical to register 00H. X X X 0 = 0dB X X X 1 = +6dB VCR Audio Outputs Selection Reg. Addr. (HEX) 02 Data Description Bits VCR Audio Output Selection 3 Used in STV6410A. For S T V 6 41 1 A applications, should be s e t t o m ut e v al u e (XX000XXX). 3 d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X X X X X X X X X X X X X X X 0 1 X X X X X X X X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 0 0 0 1 1 1 1 X X X X X X X X X X 0 0 1 1 0 0 1 1 X X X X X X X X X X 0 1 0 1 0 1 0 1 X X X X X X X X X X Comments Muted NOT ALLOWED NOT ALLOWED ASTB inputs selected TV inputs selected Encoder inputs selected NOT ALLOWED NOT ALLOWED 0 = Stereo 1 = Mono Muted NOT ALLOWED NOT ALLOWED NOT ALLOWED NOT ALLOWED NOT ALLOWED NOT ALLOWED NOT ALLOWED 11/20 STV6411A I2C BUS SELECTION (continued) TV Video Output Reg. Addr. (HEX) 03 Data Description R/C TV Output Selection 1 RF output : adder control and chroma subcarrier filter selection 2 Y/CVBS output and chroma signal selection 04 3 Chroma switch muting 1 ENCODER R/Csub Clamp 1 Used in STV6410A. In STV6411A applications should be set to zero (XXXXXX0X). 1 RGB output Gain 2 FB Output 2 RGB ouputs selection 12/20 Bits 2 Comments d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X 0 Red signal selected X X X X X X X 1 Chroma signal selected X X X X X X 0 X CVBS to RF output X X X X X X 1 X Y+C to RF output X X X X X 0 X X Filter not active X X X X X 1 X X Filter active X X 0 0 0 X X X Y/CVBS & chroma muted X X 0 0 1 X X X NOT ALLOWED X X 0 1 0 X X X NOT ALLOWED X X 0 1 1 X X X Y/CVBS _VCR & C_VCR X X 1 0 0 X X X CVBS_ASTB & Chroma muted X X 1 0 1 X X X Y/CVBS_ENC & R/C_ENC X X 1 1 0 X X X Y_ENC & C_ENC X X 1 1 1 X X X NOT ALLOWED X 0 X X X X X X Chroma Output controlled by d5d4d3 from register 03 X 1 X X X X X X Chroma Output forced to mute X X X X X X X 0 Bottom Level Clamp X X X X X X X 1 Average Level Clamp X X X X X X 0 X Bottom Level Clamp X X X X X X 1 X Average Level Clamp X X X X 0 0 X X +6dB gain X X X X 1 1 X X +3dB gain (1dB/Step) X X 0 0 X X X X FB forced to low level X X 0 1 X X X X FB forced to high level X X 1 0 X X X X FB from Encoder X X 1 1 X X X X FB from AUX 0 0 X X X X X X Muted 0 1 X X X X X X RGB_Encoder selected 1 0 X X X X X X RGB_AUX selected 1 1 X X X X X X NOT ALLOWED STV6411A I2C BUS SELECTION (continued) VCR Video Outputs Reg. Addr. (HEX) 05 Data Description VCR Y/CVBS & Chroma Outputs Selection Bits 3 d7 d6 d5 d4 d3 d2 d1 d0 Comments 1 0 0 0 X 0 0 0 Y/CVBS & chroma muted 1 0 0 0 X 0 0 1 NOT ALLOWED 1 0 0 0 X 0 1 0 NOT ALLOWED 1 0 0 0 X 0 1 1 NOT ALLOWED 1 0 0 0 X 1 0 0 CVBS_ASTB & chroma muted 1 0 0 0 X 1 0 1 Y/CVBS_ENC & R/C_ENC 1 0 0 0 X 1 1 0 Y_ENC & C_ENC 1 0 0 0 X 1 1 1 Y/CVBS_TV & C_TV 0 X X X Chroma Output controlled by d2d1d0 from register 05 VCR Chroma Output Muting 1 1 0 0 0 1 X X X 1 X X X Chroma Output forced to mute Used in STV6410A. For STV6411A applications should be set to mute value (X000XXXX). 3 X 0 0 0 X X X X Y/CVBS & chroma muted X 0 0 1 X X X X NOT ALLOWED X 0 1 0 X X X X NOT ALLOWED X 0 1 1 X X X X NOT ALLOWED X 1 0 0 X X X X NOT ALLOWED X 1 0 1 X X X X NOT ALLOWED X 1 1 0 X X X X NOT ALLOWED X 1 1 1 X X X X NOT ALLOWED Slow Blanking Switches Reg. Addr. (HEX) 06 Data Description Slow Blanking TV SCART Slow Blanking VCR SCART Used in STV6410A. For STV6411A applications should be set to input mode (XX00XXXX). Bits 2 2 2 d7 d6 d5 d4 d3 d2 d1 d0 Comments X X 0 0 X X 0 0 Input mode X X 0 0 X X 0 1 Output < 2V X X 0 0 X X 1 0 Output 16/9 format X X 0 0 X X 1 1 Output 4/3 format X X 0 0 0 0 X X Input mode X X 0 0 0 1 X X Output < 2V X X 0 0 1 0 X X Output 16/9 format X X 0 0 1 1 X X Output 4/3 format X X 0 0 X X X X Input mode X X 0 1 X X X X NOT ALLOWED X X 1 0 X X X X NOT ALLOWED X X 1 1 X X X X NOT ALLOWED 13/20 STV6411A I2C BUS SELECTION (continued) Standby Modes Selection Reg. Addr. (HEX) 07 Data Description Bits VCR Clamps Disabling (RGB inputs) 1 VCR Clamps Disabling 1 ASTB Clamps Disabling 1 TV Clamps Disabling 1 Encoder Clamps Disabling 1 TV/RGB Output Disabling 1 VCR Output Disabling 08 1 CINCH Output Disabling 1 RF MOD Output Disabling 1 Comments d7 d6 d5 d4 d3 d2 d1 d0 X X 1 1 X X X X X X X X X X 0 1 Clamp Active Clamp Disabled X 1 X X X X 0 X Clamp Active X 1 X X X X 1 X Clamp Disabled X 1 X X X 0 X X Clamp Active X 1 X X X 1 X X Clamp Disabled X 1 X X 0 X X X Clamp Active X 1 X X 1 X X X Clamp Disabled X 1 X 0 X X X X Clamp Active X 1 X 1 X X X X Clamp Disabled X 1 0 X X X X X Audio & Video Outputs ON X 1 1 X X X X X Audio & Video Outputs OFF 0 1 X X X X X X Audio & Video Outputs ON 1 1 X X X X X X Audio & Video Outputs OFF X X 1 1 X X X X X X X X X X 0 1 CINCH Output ON CINCH Output OFF X 1 X X X X 0 X RF MOD Output ON X 1 X X X X 1 X RF MOD Output OFF Output Signals (Read Mode) Data Byte Reg. Addr. (HEX) Data Description Bits Slow Blanking TV SCART 2 Slow Blanking VCR SCART 2 Comments d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X 0 1 Input < 2V X X X X X X X X X X X X 1 1 0 1 Input 16/9 format Input 4/3 format X X X X X X X X 0 1 1 0 X X X X Input < 2V Input 16/9 format X X X X 1 1 X X Input 4/3 format Power-on Reset - Bus Register Initial Conditions Power on reset is active when the power supply voltage is below (Tbf) volts. Not significant bits (X) are preset to "0" Register Address HEX 00 01 02 03 04 05 06 07 08 14/20 DATA d7 0 0 0 0 0 0 0 0 0 d6 0 0 0 0 0 0 0 0 0 d5 0 0 0 0 0 0 0 0 0 d4 0 0 0 0 0 0 0 0 0 d3 0 0 0 0 0 0 0 0 0 d2 0 0 0 0 0 0 0 0 0 d1 0 0 0 0 0 0 0 0 0 d0 0 0 0 0 0 0 0 0 0 STV6411A INPUT/OUTPUT GROUPS Figure 1 : Bottom Clamped Video Inputs (Pins 30, 32 ,34, 36, 38, 44, 46, 50, 52) VCC 8V Figure 2 : Average Clamped Video Inputs (Pins 40, 48, 54) VCC 8V VCC 8V VCC 8V 2V + VD IB 25kW 25kW 3V 15kW 6411A-03.EPS tri Protected Pad Figure 3 : Audio Inputs (5 Stereo) (Pins 39-41, 47-49, 53-56) 6411A-04.EPS tri Protected Pad Figure 4 : Audio Outputs (4 Stereo +1) (Pins 58, 59, 60-62, 8) VCC 8V VCC 8V 50kW VCC/2 60W Protected Pad Figure 5 : Trap Filter (Pin 11) Protected Pad 6411A-06.EPS 6411A-05.EPS IB Figure 6 : Video Outputs (Pins 61, 63, 1, 3, 5, 7, 9) VCC 8V VCC 8V VCC 8V VCC 8V 50W 100W 5kW 5kW Protected Pad 6411A-08.EPS Protected Pad 6411A-07.EPS 1kW 15/20 STV6411A INPUT/OUTPUT GROUPS (continued) Figure 7 : VREF External Capacitor (Pin 51) Figure 8 : Slow Blanking (Pins 25, 27) VCC 12V VCC 8V VCC 8V 40kW VCC 12V 1kW IB 25kW IB 80kW 40kW Figure 9 : Input Fast Blanking (Pins 18, 19) 80kW Protected Pad 6411A-10.EPS 6411A-09.EPS Protected Pad Figure 10 : Output Fast Blanking (Pin 17)) 1kW VCC 8V VCC 8V 50W Protected Pad Figure 11 : I2C Bus (ADD) (Pin 20) Protected Pad Figure 12 : I2C Bus (SCL) (Pin 21) VCC 8V VCC 8V 16/20 6411A-13.EPS Protected Pad 6411A-14.EPS 10kW 10kW Protected Pad 6411A-12.EPS 6411A-11.EPS 25kW STV6411A INPUT/OUTPUT GROUPS (continued) Figure 13 : I2C Bus (SDA) (Pin 22) VCC 8V Acknowledge 6411A-15.EPS 10kW Protected Pad APPLICATION DIAGRAM R SCART1 TV RF MOD R/C C G B FAST BLANK CVBS/Y AUDIO L AUDIO R CVBS/Y AUDIO L AUDIO R SLOW BLANK CVBS AUDIO L+R STV6411A R, G, B, FB SWITCHES CVBS/Y SWITCHES CHROMA SWITCHES AUDIO SWITCHES SLOW BLANK, I/O CONTROL R/C G B FAST BLANK CVBS/Y C AUDIO L AUDIO R Y CVBS AUDIO L AUDIO R R G B FAST BLANK CVBS/Y AUDIO L AUDIO R C CVBS/Y C AUDIO L AUDIO R SLOW BLANK CINCH OUTPUT ENCODER ANALOG STB SCART2 VCR 6411A-16.EPS AUDIO L AUDIO R 17/20 STV6411A APPLICATION NOTE 2 - Video Part 2.a - Inputs Video inputs need to be AC coupled. But only some small capacitor values are requested thanks to the internal clamps provided by these devices. Usually some 100nF HF capacitors (47nF to 220nF) are enough to provide good performances on Y, CVBS,RGB and C inputs. Chrominance inputs : - average clamp - that means that the DC is measured as the average value of the input signal and set to an internal reference (close to 3V). The dynamic allowed is more than 1.5V. RGB, Y, CVBS inputs : - bottom sync top clamp that means that the DC level is measured at the lowest value of the input signal and set to an internal reference (close to 2V). The dynamic allowed is more than 1.5V. 1 - Audio Part 1.a - Inputs The audio inputs are designed to follow sources up to (at least) 2VRMS (that is around 6VPP) with an expected DC level of VCC/2 (4V typ.). That’s why the device is providing this DC polarization. That means that in most of the cases the inputs are AC coupled via chemical capacitors. The recommended values are 1µF, 2.2µF or 4.7µF (internal polar. is made via a 50kΩ resistor). I want to point out that the internal polarization is filtered by an external capacitor (on Pin called ‘VREF’). This capacitor contribute to good performance of the device. Its value should be 47µF or more (coupled with an 47nF HF cap. for internal video references). Figure 14 : Audio Inputs 4.7m F 220W L/R Audio Figure 16 : Video Inputs Audio In NB: In some particular cases (loopback from outputs to inputs) the AC coupling capacitor can be removed... but some small offsets in the audio chain can cause some noise while switching from one input to another. 18/20 75W STV6411A Video Out 75W Video 470W (4.7kW ) STV6411A 1kW 6411A-20.EPS L/R Audio 6411A-18.EPS STV6411A Video In Figure 17 : Video (and Fast Blanking) Outputs Figure 15 : Audio Outputs Audio Out Y/C/CVBS/RGB 2.b - Outputs On these devices the video outputs are NOT ABLE to drive 150Ω. That means that external buffers (one simple NPN-Transistor per output) are needed. To reduce the external components, the output DC level have been chosen to allow a direct drive of the base of the output follower (NPN). The emitters of the NPNs will be polarized to ground via 1kΩ resistors (more or less) and will drive the outputs through some 75Ω resistors. Do not forget to bufferize your favourite UHF modulator video input... Chrominance outputs have a DC of 2.3V (it is an average value) and Luminance type output have a DC of 1.3V (it is a bottom value). 1.b - Outputs Audio output buffers are able to provide more than 2.1VRMS (around 6VPP) on a typical load of 10kΩ (in fact a 2kΩ load is acceptable). The DC level is once more VCC/2 for best dynamic performance. Usually some AC coupling capacitors are used at the outputs. To drive some typical 10kΩ loads, it is normal to use capacitors with value 5 to 10 times the value of the input capacitors. That gives a value between 4.7µF and 47µF. Moreover it can be a good idea to insert resistors (220Ω or 470Ω) in the audio outputs. That will provide a protection for output stages. No external drivers or buffers are needed in typical use of the device. 4.7m F 100nF 6411A-19.EPS STV6411A 6411A-17.EPS 220W 12kW STV6411A APPLICATION NOTE (continued) 2.c - Fast Blanking Fast Blanking signal is used to make an equipment consider its RGB inputs for full-screen display or fast insertion (OSD, etc.). The output of such signal is exactly managed in the same way as RGB (that is important for levels and delays). The input is DC coupled (insert a few hundreds ohms resistors for external input). 2.d - Slow Blanking Slow Blanking signal is used to make an equipment consider an external input (e.g. CVBS and SOUND). The input/output of such signal is very simple, DC coupled (insert a few hundreds ohms resistors for external I/O). Notice that this function is requesting a 12V power supply (on Pin VCC12). This pin can be left open (not pulled down) if this function is not used. 3 - I2C Bus 3.a - Address You can choose the address of the device by setting the Pin ADD to ground or to VDD. The former selects 94h and the latter selects 96h. These values correspond to the writeable (or control) registers. Change the lowest bits to ‘1’ (that gives 95h and 97h) to read the readable register of the device. One device will answer (acknowledge) to its both addresses 94h and 95h or 96h and 97h. 3.b - Write Mode This mode is used to control the device, to select switches positions, gains, etc. Send a start condition, the address of the device, the address of the register (its number), and the data to put in it. At this point you can send a stop or send the data of the following registers (that is what we call auto-increment). 3.c - Read Mode This mode is used to read some data such as slow-blanking input signals. Send a start condition, the address of the device (+1) and then send one byte clock to read the unique data register. N.B.: Do not forget your favourite ESD protections for I/O signals of plugs. 19/20 STV6411A PACKAGE MECHANICAL DATA 64 PINS - FULL PLASTIC QUAD FLAT PACK (TQFP) A A2 e 64 A1 49 48 16 33 E3 E1 E B 1 0,10 mm .004 inch SEATING PLANE c Dimensions A A1 A2 B C D D1 D3 e E E1 E3 L L1 K Min. 0.05 1.35 0.17 0.09 0.45 Millimeters Typ. 1.40 0.22 12.00 10.00 7.50 0.50 12.00 10.00 7.50 0.60 1.00 Max. 1.60 0.15 1.45 0.27 0.20 Min. 0.002 0.053 0.007 0.004 1 0.75 0.018 PM-5W.EPS K 0,25 mm .010 inch GAGE PLANE Inches Typ. 0.055 0.009 0.472 0.394 0.295 0.0197 0.472 0.394 0.295 0.024 0.039 Max. 0.063 0.006 0.057 0.011 0.008 0.030 0o (Min.), 7o (Max.) Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 1998 STMicroelectronics - All Rights Reserved Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. 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