TDA7294S 100V - 100W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY VERY HIGH OPERATING VOLTAGE RANGE (±45V) DMOS POWER STAGE HIGH OUTPUT POWER (100W @ THD = 10%, RL = 8Ω, VS = ±40V MUSIC POWER) MUTING/STAND-BY FUNCTIONS NO SWITCH ON/OFF NOISE VERY LOW DISTORTION VERY LOW NOISE SHORT CIRCUIT PROTECTION THERMAL SHUTDOWN CLIP DETECTOR MODULARITY (MORE DEVICES CAN BE EASILY CONNECTED IN PARALLEL TO DRIVE VERY LOW IMPEDANCES) MULTIPOWER BCD TECHNOLOGY Multiwatt15 ORDERING NUMBER: TDA7294SV class TV). Thanks to the wide voltage range and to the high out current capability it is able to supply the highest power into both 4Ω and 8Ω loads. The built in muting function with turn on delay simplifies the remote operation avoiding switching on-off noises. Parallel mode is made possible by connecting more device through of pin11. High output power can be delivered to very low impedance loads, so optimizing the thermal dissipation of the system. DESCRIPTION The TDA7294S is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications (Home Stereo, self powered loudspeakers, TopFigure 1: Typical Application and Test Circuit +Vs C7 100nF C6 1000µF R3 22K C2 22µF BUFFER DRIVER +Vs R2 680Ω C1 470nF IN- 2 IN+ 3 7 +PWVs 11 13 - R5 10K MUTE STBY BOOT LOADER C5 22µF 6 10 5 THERMAL SHUTDOWN MUTE VSTBY 12 4 (**) VMUTE OUT + R1 22K SGND 14 9 S/C PROTECTION (*) BOOTSTRAP CLIP DET VCLIP STBY R4 22K C3 10µF C4 10µF 1 8 15 STBY-GND -Vs -PWVs C9 100nF C8 1000µF D97AU805A (*) see Application note (**) for SLAVE function June 2000 -Vs 1/13 TDA7294S PIN CONNECTION (Top view) 15 -VS (POWER) 14 OUT 13 +VS (POWER) 12 BOOTSTRAP LOADER 11 BUFFER DRIVER 10 MUTE 9 STAND-BY 8 -VS (SIGNAL) 7 +VS (SIGNAL) 6 BOOTSTRAP 5 CLIP AND SHORT CIRCUIT DETECTOR 4 SIGNAL GROUND 3 NON INVERTING INPUT 2 INVERTING INPUT 1 STAND-BY GND TAB CONNECTED TO PIN 8 D97AU806 QUICK REFERENCE DATA Symbol VS GLOOP Ptot SVR Parameter Test Conditions Min. Typ. ±12 Supply Voltage Operating Closed Loop Gain 26 Output Power Max. Unit ± 45 V 40 dB VS = ±40V; RL = 8Ω; THD = 10% 100 W VS = ±30V; RL = 4Ω; THD = 10% 100 W 75 dB Supply Voltage Rejection ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit ±50 V VS Supply Voltage (No Signal) V1 VSTAND-BY GND Voltage Referred to -VS (pin 8) 90 V V2 Input Voltage (inverting) Referred to -VS 90 V Maximum Differential Inputs ±30 V V3 Input Voltage (non inverting) Referred to -VS 90 V V4 Signal GND Voltage Referred to -VS 90 V V5 Clip Detector Voltage Referred to -VS 100 V V6 Bootstrap Voltage Referred to -VS 100 V V2 - V3 V9 Stand-by Voltage Referred to -VS 100 V V10 Mute Voltage Referred to -VS 100 V V11 Buffer Voltage Referred to -VS 100 V V12 Bootstrap Loader Voltage Referred to -VS 90 V IO Output Peak Current 10 A Ptot Power Dissipation Tcase = 70°C 50 W Top Operating Ambient Temperature Range 0 to 70 °C 150 °C Tstg, Tj Storage and Junction Temperature THERMAL DATA Symbol Rth j-case 2/13 Description Thermal Resistance Junction-case Typ Max Unit 1 1.5 °C/W TDA7294S ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = ±35V, RL = 8Ω, GV = 30dB; Rg = 50 Ω; Tamb = 25°C, f = 1 kHz; unless otherwise specified). Symbol Parameter Test Condition Min. Typ. Max. Unit ±45 V 60 mA VS Operating Supply Range ±12 Iq Quiescent Current 20 Ib Input Bias Current 500 nA VOS Input Offset Voltage ±10 mV IOS Input Offset Current ±100 nA PO RMS Continuous Output Power d d = 0.5%: VS = ± 35V, R L = 8Ω VS = ± 32V, R L = 6Ω VS = ± 28V, R L = 4Ω Music Power (RMS) (*) ∆t = 1s d = 10%; RL = 8Ω ; VS = ±40V RL = 6Ω ; VS = ±35V RL = 4Ω; VS = ±30V (***) Total Harmonic Distortion (**) PO = 5W; f = 1kHz PO = 0.1 to 20W; f = 20Hz to 20kHz 60 60 60 Overcurrent Protection Threshold SR Slew Rate GV Open Loop Voltage Gain GV Closed Loop Voltage Gain eN Total Input Noise fL, fH Ri SVR TS Frequency Response (-3dB) W W W 100 100 100 W W W 0.1 % % 0.1 % % 0.01 6.5 7 A 10 V/µs 80 24 A = curve f = 20Hz to 20kHz PO = 1W Input Resistance Supply Voltage Rejection 70 70 70 0.005 VS = ±28V, R L = 4Ω: PO = 5W; f = 1kHz PO = 0.1 to 20W; f = 20Hz to 20kHz IMAX 30 dB 30 40 dB 1 2 5 µV µV 20Hz to 20kHz 100 f = 100Hz; Vripple = 0.5Vrms 60 Thermal Shutdown kΩ 75 dB 150 °C STAND-BY FUNCTION (Ref: -VS or GND) VST on Stand-by on Threshold VST off Stand-by off Threshold 3.5 Stand-by Attenuation 70 ATTst-by Iq st-by 1.5 Quiescent Current @ Stand-by V V 90 1 dB 3 mA 1.5 V MUTE FUNCTION (Ref: -VS or GND) VMon Mute on Threshold VMoff Mute off Threshold 3.5 Mute Attenuation 60 ATTmute V 80 dB Note (*): MUSIC POWER CONCEPT MUSIC POWER is the maximal power which the amplifier is capable of producing across the rated load resistance (regardless of non linearity) 1 sec after the application of a sinusoidal input signal of frequency 1KHz. Note (**): Tested with optimized Application Board (see fig. 2) Note (***): Limited by the max. allowable current. 3/13 TDA7294S Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1) 4/13 TDA7294S APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1) The recommended values of the external components are those shown on the application circuit of Figure 1. Different values can be used; the following table can help the designer. LARGER THAN SUGGESTED SMALLER THAN SUGGESTED INCREASE INPUT IMPEDANCE DECREASE INPUT IMPEDANCE COMPONENTS SUGGESTED VALUE PURPOSE R1 (*) 22k INPUT RESISTANCE R2 680Ω R3 (*) 22k R4 22k ST-BY TIME CONSTANT LARGER ST-BY ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE R5 10k MUTE TIME CONSTANT LARGER MUTE ON/OFF TIME SMALLER MUTE ON/OFF TIME C1 0.47µF INPUT DC DECOUPLING HIGHER LOW FREQUENCY CUTOFF C2 22µF FEEDBACK DC DECOUPLING HIGHER LOW FREQUENCY CUTOFF C3 10µF MUTE TIME CONSTANT LARGER MUTE ON/OFF TIME SMALLER MUTE ON/OFF TIME C4 10µF ST-BY TIME CONSTANT LARGER ST-BY ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE C5 22µFXN (***) BOOTSTR APPING C6, C8 1000µF SUPPLY VOLTAGE BYPASS C7, C9 0.1µF SUPPLY VOLTAGE BYPASS CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN SET TO 30dB (**) INCREASE OF GAIN DECREASE OF GAIN SIGNAL DEGRADATION AT LOW FREQUENCY DANGER OF OSCILLATION (*) R1 = R3 for pop optimization (**) Closed Loop Gain has to be ≥ 26dB (***) Multiply this value for the number of modular part connected Slave function: pin 4 (Ref to pin 8 -VS) -VS +3V -VS +1V -VS MASTER UNDEFINED Note: If in the application, the speakers are connected via long wires, it is a good rule to add between the output and GND, a Boucherot Cell, in order to avoid dangerous spurious oscillations when the speakers terminal are shorted. The suggested Boucherot Resistor is 3.9Ω/2W and the capacitor is 1µF. SLAVE D98AU821 5/13 TDA7294S INTRODUCTION In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the performance obtained from the best discrete designs. The task of realizing this linear integrated circuit in conventional bipolar technology is made extremely difficult by the occurence of 2nd breakdown phoenomenon. It limits the safe operating area (SOA) of the power devices, and, as a consequence, the maximum attainable output power, especially in presence of highly reactive loads. Moreover, full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated protection circuits. To overcome these substantial drawbacks, the use of power MOS devices, which are immune from secondary breakdown is highly desirable. The device described has therefore been developed in a mixed bipolar-MOS high voltage technology called BCDII 100. 1) Output Stage The main design task in developping a power operational amplifier, independently of the technology used, is that of realization of the output stage. The solution shown as a principle shematic by Fig3 represents the DMOS unity - gain output buffer of the TDA7294S. This large-signal, high-power buffer must be capable of handling extremely high current and voltage levels while maintaining acceptably low harmonic distortion and good behaviour over frequency response; moreover, an accurate control of quiescent current is required. A local linearizing feedback, provided by differential amplifier A, is used to fullfil the above requirements, allowing a simple and effective quiescent current setting. Proper biasing of the power output transistors alone is however not enough to guarantee the absence of crossover distortion. While a linearization of the DC transfer characteristic of the stage is obtained, the dynamic behaviour of the system must be taken into account. A significant aid in keeping the distortion contributed by the final stage as low as possible is provided by the compensation scheme, which exploits the direct connection of the Miller capacitor at the amplifier’s output to introduce a local AC feedback path enclosing the output stage itself. 2) Protections In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overload conditions. Due to the absence of the 2nd breakdown phenomenon, the SOA of the power DMOS transistors is delimited only by a maximum dissipation curve dependent on the duration of the applied stimulus. In order to fully exploit the capabilities of the power transistors, the protection scheme implemented in this device combines a conventional SOA protection circuit with a novel local temperature sensing technique which ” dynamically” controls the maximum dissipation. Figure 3: Principle Schematic of a DMOS unity-gain buffer. 6/13 TDA7294S Figure 4: Turn ON/OFF Suggested Sequence +Vs (V) +40 -40 -Vs VIN (mV) V ST-BY PIN #9 (V) 5V 5V VMUTE PIN #10 (V) IQ (mA) V OUT (V) OFF ST-BY PLAY MUTE ST-BY OFF MUTE D98AU817 In addition to the overload protection described above, the device features a thermal shutdown circuit which initially puts the device into a muting state (@ Tj = 150 oC) and then into stand-by (@ Tj = 160 oC). Full protection against electrostatic discharges on every pin is included. Figure 5: Single Signal ST-BY/MUTE Control Circuit MUTE MUTE/ ST-BY STBY 20K 10K 30K 1N4148 mute functions, independently driven by two CMOS logic compatible input pins. The circuits dedicated to the switching on and off of the amplifier have been carefully optimized to avoid any kind of uncontrolled audible transient at the output. The sequence that we recommend during the ON/OFF transients is shown by Figure 4. The application of figure 5 shows the possibility of using only one command for both st-by and mute functions. On both the pins, the maximum applicable range corresponds to the operating supply voltage. 10µF 10µF D93AU014 3) Other Features The device is provided with both stand-by and APPLICATION INFORMATION HIGH-EFFICIENCY Constraints of implementing high power solutions are the power dissipation and the size of the power supply. These are both due to the low efficiency of conventional AB class amplifier approaches. Here below (figure 6) is described a circuit proposal for a high efficiency amplifier which can be adopted for both HI-FI and CAR-RADIO applications. 7/13 TDA7294S The TDA7294S is a monolithic MOS power amplifier which can be operated at 90V supply voltage (100V with no signal applied) while delivering output currents up to ±6.5 A. This allows the use of this device as a very high power amplifier (up to 100W as peak power with T.H.D.=10 % and Rl = 4 Ohm); the only drawback is the power dissipation, hardly manageable in the above power range. The typical junction-to-case thermal resistance of the TDA7294S is 1 oC/W (max= 1.5 oC/W). To avoid that, in worst case conditions, the chip temperature exceedes 150 oC, the thermal resistance of the heatsink must be 0.038 oC/W (@ max ambient temperature of 50 oC). As the above value is pratically unreachable; a high efficiency system is needed in those cases where the continuous RMS output power is higher than 50-60 W. The TDA7294S was designed to work also in higher efficiency way. For this reason there are four power supply pins: two intended for the signal part and two for the power part. T1 and T2 are two power transistors that only operate when the output power reaches a certain threshold (e.g. 20 W). If the output power increases, these transistors are switched on during the portion of the signal where more output voltage swing is needed, thus ”bootstrapping” the power supply pins (#13 and #15). The current generators formed by T4, T7, zener diodes Z1, Z2 and resistors R7,R8 define the minimum drop across the power MOS transistors of the TDA7294S. L1, L2, L3 and the snubbers C9, R1 and C10, R2 stabilize the loops formed by the ”bootstrap” circuits and the output stage of the TDA7294S. By considering again a maximum average output power (music signal) of 20W, in case of the high efficiency application, the thermal resistance value needed from the heatsink is o 2.2 C/W (Vs =±45V and Rl= 8Ohm). All components (TDA7294S and power transistors T1 and T2) can be placed on a 1.5oC/W heatsink, with the power darlingtons electrically insulated from the heatsink. Since the total power dissipation is less than that of a usual class AB amplifier, additional cost savings can be obtained while optimizing the power supply, even with a high heatsink . BRIDGE APPLICATION Another application suggestion is the BRIDGE configuration, where two TDA7294S are used. In this application, the value of the load must not be lower than 8Ohm for dissipation and current capability reasons. A suitable field of application includes HI-FI/TV subwoofers realizations. 8/13 The main advantages offered by this solution are: - High power performances with limited supply voltage level. - Considerably high output power even with high load values (i.e. 16 Ohm). With Rl= 8 Ohm, Vs = ±25V the maximum output power obtainable is 150 W, while with Rl=16 Ohm, Vs = ±40V the maximum Pout is 200W (Music Power). APPLICATION NOTE: (ref. fig. 7) Modular Application (more Devices in Parallel) The use of the modular application lets very high power be delivered to very low impedance loads. The modular application implies one device to act as a master and the others as slaves. The slave power stages are driven by the master device and work in parallel all together, while the input and the gain stages of the slave device are disabled, the figure below shows the connections required to configure two devices to work together. The master chip connections are the same as the normal single ones. The outputs can be connected together without the need of any ballast resistance. The slave SGND pin must be tied to the negative supply. The slave ST-BY pin must be connected to ST-BY pin. The bootstrap lines must be connected together and the bootstrap capacitor must be increased: for N devices the boostrap capacitor must be 22µF times N. The slave Mute and IN-pins must be grounded. THE BOOTSTRAP CAPACITOR For compatibility purpose with the previous devices of the family, the boostrap capacitor can be connected both between the bootstrap pin (6) and the output pin (14) or between the boostrap pin (6) and the bootstrap loader pin (12). When the bootcap is connected between pin 6 and 14, the maximum supply voltage in presence of output signal is limited to 80V, due the bootstrap capacitor overvoltage. When the bootcap is connected between pins 6 and 12 the maximum supply voltage extend to the full voltage that the technology can stand: 100V. This is accomplished by the clamp introduced at the bootstrap loader pin (12): this pin follows the output voltage up to 100V and remains clamped at 100V. This feature lets the output voltage swing up to a gate-source voltage from the positive supply (VS -3 to 6V) TDA7294S Figure 6: High Efficiency Application Circuit +50V D6 1N4001 T1 BDX53A T3 BC394 R4 270 D1 BYW98100 +25V T4 BC393 R17 270 L1 1µH D3 1N4148 C1 1000µF 63V C3 100nF C5 1000µF 35V C7 100nF R22 10K IN C9 330nF C2 1000µF 63V 13 2 C4 100nF C6 1000µF 35V R23 10K C8 100nF R2 2 C10 330nF D5 1N4148 6 R13 20K 1 R15 10K 10 C14 10µF D2 BYW98100 -25V D7 1N4001 R6 20K C11 22µF R7 3.3K L3 5µH C16 1.8nF OUT 14 C13 10µF R14 30K R3 680 R16 13K 9 ST-BY R21 20K 7 4 PLAY GND 3 R12 13K R1 2 T5 BC393 Z1 3.9V C12 330nF R20 20K R5 270 R18 270 C15 22µF R8 3.3K 12 8 C17 1.8nF P ot 15 Z2 3.9V L2 1µH D4 1N4148 T7 BC394 R19 270 T2 BDX54A T6 BC393 R9 270 T8 BC394 R10 270 R11 20K -50V D97AU807C Figure 6a: PCB and Component Layout of the fig. 6 9/13 TDA7294S Figure 6b: PCB - Solder Side of the fig. 6. Figure 7: Modular Application Circuit +Vs C7 100nF C6 1000µF R3 22K MASTER BUFFER DRIVER +Vs C2 22µF R2 680Ω C1 470nF IN- 2 IN+ 3 7 +PWVs 11 13 - R5 10K SGND 4 MUTE 10 9 R4 22K 12 BOOT LOADER 6 MUTE STBY VSTBY OUT + R1 22K VMUTE 14 THERMAL SHUTDOWN STBY S/C PROTECTION 1 8 15 STBY-GND -Vs -PWVs 5 C10 100nF R7 2Ω C5 47µF BOOTSTRAP CLIP DET C4 10µF C9 100nF C3 10µF C8 1000µF -Vs +Vs C7 100nF C6 1000µF BUFFER DRIVER +Vs IN- 2 IN+ 3 7 +PWVs 11 13 - SLAVE SGND 4 MUTE 10 9 OUT 12 BOOT LOADER 6 MUTE THERMAL SHUTDOWN STBY STBY S/C PROTECTION 1 8 15 STBY-GND -Vs -PWVs C9 100nF C8 1000µF -Vs 10/13 14 + 5 BOOTSTRAP D97AU808C TDA7294S Figure 8a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE) Figure 8b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE) 11/13 TDA7294S DIM. mm MIN. TYP. A B C D inch MAX. 5 TYP. 2.65 1.6 OUTLINE AND MECHANICAL DATA 0.039 0.49 0.66 G G1 1.02 17.53 H1 H2 19.6 L L1 21.9 21.7 22.2 22.1 22.5 22.5 L2 L3 L4 17.65 17.25 10.3 17.5 10.7 L7 M 2.65 4.25 4.55 M1 S 4.63 1.9 S1 Dia1 1.9 3.65 1.27 17.78 MAX. 0.197 0.104 0.063 1 E F 12/13 MIN. 0.55 0.75 0.019 0.026 1.52 18.03 0.040 0.690 0.022 0.030 0.050 0.700 0.060 0.710 0.862 0.854 0.874 0.870 0.886 0.886 18.1 17.75 10.9 0.695 0.679 0.406 0.689 0.421 0.713 0.699 0.429 2.9 4.85 0.104 0.167 0.179 0.114 0.191 5.53 2.6 0.182 0.075 2.6 3.85 0.075 0.144 0.772 20.2 5.08 0.795 0.200 0.218 0.102 0.102 0.152 Multiwatt15 V TDA7294S Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 13/13