TS652 DIFFERENTIAL VARIABLE GAIN AMPLIFIER ■ LOW NOISE : 4.6nV/√Hz ■ LOW DISTORTION ■ HIGH SLEW RATE : 90V/µs ■ WIDE BANDWIDTH : 52MHz @ -3dB & 18dB gain ■ GAIN PROGRAMMABLE from -9dB to +30dB with 3dB STEPS ■ POWER DOWN FUNCTION D SO-14 (Plastic Micropackage) DESCRIPTION The TS652 is a differential digitally controled variable gain amplifier featuring a high slew rate of 90V/µs, a large bandwidth, a very low distortion and a very low current and voltage noise. PIN CONNECTIONS (top view) The gain can be set from -9dB to +30dB through a 4bit digital word, with 3dB steps. The gain monotonicity is guaranteed by design. +Vcc1 1 14 +Vcc2 This device is particularly intended for applications such as preamplification in telecommunication systems using multiple carriers. Input 1 2 13 Output 1 Input 2 3 12 Output 2 APPLICATION GC1 4 Assymetric Digital Subscriber Line (ADSL). GC2 5 ORDER CODE Package Part Number GC3 6 Temperature Range D TS652ID -40, +85°C • GC4 7 11 Power Down Gain Control Logic Decoder ■ Preamplifier and automatic gain control for 10 -Vcc 9 AGND 8 DGND D = Small Outline Package (SO) - also available in Tape & Reel (DT) May 2000 1/9 TS652 ABSOLUTE MAXIMUM RATINGS Symbol VCC Vi Parameter Supply voltage 1) Input Voltage 2) Value Unit 14 V 0 to 14 V Toper Operating Free Air Temperature Range TS652ID -40 to + 85 °C Tstd Storage Temperature -65 to +150 °C Tj Rthjc Maximum Junction Temperature 150 °C Thermal Resistance Junction to Case 15 °C/W Output Short Circuit Duration Infinite 1. All voltages values are with respect to network terminal. 2. The magnitude of input and output voltages must never exceed VCC +0.3V. OPERATING CONDITIONS Symbol Parameter VCC Supply Voltage Vicm Common Mode Input Voltage Value Unit 5 to 12 V + VCC/2 V 2/9 TS652 ELECTRICAL CHARACTERISTICS. VCC = ±6Volts, Tamb = 25°C (unless otherwise specified). Symbol Parameter Test Conditio n Min. Typ. Max Unit DC PERFORMANCE Vi Voltage on the Input Pin ICC Total Supply Current Iccpdw ∆V OFFSET SVR 0 No load, Vout = 0 28 Power Down Total Consumption Power Down Mode Differential Input Offset Voltage Vin = 0, AV = 30dB Supply Voltage Rejection Ratio AV = 0dB V 50 mA 150 µA 6 mV 80 dB AC PERFORMANCE Zin Input Impedance Zout Power Down Output Impedance Power Down Mode High Level Output Voltage RL = 500Ω RL connected to GND VOH VOL AV PAV Avstep Avmin Low Level Output Voltage RL connected to GND 100kΩ//5pF 150kΩ//5pF 4 4.5 RL = 500Ω Voltage Gain F= 1MHz Gain monotonicity guaranteed by design Precision of the Voltage Gain F= 1MHz Step Value Gain Mismatch between Both Channels 100kΩ F= 1MHz -4.5 V -4 V -9 30 dB -1 1 dB 3.6 dB 1 dB 2.4 3 F= 1MHz AV = -9dB 55 110 200 Bw Bandwidth @ -3dB R L = 500Ω C L = 15pF AV = 0dB 32 69 132 AV = +18dB 26 52 100 AV = +30dB 10 18 36 Rbw Bandwidth Roll-off AV = +30dB, F = 1MHz Bandwidth @ -3dB RL = 500Ω, CL = 15pF |Source| Sink Vo = 2Vpeak 17 17 50 0.08 28 22 100 V/µs 1.5 pA/√Hz 4.6 nV/√Hz Io SR Slew Rate (gain independent) MHz dB mA NOISE AND DISTORTION in Equivalent Input Noise Current en Equivalent Input Noise Voltage F = 100kHz F = 100kHz AV = 30dB 1Vpeak, F = 150kHz, AV = +30dB, RL = 500Ω//15pF THD30 IM3 Harmonic Distorsion Third Order Intermodulation Product F1 = 180kHz, F2 = 280kHz IM3 Third Order Intermodulation Product F1 = 70kHz, F2 = 80kHz 3/9 H2 H3 H4 H5 Vout = 1Vpeak, AV = +30dB RL = 500Ω//15pF -70 -93 -98 -99 @ 80kHz @ 380kHz @640kHz @740kHz Vout = 1Vpeak, AV = +30dB RL = 500Ω//15pF -77 -85 -86 -87 @ 60kHz @ 90kHz @220kHz @230kHz -77 -79 -83 -84 dBc dBc dBc TS652 DIGITAL INPUTS Symbol GC1, GC2, GC3 and GC4 Parameter Min. Typ. Max. 0 0.8 2 3.3 Low Level High Level Unit V SIMPLIFIED SCHEMATIC The TS652 consists of two independent channels. Each channel has two stages. The first is a very low noise digitally controlled variable gain amplifier (range 0 to 18dB). The TS652 features a high input impedance and a low noise current. To minimize the overall noise figure, the source impedance must be less than 3kΩ. This value gives an equal contribution of voltage and current noises. The second stage is a gain/attenuation stage (+12dB to -9dB) featuring a low output impedance. This output stage can drive loads as low as 500Ω. v Input1 _ + Ouput1 _ + +Vcc1 -Vcc v Analog GND (AGND) v + + Input2 Ouput2 _ _ +Vcc2 vv GAIN CONTROL LOGIC DECODER GC1 GC2 GC3 GC4 Digital GND (DGND) POWER DOWN MODE POSITION +Vcc +Vcc Power Down Input Output -Vcc -Vcc 4/9 TS652 BANDWIDTH The small signal bandwidth is almost constant for gains between +18dB to 0dB and is in the order of 52MHz to 70MHz respectively. For 30dB gain the bandwidth is around 18MHz. The power bandwidth is typically equal to 30MHz for 2V peak to peak signals. MAXIMUM INPUT LEVEL The input level must not exceed the following values : negative peak value: must be greater than -VCC + 1.5V positive peak value: must be less than +VCC - 1.5V For example, if a +/-6V power supply is used, the input signal can swing between -4.5V and +4.5V. These values are due to common mode input range limitations of the input stage of the first amplifier. Some other limitations may occur, due to the slew rate of the first operational amplifier (typically in the order of 300V/µs). This means that the maximum input signal decreases at high frequency. SINGLE SUPPLY OPERATION The incoming signal is AC coupled to the inputs. The TS652 can be used either with a dual or a single supply. If a single supply is used, the inputs are biased to the mid supply voltage (+VCC/2). This bias network must be carefully designed, in order to reject any noise present on the supply rail. The AGND pin (9) must be connected to +VCC/2. The bias current of the second stage (inverting structure) is 8µA for both amplifiers. A resistor divider structure can be used. Two resistances should be chosen by considering 8µA as the 1% of the total current through these resistances. For a single +12V supply voltage, two resistances of 7.5kΩ can be used. The differential input consists of a high pass circuit, formed by the 1µF capacitor and a 1kΩ resistance and gives a break frequency of 160Hz. SINGLE +12V SUPPLY OF THE TS652 10nF 1µF 100nF TS652 IN+ 1k 10nF +Vcc1 1 14 +Vcc2 47k Input 1 2 13 Output 1 Input 2 3 12 Output 2 47k 1µF GC2 5 INGC3 6 1µF GC4 7 5/9 12V 10nF 11 Power Down GC1 4 Gain Control Logic Decoder 1k 12V 100nF 10µF 12V 10 -Vcc 7.5k 9 AGND 8 DGND 10nF 7.5k 1µF TS652 GAIN CONTROL The gain and the power down mode is programmed with a 4 bit digital word : Digital Control Total Gain (dB) First Stage Gain (dB) Second Stage Gain (dB) Maximum Input Level Bandwidth Small Signal Eq. Input Noise (nV/√Hz) $0000 -9 0 -9 2.8Vrms 110mHZ 29 $0001 -6 0 -6 2.8Vrms 100MHz 26 $0010 -3 0 -3 2.8Vrms 85MHz 23 $0011 0 0 0 2.8Vrms 69MHz 22 $0100 3 3 0 2Vrms 63MHz 16 $0101 6 6 0 1.4Vrms 58MHz 12 $0110 9 9 0 1Vrms 56MHz 9 $0111 12 12 0 0.7Vrms 55MHz 7 $1000 15 15 0 0.5Vrms 54MHz 6 $1001 18 18 0 0.35Vrms 52MHz 4.8 $1010 21 21 3 0.25Vrms 42MHz 4.7 $1011 24 24 6 175mVrms 30MHz 4.7 $1100 27 27 9 125mVrms 24MHz 4.6 $1101 30 30 12 88mVrms 18MHz 4.6 $1110 30 30 12 88mVrms 18MHz 4.6 $1111 30 30 12 88mVrms 18MHz 4.6 The gain is the same for both channels. The digital inputs are CMOS compatible. The supply voltage of the logic decoder used to transcode the digital word can be either 3.3V or 5V or VCC. 6/9 TS652 Closed Loop Gain vs. Frequency Bandwidth vs. Gain 100 30 90 BANDWIDTH (MHz) 40 20 Gain (dB) 10 0 -10 -20 80 70 60 50 40 30 20 -30 10 -40 10kHz 100kHz 1MHz 10MHz -9 100MHz -6 -3 0 3 Frequency VOLTAGE NOISE (nV/VHz) SLEW RATE (V/µs) 105 SR- 95 SR+ 90 85 80 75 70 -6 -3 0 3 6 9 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 -9 12 15 18 21 24 27 30 -6 -3 Gain Switching (+15dB to -9dB) 6 9 12 15 18 21 24 27 30 Gain Switching (+30dB to +9dB) GC4 command 5 5 4 4 Ouput Signal (V) Ouput Signal (V) 3 6 6 3 2 1 0 -1 -2 GC1 command 3 2 1 0 -1 Ouput Signal -2 Ouput Signal -3 -3 0 5µs 10µs 15µs 20µs Time measurement conditi ons: Vcc=±6V, Rload=500Ω, Tamb=25°C 7/9 0 GAIN (dB) GAIN (dB) -4 12 15 18 21 24 27 30 Equivalent Input Voltage Noise vs. Gain 110 -9 9 GAIN (dB) Negative & Positive Slew Rate vs. Gain 100 6 -4 0 5µs 10µs Time 15µs 20µs TS652 Output/Input Isolation in Power Down Mode vs. Frequency 3rd Order Intermodulation (2 tones : 180kHz and 280kHz) -50 -70 -60 Isolation (dB) -75 60kHZ IM3 (dBc) -70 -80 90kHZ -80 220kHZ -90 -85 230kHZ -100 -110 -90 10kHz 100kHz 1MHz 10MHz Frequency 0 1 2 3 4 5 Vout peak (V) 3rd Order Intermodulation (2 tones : 180kHz and 280kHz) -70 -75 IM3 (dBc) 80kHZ -80 380kHZ -85 640kHZ 740kHZ -90 0 1 2 3 4 5 Vout peak (V) measurement conditi ons: Vcc=±6V, Rload=500Ω, Tamb=25°C 8/9 TS652 PACKAGE MECHANICAL DATA 14 PINS - PLASTIC MICROPACKAGE (SO) Millimeters Inches Dim. Min. A a1 a2 b b1 C c1 D (1) E e e3 F (1) G L M S Typ. Max. Min. 1.75 0.2 1.6 0.46 0.25 0.1 0.35 0.19 Typ. 0.004 0.014 0.007 0.5 Max. 0.069 0.008 0.063 0.018 0.010 0.020 45° (typ.) 8.55 5.8 8.75 6.2 0.336 0.228 1.27 7.62 3.8 4.6 0.5 0.344 0.244 0.050 0.300 4.0 5.3 1.27 0.68 0.150 0.181 0.020 0.157 0.208 0.050 0.027 8° (max.) Note : (1) D and F do not include mold flash or protrusions - Mold flash or protrusions shall not exceed 0.15mm (.066 inc) ONLY FOR DATA BOOK. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infring ement of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change witho ut notice. This publ ication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life suppo rt devices or systems withou t express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom http://www. st.com 9/9