STMICROELECTRONICS TDA7501

TDA7501

LINE-DRIVER FOR DIGITAL CARRADIO
SIGNAL PROCESSOR
PRODUCT PREVIEW
INPUTS:
- QUASI DIFFERENTIAL STEREO INPUT
FOR CD
- DIFFERENTIAL STEREO INPUTS FOR
PHONE, NAVIGATION, FM, AM
- SINGLE-ENDED INPUT FOR CASSETTE
- FOUR INDEPENDENT INPUT MULTIPLEXER
AND GAIN STAGES
- ENVELOPE-DETECTOR FOR
AM-NOISEBLANKING
- MIXING OF PHONE AND NAVIGATION
- DC-CONNECTION TO DSP
- DUAL MPX INPUTS
OUTPUTS:
- 6 OUTPUT CHANNELS WITH INDEPENDENT
VOLUME CONTROL
- 4 MAIN OUTPUT CHANNELS WITHADDITIONAL
INPUT SELECTOR FOR PHONE AND/OR
NAVIGATIONOR CD
- OUTPUTS FOR UP TO 4V rms
- AC-CONNECTION FROM DSP
DIGITAL CONTROL:
- SPI-BUS OR I2C BUS INTERFACE
(SELECTABLE)
- DIRECT MUTE FOR THE OUTPUT STAGES
AND/OR HIGH IMPEDANCE MPX MUTE
BLOCK DIAGRAM
TQFP44
DESCRIPTION
The Linedriver handles all analog input- and output-signals for the Digital Carradio Signal Processor TDA7501. The device contains four independent input multiplexers to select the sources
for the DSP’s four AD-converters. Four additional
gain stages allow an adaptation to run the ADCs
in best S/N condition.
The six outputs have independent volume stages
with a large dynamic range. Using a 12V-supply
the outputs are able to drive up to 4Vrms .
April 1999
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
1/18
TDA7501
SUPPLY
Symbol
Parameter
V dd
Supply Voltage
VP
Output Supply Voltage
IS8
Supply Current Vdd
IS12
Supply Current VP
SVRR
Test Condition
Min.
Typ.
Max.
Unit
7.5
8.3
10
V
12
V
Vdd = 8.3V
15
mA
VP = 12V
15
mA
60
dB
Value
Unit
Ripple Rejection @ 1kHz
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDDmax
Operating Supply Voltage V DD
10.5
V
V Smax
Operating Supply Voltage V s
13.0
V
Tamb
Operating Temperature Range
Tstg
Storage Temperature Range
-40 to 85
°C
-55 to +150
°C
Value
Unit
65
°C/W
ESD:
All pins are protected against ESD according to the MIL883 standard.
PIN CONNECTION
THERMAL DATA
Symbol
Rth j-pins
2/18
Parameter
Thermal Resistance Junction-pins
Max.
TDA7501
ELECTRICAL CHARACTERISTICS (VDD = VS = 8.3V; Tamb = 25°C; RL = 10kΩ; all gains = 0dB;
f = 1kHz; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
2.3
VRMS
80
100
dB
GENERAL
VCL
Input Clipping Level
SIN
Input Separation
GIN MIN
Min. Input Gain
0
dB
GIN MAX
Max. Input Gain
15
dB
GSTEP
Step Resolution
VDC
DC Steps
Adjacent Gain Steps
GMIN to GMAX
d IN
1
dB
0.5
mV
5
mV
Distortion
VOUT = 0.7VRMS
0.002
0.08
%
VDCout
Output DC-voltage
pins 41..44
1.65
V
R out
Output impedance
3
kΩ
QUASI DIFFERENTIAL CD STEREO INPUT (non inverting)
R in
CMRR
VN
Input Resistance (see Fig. 2)
Differential
70
100
Common Mode Rejection Ratio
VCM = 1VRMS @ 1kHz
45
70
dB
VCM = 1VRMS @ 10kHz
45
60
dB
2.5
µV
Output-Noise
20Hz - 20kHz; unweighted
130
kΩ
DIFFERENTIAL PHONE/NAVIGATION/FM/AM INPUT (inverting)
R in
CMRR
Input Resistance (see Fig. 3)
Common Mode Rejection Ratio
35
50
65
kΩ
VCM = 1VRMS @ 1kHz
40
70
dB
VCM = 1VRMS @ 10kHz
40
60
dB
35
50
65
kΩ
70
100
130
kΩ
100
130
kΩ
AM IF INPUT
R in
Input Resistance
CASSETTE INPUT (non inverting)
R in
Input Resistance
AM/FM-LEVEL INPUT
R in
Input Resistance
70
Vmin
Minimum Input Voltage
-0.4
Vmax
Maximum Input Voltage
V
7
V
Dual MPX control (pin TUNER-)
VCTRLMPX1
Control voltage for MPX 1+2
MPX1 -> MPX1 + MPX2
1.5
V
VCTRLMPX2
Control voltage for MPX2
MPX1 + MPX1 -> MPX2
4
V
VCTRLMPX3
Control voltage for MPX 1+2
MPX2 -> MPX1 + MPX2
3.5
V
VCTRLMPX4
Control voltage for MPX1
MPX1 + MPX2 -> MPX2
1
V
SPEAKER OUTPUTS
R in
Input Impedance
35
50
65
kΩ
GMAX
Max. Gain
single supply mode
dual supply mode
15
21
dB
dB
AMAX
Max. Attenuation
single supply mode
dual supply mode
-79
-73
dB
dB
3/18
TDA7501
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
ASTEP
Step Resolution
AMUTE
Output Mute Attenuation
Test Condition
80
EE
Attenuation Set Error
from +15 to -40dB
VDC
DC Steps
Adjacent Attenuation Steps
Output DC-voltage
single supply mode
dual supply mode
Output Clipping Level
d = 0.3%, V CC = VDD = 8.3V
gain = 0dB
gain = 6dB
VDCOUT
VCLIP
Min.
Output Load Resistance
CL
Output Load Capacitance
ROUT
AC-coupled
Max.
dB
100
dB
2
dB
3
mV
4.15
outref
V
V
2.3
2.8
VRMS
VRMS
4
VRMS
5
Output Impedance
Unit
1
0.1
d = 0.3%, V CC = 12V
VDD = 8.3V gain = 0dB
RL
Typ.
kΩ
30
10
nF
120
Ω
VN
Output Noise
BW = 20Hz-20kHz muted 0dB
muted 6dB
gain = 0dB
gain = 6dB
3
7.5
10
13
µV
µV
µV
µV
S/N
Signal to Noise Ratio
BW = 20Hz-20kHz VO = 2VRMS
V O = 4VRMS
106
110
dB
dB
dout
distortion
VOUT = 1VRMS; all stages 0dB
SC
Channel Separation left/right
0.005
80
0.08
100
%
dB
ADCVDDREF (CODEC reference)
Imaxadc
Max. Output Current
pin 40
5
mA
Vlow
Voltage for logic ”0”
inputs SEL, SCL,SDA,MUTE
0.8
V
Vhigh
Voltage for logic ”1”
inputs SEL, SCL,SDA,MUTE
2.4
V
BUS INPUTS
4/18
TDA7501
DESCRIPTION OF THE INPUT PART
On the input side, the DSPLD (see figure 1) connects the external audio- and tuner-signals to the
four AD-converters of the Digital Carradio Signal
Processor TDA7500. The audio signals are adjusted by the input gain stage to the internal refer-
ence signal with 2V rms referred to 4.15V (=V33
à 1.2575). The following CODEC-interface attenuates the 2Vrms to 0.8Vrms referred to the
CODEC’s reference voltage of 1.65V which allows a DC-coupling to the TDA7500.
Figure 1. Input part.
Input Stages
The decive offers several input stages for the different signals which have to be handled by the
system. A quasi differential input (see figure 2)
can be used for (external) CD-changer. The two
mono differential inputs allow the connection of
Phone and Navigation (see figure 3) or it could be
used as fully differential stereo input. Additionally
a single-ended stereo input is available for Cassette applications. The lower part of the input
section is dedicated to the tuner signals. Another
quasi differential input (see figure 4) is used to
connect AM and FM referred to the tuner reference (Tuner-). This concept supports also double
tuner systems. Also two seperate level inputs are
present which are followed by level-shifters to allow the use of the TDA7500’s ADCs. For AM
noise blanking an envelope-detector driven by
the AM-IF is also available.
5/18
TDA7501
Figure 2. Quasi differential input-stage.
Figure 3. Mono differential input-stage.
Figure 4. Differential input-stage for AM/FM.
6/18
TDA7501
Dual MPX mode
The TDA7501 is able to support a twin tuner concept via the Dual-MPX-Mode. In this configuration
the MPX-pin and the AM-pin are acting as MPX1
and MPX2 inputs. The DC-Voltage at the
TUNER- -pin controls whether one or
both MPX-signals are used to decode the stereo
FM-signal (see figure 4 Please note that the
thresholds have a hysteresis of 500mV. During
this mode the highohmic-mute acts on both inputs in parallel.
For the programming of the Dual-MPX-Mode see
the programming section.
Figure 4. Block diagram Dual MPX.
7/18
TDA7501
DESCRIPTION OF THE OUTPUT PART
The TDA7501 has 6 independent outputstage
with volume control. The first 4 (main) outputs
have an input selector which allows to select besides the DAC-outputs CD-direct or Phone/Navigation-mix. In addition one can mix the SPKR1
with Phone/Navigationso that traffic or navigation
announcements can bypass the DSP (see figure
5).
The TDA7500 CODEC outputs have a maximum
Figure 5. Output part.
8/18
output voltage of 0.5Vrms . To obtain 4Vrms , (in
the dual supply mode only) the signal is first amplified to have a reference amplitude of 2V rms.
The following volume stage offers up to 15dB
gain which gives along with the programmable
6dB gain in the output-stage enough overdrive
capability. To achieve the maximum output swing
of 4Vrms the device must be supplied with an additional supply of 12V. With a single supply (Vdd
=VCC = 8.3V) 2.8Vrms are obtained at the output
at maximum.
TDA7501
Figure 6. Level-diagram.
TDA7501
REFERENCE CONCEPT
For the input section the TDA7501 generates the
internal reference voltage by multiplying the V33
voltage by 1.2575.
The V33 voltage is also buffered and fed back to
the CODEC where it is used to generate all necessary references. For best performance it is recommended to filter the V33 reference pin by
means of a passive second order lowpass as
shown in figure 7 This concept allows a direct DC
coupling between the TDA7501 and the DSP
because of the accurate matching of DC levels.
On the output side the TDA7501 offers two main
modes: a single supply and a dual supply mode.
Dual supply mode
In this mode the outputs are able to provide up to
4V rms with a minimum supply VCC of 12V as
well as a output reference voltage set to half of
VCC (bit D0 of the mode select byte set to ’1’). If
the switch D1/byte mode select is open the output reference voltage must be defined externally
e.g. a zener diode with RC-lowpass. If the switch
is closed the reference voltage will be half of V cc
and only an external capacitor has to be added.
Figure 7. Reference voltage generation
TDA7500
TDA7501
9/18
TDA7501
Single supply mode
If VCC and Vdd are connected to a single supply
the maximum possible output swing is about 2.8V
rms . The output reference voltage pin can be left
open or otherwise the internal voltage divider can
be used to generate for the outputs a VCC/2 reference.
DIGITAL BUS
The TDA7501 digital interface offers two different
protocols: SPI and I2C. To select I2C-mode the
SEL-pin has to beconnected to VDD. If the voltage
at the SEL-pin is more than about 1V below the
VDD voltage the interface switches to SPI-mode.
In both cases the interface is able to work with a
3.3V microprocessor as well as with a 5V microprocessor. For details of both protocols refer to
the programming section.
SPI BUS MODE
Interface protocol
The TDA7501 SPI interface protocol comprises :
- a subaddress and
- a sequence of n databytes
each consisting of 8 bits (see figure 8).
Figure 8. Timing diagram for the SPI bus mode.
I2C BUS MODE
Interface Protocol
The interface protocol comprises:
-a start condition (S)
-a chip address byte (write mode only)
-a subaddress byte
-a sequence of data (N-bytes + acknowledge)
-a stop condition (P)
SUBADDRESS
CHIP ADDRESS
MSB
S
1
LSB
0
0
0
1
ACK = Acknowledge
S = Start
P = Stop
10/18
1
0
MSB
0 ACK 0
DATA 1...DATA n
LSB
0
I
0 SA3 SA2 SA1 SA0 ACK
MSB
LSB
DATA
ACK P
TDA7501
SOFTWARE SPECIFICATION FOR BOTH MODES
Auto increment
If bit I in the subaddress byte is set to ”1”, the autoincrement of the subaddress is enabled.
Reset condition
A Power-On-Reset is invoked if the Supply-Voltage V dd is below than 3.5V. After POR the following
data is written automatically into the registers of all subaddresses :
MSB
1
The programming after POR is marked bold-face
in the programming tables.
With this programming all the outputs are muted
to their corresponding reference voltages.
LSB
1
1
1
1
1
1
0
Subaddresses
MSB
D7
LSB
D6
I
D4
SA3
SA2
SA1
SA0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
Name
Input selector 1L
Input selector 1R
Input selector 2L
Input selector 2R
Bypass selector
Configuration
Mode select
Output selector
Volume 1L
Volume 1R
Volume 2L
Volume 2R
Volume 3L
Volume 3R
Autoincrement mode off
Autoincrement mode on
0
must be ”0”
Input selector 1L..3R, bits D7 ..D3 (subaddresses 0..3)
MSB
D7
LSB
D6
D5
D4
D3
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
0
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D2
D1
Function
D0
mute
off
on
gain
15dB
14dB
13dB
12dB
11dB
10dB
9dB
8dB
7dB
6dB
5dB
4dB
3dB
2dB
1dB
0dB
11/18
TDA7501
Input selector 1L, bits D2 ..D0 (subaddresses 0)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Function
source select
CDL
Phone/FDL
Navigation/FDR
Phone/Navigation mix
CassL
MPX-RDS
AM
AM-level
Input selector 1R, bits D2 ..D0 (subaddresses 1)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Function
source select
CDR
Phone/FDL
Navigation/FDR
Phone/Navigation mix
CassR
MPX-RDS
FM (or MPX1/MPX2 in Dual MPX mode)
AM-spikes
Input selector 2L, bits D2 ..D0 (subaddresses 2)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Function
source select
CDL
Phone/FDL
Navigation/FDR
Phone/Navigation mix
CassL
AM
FM-level
AM-level
Input selector 2R, bits D2 ..D0 (subaddresses 3)
MSB
D7
12/18
LSB
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Function
source select
CDR
Phone/FDL
Navigation/FDR
Phone/Navigation mix
CassR
MPX-RDS
FM (or MPX1/MPX2 in Dual MPX mode)
AM-spikes
TDA7501
Bypass selector (subaddress 4)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
mix level phone/navigation
0/mute
-1.6dB/-15.5dB
-3.6/-9.6dB
-6/-6dB
-9.6/-3.6dB
-15.5/-1.6dB
mute/0dB
mute
must be ”1”
gain
15dB
14dB
13dB
12dB
11dB
10dB
9dB
8dB
7dB
6dB
5dB
4dB
3dB
2dB
1dB
0dB
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
0
1
0
0
1
1
0
0
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Function
Mode select (subaddress 5)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
Function
D0
output gain
odB
+6dB
reference voltage setting for output
internal reference (V33*1.25)
external reference
internal divider for outputreference voltage
connected to VCC/2
disconnected
fastcharge (switches at CD input)
open
closed
must be ”1”
RDS-mute (high impedance)
muted
unmuted
mute pin function I
”0” does not activate the output mute
”1” activates the output mute
mute pin function II
”0” activates the high impedance mute
”1” does not activate the high impedance mute
13/18
TDA7501
Configuration (subaddress 6)
MSB
D7
LSB
D6
D5
D4
D3
0
0
1
1
D2
D1
D0
0
0
1
1
0
1
0
1
AM-IF rectifier gain
+18dB
+15.5dB
+12dB
+6dB
AM-IF rectifier corner frequency
14kHz
18.5kHz
28kHz
56kHz
0
1
0
1
1
must be ”1”
Dual MPX mode
on (control through Tuner-voltage)
off
0
1
0
0
1
1
Function
forced Dual MPX control
MPX1 (allows automatic selection)
MPX2 (overwrites automatic selection)
MPX1+MPX2 (overwrites automatic selection)
MPX1 (overwrites automatic selection)
0
1
0
1
Output selector (subaddress 7)
MSB
D7
LSB
D6
D5
D4
D3
0
0
1
1
0
0
1
1
0
0
1
1
14/18
0
1
0
1
0
1
0
1
D2
0
1
0
1
D1
D0
0
0
1
1
0
1
0
1
Function
source select SPKR 1L
Bypass
CDL
Phone/Navigation mix / IN1L
IN1L
source select SPKR 1R
Bypass
CDL
Phone/Navigation mix / IN1R
IN1R
source select SPKR 2L
Bypass
CDL
mute
IN2L
source select SPKR 2R
Bypass
CDL
mute
IN2R
TDA7501
Volume speaker outputs (subaddresses 8...13)
MSB
LSB
Function
D7
D6
D5
D4
D3
D2
D1
D0
1
:
1
1
0
0
:
0
0
:
0
0
0
:
0
0
0
0
:
0
0
:
1
1
0
:
0
0
0
0
:
0
0
:
0
0
0
:
0
0
0
0
:
0
1
:
0
0
1
;
0
0
0
0
:
1
0
:
1
1
1
;
0
0
0
0
:
1
0
:
1
1
1
;
0
0
0
0
:
1
0
:
1
1
1
;
1
0
0
1
:
1
0
:
0
1
+15dB
:
+1dB
0dB
0dB
-1dB
:
-15dB
-16dB
:
-78dB
-79dB
x
1
1
x
x
x
x
x
Mute
The unused subaddresses 14/15 must be programmed to ”11111110” to allow software compatibility to future extensions.
15/18
TDA7501
Figure 9. Application diagram.
TDA7500
TDA7501
16/18
TDA7501
mm
DIM.
MIN.
TYP.
A
inch
MAX.
MIN.
TYP.
1.60
A1
0.05
A2
1.35
B
0.30
C
0.09
0.063
0.15
0.002
1.40
1.45
0.053
0.055
0.057
0.37
0.45
0.012
0.014
0.018
0.20
0.004
0.006
0.008
D
12.00
0.472
D1
10.00
0.394
D3
8.00
0.315
e
0.80
0.031
E
12.00
0.472
E1
10.00
0.394
E3
8.00
0.315
L
0.45
0.60
0.75
OUTLINE AND
MECHANICAL DATA
MAX.
0.018
0.024
L1
1.00
K
0°(min.), 3.5°(typ.), 7°(max.)
0.030
0.039
TQFP44 (10 x 10)
D
D1
A
A2
A1
33
23
34
22
0.10mm
.004
B
E
B
E1
Seating Plane
12
44
11
1
C
L
e
K
TQFP4410
17/18
TDA7501
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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