EL2082 UCT NT ROD ACEME at P E r T L E P t en e OL RE OBS ENDED upport C om/tsc Data January 1996, Rev.D M Sheet lS M sil.c ECO echnica w.inter R O T w N w ur IL or act o cont -INTERS 8 1-88 ® FN7152 Current Mode Multiplier Features The EL2082 is a general purpose variable gain control building block, built using an advanced proprietary complementary bipolar process. It is a two-quandrant multiplier, so that zero or negative control voltages do not allow signal feedthrough and very high attenuation is possible. The EL2082 works in current mode rather than voltage mode, so that the input impedance is low and the output impedance is high. This allows very wide bandwidth for both large and small signals. • Flexible inputs and outputs, all ground referred The IIN pin replicates the voltage present on the VIN pin; therefore, the V IN pin can be used to reject common-mode noise and establish an input ground reference. The gain control input is calibrated to 1mA/mA signal gain for 1V of control voltage. The disable pin (E) is TTL-compatible, and the output current can comply with a wide range of output voltages. Because current signals rather than voltages are employed, multiple inputs can be summed and many outputs wire-or'ed or mixed. The EL2082 operates from a wide range of supplies and is available in standard 8-pin plastic DIP or 8-pin SO. • 150MHz large and small-signal bandwidth • 46dB of calibrated gain control range • 70dB isolation in disable mode @ 10MHz • 0.15% diff gain and 0.05° diff phase performance at NTSC using application circuit • Operates on ±5V to ±15V power supplies • Outputs may be paralleled to function as a multiplexer Applications • Level adjust for video signals • Video faders and mixers • Signal routing multiplexers • Variable active filters • Video monitor contrast control • AGC • Receiver IF gain control • Modulation/demodulation EL2082 (8-PIN SO, PDIP) TOP VIEW • General “cold” front-panel control of AC signals Ordering Information PART NUMBER 1 TEMP. RANGE PACKAGE PKG. NO. EL2082CN 0°C to +75°C 8-Pin PDIP MDP0031 EL2082CS 0°C to +75°C 8-Pin SO MDP0027 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners. EL2082 Absolute Maximum Ratings (TA = 25°C) VS VIN, VOUT VE, VGAIN IIN Voltage between VS+ and VS- . . . . . . . . . . . . . . .+33V Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . -1 to +7V Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5mA PD TA TJ TST Maximum Power Dissipation . . . . . . . . . . See Curves Operating Temperature Range . . . . . . . 0°C to +75°C Operating Junction Temperature . . . . . . . . . . . . 150°C Storage Temperature . . . . . . . . . . . . . -65°C to +150°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA DC Electrical Specifications VS = ±15V, VG = 1V, VE = 0.8V, V OUT = 0, VIN = 0, IIN = 0 PARAMETER DESCRIPTION TEMP MIN TYP MAX UNITS VIO Input Offset Voltage Full -20 20 mV IOO Output Offset Current Full -100 100 µA RINI IIN Input Impedance; IIN = 0, 0.35mA Full 75 95 115 Ω VCMRR Voltage Common-Mode Rejection Ratio, VIN = -10V, +10V Full 45 55 ICMRR Offset Current Common-Mode Rejection Ratio, VIN = -10V, +10V Full VPSRR Offset Voltage Power Supply Rejection Ratio, VS = ±5V to ±15V Full IPSRR Offset Current Power Supply Rejection Ratio, VS = ±5V to ±15V Full IBVIN VIN Bias Current Full -10 RINV VIN Input Impedance; VIN = -10V, +10V Full 0.5 Nlini Signal Nonlinearity; IIN = -0.7mA, -0.35mA, 0mA, +0.35mA, +0.7mA Full ROUT Output Impedance VOUT = -10V, +10V Full 0.25 VOUT Output Swing; VGAIN = 2V, IIN ±2 mA, RL = 4.0k Full -11 +11 V VIOG VOS, Gain Control, Extrapolated from V GAIN = 0.1V, 1V Full -15 15 mV AI Current Gain, IIN ±350µA Full 0.9 1.0 1.1 mA/mA Nling Nonlinearity of Gain Control, VGAIN = 0.1V, 0.5V, 1V Full 2 5 % ISO Input Isolation with VGAIN = -0.1V Full -80 VINH E Logic High Level Full 2.0 VINL E Logic Low Level Full ILH Input Current of E, VE = 5V Full ILL Input Current of E, VE = 0 Full IODIS IOUT, Disabled E = 2.0V Full IS Supply Current Full 2 0.5 60 dB 5 80 1 dB 10 µA/V 10 µA 1.0 0.10 µA/V MΩ 0.4 0.5 % MΩ -96 dB V 0.8 V -50 50 µA -50 50 µA ±10 µA 16 mA 13 EL2082 AC Electrical Specifications RL = 25Ω, CL = 4pF, CIN = 2pF, TA = 25°C, VG = 1V, V S = ±15V PARAMETER DESCRIPTION MIN TYP MAX UNITS BW1 Current Mode Bandwidth -3dB 150 MHz BW2 ±0.1dB 30 MHz BWp Power, I IN = 1mAP-P 150 MHz BWg Gain Control Bandwidth 20 MHz SRG Gain Control Slew Rate VG from 0.2V to 2V 12 (mA/mA)/µs TREC Recovery Time from V G < 0 250 ns TEN Enable Time from E Pin 200 ns TDIS Disable Time from E Pin 30 ns DG Differential Gain, NTSC with IIN = -0.35mA to +0.35mA 0.25 % DP Differential Phase, NTSC with I IN = -0.35mA to +0.35mA 0.05 Degree 3 EL2082 Typical Performance Curves Current Gain vs Frequency for Different Gains Current Gain Flatness Harmonic Distortion vs Input Amplitude 4 Current Gain vs Frequency Frequency Response in Voltage Input Mode Output Current Noise vs Frequency EL2082 Typical Performance Curves (Continued) Differential Gain Error vs DC Offset Current Differential Phase Error vs DC Offset Current Gain Pin Transient Response Gain Control Pin Frequency Response 5 Gain Control Recovery From Vg = -0.1V IOUT vs IIN Normalized Gain Error vs VGAIN Voltage EL2082 Typical Performance Curves (Continued) Current Gain vs Supply Voltage Output Capacitance vs Output Voltage Supply Current vs Supply Voltage 8-Pin Plastic DIP Maximum Power Dissipation vs Ambient Temperature 6 Current Gain vs Temperature Enable Pin Response Supply Current vs Die Temperature 8-Pin SO Maximum Power Dissipation vs Ambient Temperature EL2082 Applications Information The EL2082 is best thought of as a current-conveyor with variable current gain. A current input to the IIN pin will be replicated as a current driven out the I OUT pin, with a gain controlled by V GAIN. Thus, an input of 1mA will produce an output current of 1mA for V GAIN = 1V. An input of 1mA will produce an output of 2mA for V GAIN = 2V. The useable VGAIN range is zero to +2V. A negative level on V GAIN, even only -20mV, will yield very high signal attenuation. The EL2082 in Conjunction with Op-Amps This resistor-load circuit shows a simple method of converting voltage signals to currents and vice versa: RIN would typically be 1kΩ for video level inputs, or 10kΩ for ±10V instrumentation signals. The higher the value of R IN (the lower the input current), the lower the distortion levels of the EL2082 will be. An approximate expression of the nonlinearity of the EL2082 is: Nonlinearity ( % ) = 0.3*II N ( mA ) 2 Optimum input current level is a tradeoff between distortion and signal-to-noise-ratio. The distortion and input range do not change appreciably with V GAIN levels; distortion is set by input currents alone. The output current could be terminated with a 1kΩ load resistor to achieve a nominal voltage gain of 1 at the EL2082, but the IOUT, load, and stray capacitances would limit bandwidth greatly. The lowest practical total capacitance at IOUT is about 12pF, and this gives a 13MHz bandwidth with a 1kΩ load. In the above example a 100Ω load is used for an upper limit of 130MHz. The operational amplifier gives a gain of +10 to bring the overall gain to unity. Wider bandwidth yet can be had by installing C IN. This is a very small capacitor, typically 1pF-2pF, and it bolsters the gain above 100MHz. Here is a table of results for this circuit used with various amplifiers: VGAIN RL R F + R G GAIN = ----------------- ---------------------------- ---------------------- 1V R I N + 95Ω R G FIGURE 1. EL2082 + OP-AMP OPERATIONAL AMPLIFIER POWER SUPPLIES RF RG CIN -3dB BANDWITH 0.1dB BANDWIDTH PEAKING EL2020 ±5V 620 68 _ 34MHz 5.6MHz 0 EL2020 ±15V 620 68 _ 40MHz 7.4MHz 0 EL2130 ±5V 620 68 _ 73MHz 11MHz 1.0dB EL2030 ±15V 620 68 _ 93MHz 12MHz 1.3dB EL2090 ±15V 240 27 _ 60MHz 10MHz 0.5dB EL2120 ±5V 220 24 _ 57MHz 10MHz 0.4dB EL2120 ±15V 220 24 _ 65MHz 11MHz 0.3dB EL2070 ±5V 200 22 2pF 150MHz 30MHz 0.4dB EL2071 ±5V 1.5k 240 2pF 200MHz 30MHz 0 EL2075 ±5V 620 68 2pF 270MHz 30MHz 1.5dB 7 EL2082 Maximum bandwidth is maintained over a gain range of +6 to -16dB; bandwidth drops at lower gains. If wider gain range with full bandwidth is required, two or more EL2082s can be cascaded with the I OUT of one directly driving the IIN of the next. The circuit above gives a negative gain. The main concern of this connection involves the total I OUT and stray capacitances at the amplifier's input. When using traditional op-amps, the pole caused by these capacitances can make the amplifier less stable and even cause oscillations in amplifiers whose gain-bandwidth is greater than 5MHz. A typical cure is to add a capacitor C F in the 2pF-10pF range. This will reduce overall bandwidth, so a capacitor C IN can be added to regain frequency response. The ratio C F/C IN is made equal to RIN/RF. The EL2082 can also be used with an I → V operational circuit: VGAIN RF GAIN = - ----------------- ---------------------------- 1V R IN + 95 Ω Current-feedback amplifiers eliminate this difficulty. Because their -input is a very low impedance, capacitance at the summing point of an inverting operational circuit is far less troublesome. Here is a table of results of various currentfeedback circuits used in the inverting circuit: FIGURE 2. INVERTING EL2082 + OP-AMP OPERATIONAL AMPLIFIER POWER SUPPLIES RF RIN RG -3dB BANDWIDTH EL2020 ±5V 1k 910 _ 29MHz 4.3MHz 0 EL2020 ±15V 1k 910 _ 34MHz 5.3MHz 0 EL2130 ±5V 1k 910 _ 61MHz 9.7MHz 0 EL2030 ±15V 1k 910 _ 82MHz 12.3MHz 0 EL2171 (Note 1) ±5V 2k 1.8k 1k 114MHz 11MHz 1.2dB 0.1dB BANDWIDTH PEAKING NOTE: 1. With the EL2171, the EL2082 had ±15V supplies and the EL2171 required a 150Ω output load. The EL2120 and EL2090 are suitable in this circuit but they are compensated for 300Ω feedback resistors. R IN would have to be reduced greatly to obtain unity gain and the increased signal currents would cause the EL2082 to display much increased distortion. They could be used if the input resistor were maintained at 910Ω and R F reduced for a -1/3 gain, or if R F = 1k and an overall bandwidth of 25MHz were acceptable. The EL2082 can also be used within an op-amp's feedback loop: 1V GAIN = - -----------------VGAIN R F9 + 95Ω ----------------------------- RI N FIGURE 3. EL2082 IN FEEDBACK INVERTING GAIN With voltage-mode op-amps, the same concern about capacitance at the summing node exists, so CF and CIN should be used. As before, current-feedback amplifiers tend to solve the problem. However, in this circuit the inherent 8 EL2082 phase lag of the EL2082 detracts from the phase margin of the op-amp, and some overall bandwidth reduction may result. The EL2082 appears as a 3.0ns delay, well past 100MHz. Thus, for a 20MHz loop bandwidth, the EL2082 will subtract 20MHz x 3.0ns x 360 degrees = 21.6 degrees. The loop path should have at least 55 degrees of phase margin for low ringing in this connection. Loop bandwidth is always reduced by the ratio R IN/(RIN + RF) with voltage mode opamps. Current-feedback op-amps again solve the summingjunction capacitance problem in this connection. The loop bandwidth here becomes a matter of transimpedance over frequency and its phase characteristics. Unfortunately, this is generally poorly documented in amplifier data sheets. A rule of thumb is that the transimpedance falls to the value of the recommended feedback resistor at a frequency of F- 3dB/4 to F -3dB/2, where F-3dB is the unity-gain closedloop bandwidth of the amplifier. The phase margin of the opamp is usually close to 90° at this frequency. In general, R F is initially the recommended value for the particular amplifier and is then empirically adjusted for amplifier stability at maximum V GAIN , then RIN is set for the overall circuit gain required. Sometimes a very small C F can be used to improve loop stability, but it often must be in series with another resistor of value around R F/2. A virtue of placing the EL2082 in feedback is that the inputreferred noise will drop as gain increases. This is ideal for level controls that are used to set the output to a constant level for a variety of inputs as well as AGC loops. Furthermore, the EL2082 has a relatively constant input signal amplitude for a variety of input levels, and its distortion will be relatively constant and controllable by setting RF. Note that placing the EL2082 in the feedback path causes the circuit bandwidth to vary inversely with gain. The next circuit shows use of the EL2082 in the feedback path of a non-inverting op-amp: with increasing gain as well. The typical 12pF sum of EL2082 output capacitance in parallel with stray capacitance necessitates the inclusion of CF to prevent a feedback pole. Because of this 12pF capacitance at the op-amp -input, current-feedback op-amps will generally not be useable. As before, the loop bandwidth and phase margin must accommodate the extra phase lag of the EL2082. The VIN pin can be used instead of the IIN pin so: IOUT -V 1 G GM = ------------- = ------------------------------------ VIN 1V R G + 95 Ω FIGURE 5. THE VIN PIN USED AS SIGNAL INPUT This connection is useful when a high input impedance is required. There are a few caveats when using the V IN pin. The first is that VIN has a 250V/µs slew rate limitation. The second is that the inevitable C STRAY across R G causes a gain zero and gain INCREASES above the 1/(2π CSTRAY RG) frequency and can peak as much as 20dB with large CSTRAY. A graph of gain vs. frequency for several C STRAYS is included in the typical performance curves. In general, if wide bandwidth and frequency flatness is desired, the I IN pin should be used. The VIN pin does make an excellent ground reference pin, for instance when low-frequency noise is to be rejected. The next schematic shows the EL2082 V IN pin rejecting possible 60Hz hum induced on an RF input cable: 1V R F + 95Ω GAIN = -------- ------------------------ VG RG FIGURE 6. USING THE V IN PIN AS A GROUND REFERENCE TO REJECT HUM AND NOISE FIGURE 4. EL2082 IN FEEDBACK NON-INVERTING GAIN This example has the same virtues with regards to noise and distortion as the preceding circuit; and its bandwidth shrinks 9 This example shows V IN rejecting low-frequency fieldinduced noise but not adding peaking since the 0.01µF bypass capacitor shunts high-frequency signals to local ground. EL2082 Reactive Couplings with the EL2082 FIGURE 7. EXAMPLE REACTIVE COUPLINGS WITH EL2082’S The above sketch is an excerpt of a receiver IF amplifier showing methods of connecting the EL2082 to reactive networks. The I IN pin of the EL2082 looks like 95Ω well past 100MHz, and the output looks like a simple current-source in parallel with about 5pF. There is no particular problem with any resistance or reactance connected to I IN or IOUT . The mixer output is generally sent to a crystal filter, which required a few hundred ohm terminating impedance. The impedance of the I IN pin of the first EL2082 is transformed to about 400Ω by the 2:1 transformer T1. The two EL2082s are used as variable-gain IF amplifiers, with small gains offered by each. The output of the first EL2082 is coupled to the second by the resonant matching network L1-C1. For a Q of 5, Xc1 = x11 = 5 x 95 Ω, approximately. The impedance seen at the first EL2082's I OUT will be about Q 2 x 95Ω, or 2.5k, and by impedance transformation alone the first gain cell delivers 28dB of gain at VG = 1V. More gain cells can be used for a wider range of (calibrated) AGC compliance. Linearized Fader/Gain Control The following circuit is an example of placing two EL2082s in the feedback network of an op-amp to significantly reduce their distortions: VOUT = K • V A + (1-K) • VB where 0 ≤ K ≤ 1 The E input can be used as a high-speed noise blanker gate. FIGURE 8. LINEARIZED GAIN CONTROL/FADER Dual EL2082 Fader with EL2030 NTSC Differential Gain Error 10 Dual EL2082 Fader with EL2030 NTSC Differential Phase Error EL2082 The circuit sums two inputs A and B, such that the sum of their respective path gains is unity, as controlled by the potentiometer. When the potentiometer's wiper is fully down, the slightly negative voltage at the V G of the B-side EL2082 cuts off the B signal to better than 70dB attenuation at 3.58MHz. The A-side EL2082 is at unity gain, so the only (error) signal presented to the op-amp's -input is the same (error) signal at the I IN of the A-side EL2082. The circuit thus outputs -AIN. Since the error signal required by the op-amp is very small, even at video frequencies, the current through the A-side EL2082 is small and distortion is minimized. Variable Filters This circuit is the familiar state-variable configuration, similar to the bi-quad: VG 1 -------------------------------------- F O = -------1V 2π ( R + 95Ω )C At 50% potentiometer setting, equal error output signals flow from the EL2082s, since the op-amp still requires little net -input current. The EL2082s essentially buck each other to establish an output, and 50% gain occurs for both the A and B inputs. The EL2082s now contribute distortion, but less than in previous connections. The op-amp sees a constant 1k feedback resistor regardless of potentiometer setting, so frequency response is stable for all gain settings. A single-input gain control is implemented by simply grounding BIN. Distortion can be improved by increasing the input resistors to lower signal currents. This will lower the overall gain accordingly, but will not affect bandwidth, which is dependent upon the feedback resistors. Reducing the signal input amplitude is an analogous tactic, but the noise floor will effectively rise. Another strategy to reduce distortion in video systems is to use DC restoration circuitry, such as the EL2090 ahead of the fader inputs to reduce the range of signals to be dealt with; the -0.7V to +0.7V possible range of inputs (due to capacitor coupling) would be changed to a stabilized -0.35V to +0.35V span. The EL2020, EL2030, and EL2120 (at reduced bandwidth since it is compensated for 300Ω feedback resistors) all give the same video performance at NTSC operation. FIGURE 9. VOLTAGE TUNEABLE BI-QUAD FILTER Frequency-setting resistors R are each effectively adjusted in value by an EL2082 to effect voltage-variable tuning. Two gain controls yields a linear frequency adjustment; using one gives a square-root-of-control voltage tuning. The EL2082s could be placed in series with the integrator capacitors instead to yield a tuning proportional to 1/VG. The next circuit is one of a new class of “CCII” filters that use the current-conveyor element. Basic information is available in the April 1991, volume 38, number 4 edition of the IEEE Transactions on Circuits and Systems journal, pages 456 through 461 of the article “The Single CCII Biquads with High-Input Impedance”, by Shen-Iuan Liu and Hen-Wai Tsao. fO = 160kHz FIGURE 10. “CCII” CLASS FILTER This interesting filter uses the current output of the EL2082 to generate a bandpass voltage output and the intermediate node provides a second-order low-pass filter output. Both outputs should be buffered so as not to warp characteristics, 11 EL2082 although the V IN of the next EL2082 can be driven directly in the case of cascaded filters. The V GAIN input acts as a Q and peaking adjust point around the nominal 1V value. The resistor at IOUT could serve as the frequency trim, and Q trimmed subsequently with V GAIN. Negative Components The following circuit converts a component or two-terminal network to a variable and even negative replica of that impedance: ( Z + 95Ω ) Z I N = ------------------------------------( 1 + -VG ⁄ 1V ) FIGURE 11. VARIABLE OR NEGATIVE IMPEDANCE CONVERTER A negative impedance is simply an impedance whose current flows reverse to the normal sense. In the above circuit, the current through Z is replicated by the EL2082 and inverted (IOUT flows inverted to the sense of IIN in the EL2082) and summed back to the input. When V G = 0 or VG < 0, the input impedance is simply Z+95Ω. When VG = 1V, the negative of the current through Z is summed with the input and the input impedance is “infinite”. When VG = 2V, twice the negative of the current through Z is summed with the input resulting in an input impedance of -Z-95Ω. Thus variable capacitors can be simulated by substituting the capacitor as Z. “Negative” capacitors result for VG > 1V, and capacitance needs to be present in parallel with the input to prevent oscillations. Inductors or complicated networks also work for Z, but a net negative impedance will result in oscillations. 12 EL2082 EL2082 Macromodel This macromodel has been designed to work with PSPICE (copywritten by the Microsim Corporation). E500 buffers in the V IN voltage and presents it to the R INI resistor to emulate the IIN pin. E501 supplies the non-linearity of the current channel and replicates the I IN current to a ground referenced voltage. R500 and C500 provide the bandwidth limitation on the current signal. E502 supplies the VGAIN non-linearity and drives the L501/R501/C501 to shape the gain control frequency response. E503 does the actual gain-control multiplication, and drives delay line T500 to better simulate the actual phase characteristics of the part G500 creates the current output, and ROUT with COUT provide proper output parasitics. Results have been confirmed by laboratory results in many situations with this macromodel, within its capabilities. The model is good at frequency and linearity estimates around VG = 1V and nominal temperatures, but has several limitations: • The V G channel does not give zero gain for VG < 0; the output gain reverses - don't use V G < 0 • The V G channel is not slew limited • Frequency response does not vary with supply voltage • The V IN channel is not slew limited • Noise is not modeled • Temperature effects are not modeled • CMRR and PSRR are not modeled • Frequency response does not vary with V G Unfortunately, the polynomial expressions and two-input multiplication may not be available on every simulator. FIGURE 12. SCHEMATIC OF EL2082 MACROMODEL 13 EL2082 EL2082 Macromodel (Continued) *: Vgain * | Iin * | | Vin * | | | Iout * | | | | .SUBCKT EL2082macro (1 2 3 4 5 6 7 *** *** I-to-I gain cell macromodel *** *** ****** Cini 2 0 2P C500 502 0 0.9845P C501 505 0 1000P Cout 6 0 5P ****** L501 503 504 0.1U ****** Rsilly1 1 0 1E9 Rsilly2 505 0 1E9 Rini 2 500 95 Rinv 3 0 2Meg Rout 6 0 1Meg R500 501 502 1000 R501 504 505 5 R502 506 507 50 R503 508 0 50 ****** E500 500 0 3 0 1 E501 501 0 POLY(1) (2,500) 0 2 0 -.8 E502 503 0 POLY(1) (1,0) 0 1.05 -.05 E503 506 0 POLY(2) (505,0) (502,0) 0 0 0 0 1 G500 6 0 508 0 -0.0105 T500 508 0 507 0 Z050 TD1.95N ****** .ENDS 8) All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14