VN750 / VN750S / VN750PT / VN750-B5 ® HIGH SIDE DRIVER TYPE VN750 VN750S VN750PT RDS(on) IOUT VCC 60 mΩ 6A 36 V SO-8 VN750-B5 CMOS COMPATIBLE INPUT ON STATE OPEN LOAD DETECTION ■ OFF STATE OPEN LOAD DETECTION ■ SHORTED LOAD PROTECTION ■ UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN ■ PROTECTION AGAINST LOSS OF GROUND ■ VERY LOW STAND-BY CURRENT PENTAWATT ■ ■ ■ REVERSE BATTERY PROTECTION (*) DESCRIPTION The VN750, VN750S, VN750PT, VN750-B5 are a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient P2PAK PPAK ORDER CODES PACKAGE TUBE PENTAWATT VN750 SO-8 P2PAK PPAK VN750S VN750-B5 VN750PT T&R VN750S13TR VN750-B513TR VN750PT13TR compatibility table). Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device detects open load condition both is on and off state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection. BLOCK DIAGRAM VCC OVERVOLTAGE DETECTION VCC CLAMP UNDERVOLTAGE DETECTION GND Power CLAMP DRIVER INPUT OUTPUT LOGIC CURRENT LIMITER ON STATE OPENLOAD DETECTION STATUS OVERTEMPERATURE DETECTION OFF STATE OPENLOAD AND OUTPUT SHORTED TO VCC DETECTION (*) See application schematic at page 8 August 2002 1/29 1 VN750 / VN750S / VN750PT / VN750-B5 ABSOLUTE MAXIMUM RATING Symbol VCC - VCC - Ignd IOUT - IOUT IIN ISTAT Parameter SO-8 DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge Value PENTAWATT P2PAK 41 - 0.3 - 200 Internally Limited -6 +/- 10 +/- 10 PPAK Unit V V mA A A mA mA (Human Body Model: R=1.5KΩ; C=100pF) VESD EMAX EMAX Ptot Tj Tc Tstg - INPUT 4000 V - STATUS 4000 V - OUTPUT 5000 V - VCC Maximum Switching Energy 5000 V (L=1.8mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=9A) Maximum Switching Energy (L=2.46mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=9A) Power Dissipation TC=25°C Junction Operating Temperature Case Operating Temperature Storage Temperature 100 4.2 mJ 138 138 mJ 60 60 Internally Limited - 40 to 150 - 55 to 150 60 W °C °C °C CONNECTION DIAGRAM (TOP VIEW) VCC OUTPUT OUTPUT VCC 5 4 8 1 OUTPUT STATUS VCC INPUT GND 5 N.C. STATUS INPUT GND 4 3 2 1 PPAK / P2PAK SO-8 PENTAWATT CURRENT AND VOLTAGE CONVENTIONS IS IIN VCC INPUT ISTAT IOUT STATUS VCC OUTPUT GND VIN VSTAT 2/29 IGND VOUT VN750 / VN750S / VN750PT / VN750-B5 THERMAL DATA Symbol Rthj-case Rthj-lead Rthj-amb Parameter Thermal Resistance Junction-case Max Thermal Resistance Junction-lead Max Thermal Resistance Junction-ambient Max S0-8 30 93 (*) Value PENTAWATT P2PAK 2.1 2.1 62.1 52.1 (**) PPAK 2.1 77.1 (**) Unit °C/W °C/W °C/W (*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow. (**) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial air flow. ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified) POWER Symbol VCC VUSD VUSDhyst VOV RON Parameter Operating Supply Voltage Undervoltage Shut-down Undervoltage Shut-down Hysteresis Overvoltage Shut-down On State Resistance Test Conditions Min 5.5 3 Supply Current (#) IOUT=2A; VCC>8V 10 Off State; VCC=13V; VIN=VOUT=0V; Tj=25°C Off State Off State Off State Off State Output Current Output Current Output Current Output Current Unit V V V 36 IOUT=2A; Tj=25°C; VCC>8V On State; VCC=13V; VIN=5V; IOUT=0A IL(off1) IL(off2) IL(off3) IL(off4) Max 36 5.5 0.5 Off State; VCC=13V; VIN=VOUT=0V IS Typ 13 4 60 V mΩ 120 25 mΩ µA 10 20 µA 2 (#) 3.5 50 0 5 3 mA µA µA µA µA VIN=VOUT=0V VIN=0V; VOUT=3.5V VIN=VOUT=0V; Vcc=13V; Tj =125°C VIN=VOUT=0V; Vcc=13V; Tj =25°C 0 -75 Test Conditions RL=6.5Ω from VIN rising edge to VOUT=1.3V RL=6.5Ω from VIN falling edge to VOUT=11.7V RL=6.5Ω from VOUT=1.3V to VOUT=10.4V RL=6.5Ω from VOUT=11.7V to VOUT=1.3V Min Typ 40 30 (#) (#) Max Unit µs µs V/µs V/µs Test Conditions Min Typ (#) (#) (#) (#) (#) 6.8 Max 1.25 Unit V µA V µA V V SWITCHING (VCC=13V) Symbol td(on) td(off) dVOUT/dt(on) dVOUT/dt(off) Parameter Turn-on Delay Time Turn-off Delay Time Turn-on Voltage Slope Turn-off Voltage Slope INPUT PIN Symbol VIL IIL VIH IIH Vhyst VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage VIN=1.25V 1 3.25 VIN=3.25V IIN=1mA IIN=-1mA 0.5 6 -0.7 10 8 V (#) See relative diagram 3/29 1 VN750 / VN750S / VN750PT / VN750-B5 ELECTRICAL CHARACTERISTICS (continued) STATUS PIN Symbol VSTAT ILSTAT CSTAT VSCL Parameter Test Conditions Status Low Output Voltage ISTAT=1.6mA Status Leakage Current Normal Operation; VSTAT=5V Status Pin Input Normal Operation; VSTAT=5V Capacitance ISTAT=1mA Status Clamp Voltage ISTAT=-1mA Min Typ (#) (#) 6 6.8 Max 0.5 10 Unit V µA 100 pF 8 V -0.7 V PROTECTIONS Symbol TTSD TR Thyst tSDL Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status delay in overload condition Ilim Current limitation Vdemag Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 6 9 5V<VCC<36V IOUT=2A; VIN=0V; L=6mH Unit °C °C °C 20 µs 15 A 15 A 15 Tj>Tjsh 9V<VCC<36V Max 200 VCC-41 VCC-48 VCC-55 V OPENLOAD DETECTION Symbol IOL tDOL(on) VOL tDOL(off) Parameter Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Test Conditions VIN=5V Min Typ Max Unit 50 (#) 200 mA 200 µs 3.5 V 1000 µs IOUT=0A VIN=0V 1.5 Threshold Openload Detection Delay at Turn Off (#) (#) See relative diagram OPEN LOAD STATUS TIMING (with external pull-up) IOUT< IOL VOUT > VOL OVERTEMP STATUS TIMING Tj > Tjsh VIN VIN VSTAT VSTAT tDOL(off) tDOL(on) tSDL tSDL 4/29 2 1 VN750 / VN750S / VN750PT / VN750-B5 Switching time Waveforms VOUT 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% t VIN td(on) td(off) t TRUTH TABLE CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOL Output Current < IOL INPUT L H L H H L H L H L H L H L H OUTPUT L H L X X L L L L L L H H L H STATUS H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L 5/29 1 VN750 / VN750S / VN750PT / VN750-B5 ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN TEST LEVELS ISO T/R 7637/1 Test Pulse I II III IV 1 2 3a 3b 4 5 -25 V +25 V -25 V +25 V -4 V +26.5 V -50 V +50 V -50 V +50 V -5 V +46.5 V -75 V +75 V -100 V +75 V -6 V +66.5 V -100 V +100 V -150 V +100 V -7 V +86.5 V ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E 6/29 1 Delays and Impedance 2 ms 10 Ω 0.2 ms 10 Ω 0.1 µs 50 Ω 0.1 µs 50 Ω 100 ms, 0.01 Ω 400 ms, 2 Ω I TEST LEVELS RESULTS II III IV C C C C C C C C C C C E C C C C C E C C C C C E CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. VN750 / VN750S / VN750PT / VN750-B5 Figure 1: Waveforms NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VCC VUSD INPUT LOAD VOLTAGE STATUS undefined OVERVOLTAGE VCC<VOV VCC>VOV VCC INPUT LOAD VOLTAGE STATUS OPEN LOAD with external pull-up INPUT VOUT>VOL LOAD VOLTAGE VOL STATUS OPEN LOAD without external pull-up INPUT LOAD VOLTAGE STATUS Tj TTSD TR OVERTEMPERATURE INPUT LOAD CURRENT STATUS 7/29 1 1 VN750 / VN750S / VN750PT / VN750-B5 APPLICATION SCHEMATIC +5V +5V VCC Rprot STATUS Dld µC Rprot INPUT OUTPUT GND VGND GND PROTECTION REVERSE BATTERY NETWORK AGAINST Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND ≤ 600mV / (IS(on)max). 2) RGND ≥ (−VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device’s datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device will be driving an inductive load. RGND DGND This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. LOAD DUMP PROTECTION Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are greater than the ones shown in the ISO T/R 7637/1 table. µC I/Os PROTECTION: If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot ) in line to prevent the µC I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os. -VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V 5kΩ ≤ Rprot ≤ 65kΩ. Recommended Rprot value is 10kΩ. 8/29 1 1 VN750 / VN750S / VN750PT / VN750-B5 OPEN LOAD DETECTION IN OFF STATE 2) no misdetection when load is disconnected: in this case the VOUT has to be higher than VOLmax; this results in the following condition RPU<(VPU–VOLmax)/ IL(off2). Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-up resistor RPU should be connected to a supply that is switched OFF when the module is in standby. The values of VOLmin, VOLmax and IL(off2) are available in the Electrical Characteristics section. Off state open load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1) no false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT=(VPU/(RL+RPU))RL<VOlmin. Open Load detection in off state V batt. VPU VCC RPU INPUT DRIVER + LOGIC IL(off2) OUT + R STATUS VOL RL GROUND 9/29 1 VN750 / VN750S / VN750PT / VN750-B5 Off State Output Current High Level Input Current Iih (uA) IL(off1) (uA) 7 3 2.5 6 Off state Vcc=36V Vin=Vout=0V 2 Vin=3.25V 5 1.5 4 1 3 0.5 2 0 1 -0.5 -1 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (ºC) 50 75 100 125 150 175 100 125 150 175 100 125 150 175 Tc (ºC) Status Leakage Current Input Clamp Voltage Vicl (V) Ilstat (uA) 8 0.05 7.8 Iin=1mA 7.6 0.04 7.4 Vstat=5V 0.03 7.2 7 6.8 0.02 6.6 6.4 0.01 6.2 6 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 Tc (°C) 50 75 Tc (°C) Status Low Output Voltage Status Clamp Voltage Vstat (V) Vscl (V) 0.6 8 7.8 Istat=1mA 0.5 7.6 Istat=1.6mA 7.4 0.4 7.2 0.3 7 6.8 0.2 6.6 6.4 0.1 6.2 6 0 -50 -25 0 25 50 75 Tc (ºC) 10/29 1 100 125 150 175 -50 -25 0 25 50 75 Tc (°C) VN750 / VN750S / VN750PT / VN750-B5 On State Resistance Vs Tcase On State Resistance Vs VCC Ron (mOhm) Ron (mOhm) 140 120 110 120 Iout=2A Iout=2A Vcc=8V; 13V; 36V 100 100 Tc= 150°C 90 80 80 Tc= 125°C 70 60 60 50 40 Tc= 25°C 40 20 Tc= - 40°C 30 0 20 -50 -25 0 25 50 75 100 125 150 175 5 10 15 20 Tc (ºC) Openload On State Detection Threshold 30 35 40 Input High Level Iol (mA) Vih (V) 220 3.6 200 3.4 Vcc=13V Vin=5V 180 25 Vcc (V) 3.2 160 140 3 120 2.8 100 2.6 80 60 2.4 40 2.2 20 0 2 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (ºC) 50 75 100 125 150 175 100 125 150 175 Tc (ºC) Input Low Level Input Hysteresis Voltage Vil (V) Vhyst (V) 2.8 1.5 2.6 1.4 1.3 2.4 1.2 2.2 1.1 2 1 1.8 0.9 1.6 0.8 1.4 0.7 1.2 0.6 1 0.5 -50 -25 0 25 50 75 Tc (ºC) 100 125 150 175 -50 -25 0 25 50 75 Tc (ºC) 11/29 1 1 VN750 / VN750S / VN750PT / VN750-B5 Overvoltage Shutdown Openload Off State Voltage Detection Threshold Vol (V) Vov (V) 50 5 48 4.5 Vin=0V 46 4 44 3.5 42 40 3 38 2.5 36 2 34 1.5 32 1 30 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 100 125 150 175 Tc (ºC) Tc (°C) Turn-on Voltage Slope Turn-off Voltage Slope dVout/dt/(on) (V/ms) dVout/dt(off) (V/ms) 1000 500 900 450 Vcc=13V Rl=6.5Ohm 800 Vcc=13V Rl=6.5Ohm 400 700 350 600 300 500 250 400 200 300 150 200 100 100 50 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) -50 -25 0 25 50 75 Tc (ºC) Ilim Vs Tcase Ilim (A) 20 18 Vcc=13V 16 14 12 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) 12/29 1 1 VN750 / VN750S / VN750PT / VN750-B5 SO-8 Maximum turn off current versus load inductance ILMAX (A) 100 10 A B C 1 0.1 1 10 100 L(mH) A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 13/29 VN750 / VN750S / VN750PT / VN750-B5 PPAK, P2PAK Maximum turn off current versus load inductance ILMAX (A) 100 10 A B C 1 0.1 1 10 100 L(mH) A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 14/29 VN750 / VN750S / VN750PT / VN750-B5 SO-8 THERMAL DATA SO-8 PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: 0.14cm2, 0.8cm2, 2cm2). Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb (ºC/W) SO-8 at 2 pins connected to TAB 110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 2 2.5 PCB Cu heatsink area (cm^2) 15/29 VN750 / VN750S / VN750PT / VN750-B5 P2PAK THERMAL DATA P2PAK PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: 0.97cm2, 8cm2). Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb (°C/W) 55 Tj-Tamb=50°C 50 45 40 35 30 0 2 4 6 PCB Cu heatsink area (cm^2) 16/29 8 10 VN750 / VN750S / VN750PT / VN750-B5 PPAK THERMAL DATA PPAK PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: 0.44cm2, 8cm2). Rthj-amb Vs PCB copper area in open box free air condition RTHj_amb (ºC/W) 90 80 70 60 50 40 30 20 10 0 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) 17/29 VN750 / VN750S / VN750PT / VN750-B5 SO-8 Thermal Impedance Junction Ambient Single Pulse ZTH (°C/W) 1000 0.5 cm2 100 2 cm2 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 Time (s) Thermal fitting model of a single channel HSD in SO-8 10 100 1000 Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb 18/29 Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 0.5 0.05 0.8 3.5 21 16 58 0.006 2.60E-03 0.0075 0.045 0.35 1.05 2 28 2 VN750 / VN750S / VN750PT / VN750-B5 PPAK Thermal Impedance Junction Ambient Single Pulse ZTH (°C/W) 1000 100 0.44 cm 2 6 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) Thermal fitting model of a single channel HSD in PPAK 10 100 1000 Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 0.5 0.15 0.7 1.6 2 15 61 0.0006 0.0025 0.08 0.3 0.45 0.8 6 24 5 19/29 VN750 / VN750S / VN750PT / VN750-B5 P2PAK Thermal Impedance Junction Ambient Single Pulse ZTH (°C/W) 1000 100 0.5 cm2 6 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) Thermal fitting model of a single channel HSD in P2PAK 10 100 1000 Pulse calculation formula Z THδ = RTH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb 20/29 Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 0.5 0.15 0.7 0.7 4 9 37 0.0006 0.0025 0.055 0.4 2 3 6 22 5 VN750 / VN750S / VN750PT / VN750-B5 SO-8 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5 0.188 0.196 E 5.8 6.2 0.228 0.244 e 1.27 e3 3.81 0.050 0.150 F 3.8 4 0.14 L 0.4 1.27 0.015 M 0.6 S L1 0.157 0.050 0.023 8 (max.) 0.8 1.2 0.031 0.047 21/29 VN750 / VN750S / VN750PT / VN750-B5 PENTAWATT (VERTICAL) MECHANICAL DATA DIM. mm. MIN. TYP A MAX. MIN. TYP. 4.8 C MAX. 0.189 1.37 0.054 D 2.4 2.8 0.094 0.110 D1 1.2 1.35 0.047 0.053 E 0.35 0.55 0.014 0.022 F 0.8 1.05 0.031 0.041 F1 1 1.4 0.039 G 3.2 3.4 3.6 0.126 0.134 0.142 G1 6.6 6.8 7 0.260 0.268 0.276 H2 H3 0.055 10.4 10.05 10.4 0.409 0.396 0.409 L 17.85 0.703 L1 15.75 0.620 L2 21.4 0.843 L3 22.5 0.886 L5 2.6 3 0.102 0.118 L6 15.1 15.8 0.594 0.622 L7 6 6.6 0.236 M 4.5 M1 Diam. 22/29 inch 4 3.65 0.260 0.177 0.157 3.85 0.144 0.152 VN750 / VN750S / VN750PT / VN750-B5 P2PAK MECHANICAL DATA mm. DIM. MIN. A TYP 4.30 MAX. 4.80 A2 0.03 0.23 C 1.17 1.37 D 2.40 2.80 D1 8.95 9.35 E 0.45 0.60 1.05 F 0.80 G 3.20 3.60 G1 6.60 7.00 H1 8.5 H2 10.00 L 15 L1 10.40 15.85 8 L2 1.27 L3 1.30 1.40 1.70 M 2.40 3.20 0.40 R V2 0º Package Weight 8º 1.43 Gr (typ) P010R 23/29 VN750 / VN750S / VN750PT / VN750-B5 PPAK MECHANICAL DATA DIM. MIN. TYP MAX. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 B 0.40 0.60 B2 5.20 5.40 C 0.45 0.60 C2 0.48 0.60 D1 5.1 D 6.00 6.20 E 6.40 6.60 E1 4.7 e 1.27 G 4.90 G1 2.38 2.70 H 9.35 10.10 L2 L4 0.8 0.60 R V2 Package Weight 5.25 1.00 1.00 0.2 0º 8º Gr. 0.3 P032T1 24/29 VN750 / VN750S / VN750PT / VN750-B5 SO-8 TUBE SHIPMENT (no suffix) B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 25/29 VN750 / VN750S / VN750PT / VN750-B5 PENTAWATT TUBE SHIPMENT (no suffix) B C Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) All dimensions are in mm. A 26/29 50 1000 532 18 33.1 1 VN750 / VN750S / VN750PT / VN750-B5 2 P PAK TUBE SHIPMENT (no suffix) Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) B C 50 1000 532 18 33.1 1 All dimensions are in mm. A TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 60 30.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 24 4 16 1.5 1.5 11.5 6.5 2 End Start Top cover tape No components Components No components 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 27/29 VN750 / VN750S / VN750PT / VN750-B5 PPAK SUGGESTED PAD LAYOUT PPAK TUBE SHIPMENT (no suffix) A C Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) B 3 1.8 75 3000 532 6 21.3 0.6 6.7 All dimensions are in mm. TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 16.4 60 22.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 16 4 8 1.5 1.5 7.5 2.75 2 End Start Top cover tape No components Components No components 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 28/29 1 VN750 / VN750S / VN750PT / VN750-B5 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2002 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 29/29