STMICROELECTRONICS VND810SP13TR

VND810SP
®
DOUBLE CHANNEL HIGH SIDE DRIVER
TYPE
VND810SP
RDS(on)
160 mΩ (*)
IOUT
3.5 A (*)
VCC
36 V
(*) Per each channel
CMOS COMPATIBLE INPUTS
OPEN DRAIN STATUS OUTPUTS
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
■ REVERSE BATTERY PROTECTION (**)
■
10
■
DESCRIPTION
The VND810SP is a monolithic device made by
using
STMicroelectronics
VIPower
M0-3
Technology, intended for driving any kind of load
with one side connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table). Active current limitation
BLOCK DIAGRAM
1
PowerSO-10™
ORDER CODES
PACKAGE
TUBE
T&R
PowerSO-10™ VND810SP VND810SP13TR
combined with thermal shutdown and automatic
restart protects the device against overload. The
device detects open load condition both in on and
off state. Output shorted to VCC is detected in the
off state. Device automatically turns off in case of
ground pin disconnection.
Vcc
Vcc
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
GND
CLAMP 1
OUTPUT1
INPUT1
DRIVER 1
CLAMP 2
STATUS1
CURRENT LIMITER 1
OVERTEMP. 1
LOGIC
DRIVER 2
OUTPUT2
OPENLOAD ON 1
CURRENT LIMITER 2
INPUT2
OPENLOAD OFF 1
OPENLOAD ON 2
STATUS2
OPENLOAD OFF 2
OVERTEMP. 2
(**) See application schematic at page 8
July 2002
1/18
1
VND810SP
ABSOLUTE MAXIMUM RATING
Symbol
VCC
- VCC
- IGND
IOUT
- IOUT
IIN
Istat
VESD
EMAX
Ptot
Tj
Tc
Tstg
Parameter
DC Supply Voltage
Reverse DC Supply Voltage
DC Reverse Ground Pin Current
DC Output Current
Reverse DC Output Current
DC Input Current
DC Status Current
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
Value
41
- 0.3
- 200
Internally Limited
-6
+/- 10
+/- 10
Unit
V
V
mA
A
A
mA
mA
- INPUT
4000
V
- STATUS
4000
V
- OUTPUT
5000
V
- VCC
Maximum Switching Energy
5000
V
24
mJ
52
Internally Limited
- 40 to 150
- 55 to 150
W
°C
°C
°C
(L=1.4mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=5A)
Power Dissipation TC=25°C
Junction Operating Temperature
Case Operating Temperature
Storage Temperature
CONNECTION DIAGRAM (TOP VIEW)
OUTPUT 1
OUTPUT 1
N.C.
OUTPUT 2
OUTPUT 2
5
4
3
6
7
8
9
10
GROUND
INPUT 1
STATUS 1
STATUS 2
INPUT 2
2
1
11
VCC
CURRENT AND VOLTAGE CONVENTIONS
IS
IIN1
VCC
V CC
INPUT 1
ISTAT1
V IN1
STATUS 1
VSTAT1
IOUT1
IIN2
OUTPUT 1
INPUT 2
V IN2 ISTAT2
IOUT2
STATUS 2
V STAT2
GND
OUTPUT 2
VOUT2
IGND
2/18
1
VOUT1
VND810SP
THERMAL DATA
Symbol
Rthj-case
Parameter
Thermal Resistance Junction-case
Value
2.4
Unit
°C/W
Rthj-amb
Thermal Resistance Junction-ambient
52.4 (*)
°C/W
(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial air
flow.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C< Tj < 150°C, unless otherwise specified)
(Per each channel)
POWER OUTPUTS
Symbol
VCC (**)
VUSD (**)
VOV (**)
RON
IS (**)
IL(off1)
IL(off2)
IL(off3)
IL(off4)
Parameter
Operating Supply Voltage
Undervoltage Shut-down
Overvoltage Shut-down
On State Resistance
Supply Current
Off State Output Current
Off State Output Current
Off State Output Current
Off State Output Current
Test Conditions
Min
5.5
3
36
Typ
13
4
IOUT=1A; Tj=25°C
IOUT=1A; VCC>8V
Max
36
5.5
160
Unit
V
V
V
mΩ
mΩ
µA
Off State; VCC=13V; VIN=VOUT=0V
12
320
40
Off State; VCC=13V; VIN=VOUT=0V;
Tj=25°C
12
25
µA
On State; VCC=13V; VIN=5V; IOUT=0A
5
7
50
0
5
3
mA
µA
µA
µA
µA
Typ
Max
Unit
VIN=VOUT=0V
VIN=0V; VOUT=3.5V
VIN=VOUT=0V; Vcc=13V; Tj =125°C
VIN=VOUT=0V; Vcc=13V; Tj =25°C
0
-75
Test Conditions
RL=13Ω from VIN rising edge to
VOUT=1.3V
RL=13Ω from VIN falling edge to
VOUT=11.7V
Min
(**) Per device
SWITCHING (VCC=13V)
Symbol
Parameter
td(on)
Turn-on Delay Time
td(off)
Turn-off Delay Time
dVOUT/
dt(on)
Turn-on Voltage Slope
RL=13Ω from VOUT=1.3V to
VOUT=10.4V
dVOUT/
dt(off)
Turn-off Voltage Slope
RL=13Ω from VOUT=11.7V to
VOUT=1.3V
30
µs
30
µs
See
relative
diagram
See
relative
diagram
V/µs
V/µs
LOGIC INPUT
Symbol
VIL
IIL
VIH
IIH
Vhyst
VICL
Parameter
Input Low Level
Low Level Input Current
Input High Level
High Level Input Current
Input Hysteresis Voltage
Input Clamp Voltage
Test Conditions
VIN = 1.25V
Min
Typ
1
3.25
VIN = 3.25V
IIN = 1mA
IIN = -1mA
Max
1.25
10
0.5
6
6.8
-0.7
8
Unit
V
µA
V
µA
V
V
V
3/18
1
VND810SP
ELECTRICAL CHARACTERISTICS (continued)
STATUS PIN
Symbol
VSTAT
ILSTAT
CSTAT
VSCL
Parameter
Test Conditions
Status Low Output Voltage ISTAT= 1.6 mA
Status Leakage Current
Normal Operation; VSTAT= 5V
Status Pin Input
Normal Operation; VSTAT= 5V
Capacitance
ISTAT= 1mA
Status Clamp Voltage
ISTAT= - 1mA
Min
6
Typ
6.8
Max
0.5
10
Unit
V
µA
100
pF
8
V
-0.7
V
PROTECTIONS
Symbol
TTSD
TR
Thyst
tsdl
Parameter
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
Status Delay in Overload
Conditions
Ilim
Current limitation
Vdemag
Turn-off Output Clamp
Voltage
Test Conditions
Min
150
135
7
Typ
175
5
5.5V<VCC<36V
IOUT=1A; L=6mH
Unit
°C
°C
°C
20
µs
7.5
A
7.5
A
15
Tj>TTSD
3.5
Max
200
VCC-41 VCC-48 VCC-55
V
OPENLOAD DETECTION
Symbol
IOL
tDOL(on)
VOL
tDOL(off)
Parameter
Openload ON State
Detection Threshold
Openload ON State
Detection Delay
Openload OFF State
Voltage Detection
Threshold
Openload Detection Delay
at Turn Off
Test Conditions
Min
Typ
Max
Unit
20
40
80
mA
200
µs
3.5
V
1000
µs
VIN=5V
IOUT=0A
VIN=0V
1.5
OPEN LOAD STATUS TIMING (with external pull-up)
IOUT < IOL
VOUT> VOL
VINn
2.5
OVER TEMP STATUS TIMING
Tj > TTSD
VINn
VSTAT n
VSTAT n
tSDL
tDOL(off)
tSDL
tDOL(on)
4/18
2
1
VND810SP
Switching time Waveforms
VOUTn
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
t
VINn
td(on)
td(off)
t
TRUTH TABLE
CONDITIONS
Normal Operation
Current Limitation
Overtemperature
Undervoltage
Overvoltage
Output Voltage > VOL
Output Current < IOL
INPUT
L
H
L
H
H
L
H
L
H
L
H
L
H
L
H
OUTPUT
L
H
L
X
X
L
L
L
L
L
L
H
H
L
H
STATUS
H
H
H
(Tj < TTSD) H
(Tj > TTSD) L
H
L
X
X
H
H
L
H
H
L
5/18
1
VND810SP
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
I
II
TEST LEVELS
III
IV
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
I
C
C
C
C
C
C
TEST LEVELS RESULTS
II
III
C
C
C
C
C
C
C
C
C
C
E
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
IV
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure and cannot be
returned to proper operation without replacing the device.
6/18
1
1
VND810SP
Figure 1: Waveforms
NORMAL OPERATION
INPUTn
OUTPUT VOLTAGEn
STATUSn
UNDERVOLTAGE
VCC
VUSDhyst
VUSD
INPUTn
OUTPUT VOLTAGEn
STATUSn
undefined
OVERVOLTAGE
VCC<VOV
VCC>V OV
VCC
INPUTn
OUTPUT VOLTAGEn
STATUSn
OPEN LOAD with external pull-up
INPUTn
VOUT>VOL
OUTPUT VOLTAGEn
VOL
STATUSn
OPEN LOAD without external pull-up
INPUTn
OUTPUT VOLTAGEn
STATUSn
OVERTEMPERATURE
Tj
TTSD
TR
INPUTn
OUTPUT CURRENTn
STATUSn
7/18
1
VND810SP
APPLICATION SCHEMATIC
+5V +5V
+5V
VCC
Rprot
STATUS1
Dld
µC
Rprot
INPUT1
OUTPUT1
Rprot
STATUS2
Rprot
INPUT2
OUTPUT2
GND
RGND
VGND
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / IS(on)max.
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
DGND
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating. The
same applies if the device will be subject to transients on
the VCC line that are greater than the ones shown in the
ISO T/R 7637/1 table.
8/18
1
1
VND810SP
µC I/Os PROTECTION:
supply the microprocessor.
The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
in this case we have to avoid VOUT to be higher than
VOlmin; this results in the following condition
VOUT=(VPU/(RL+RPU))RL<VOlmin.
2) no misdetection when load is disconnected: in this
case the VOUT has to be higher than VOLmax; this
results in the following condition RPU<(VPU–VOLmax)/
IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled
high (up to several mA), the pull-up resistor RPU should
be connected to a supply that is switched OFF when the
module is in standby.
If a ground protection network is used and negative
transient are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between
the leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and I latchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
OPEN LOAD DETECTION IN OFF STATE
Off state open load detection requires an external pull-up
resistor (RPU) connected between OUTPUT pin and a
positive supply voltage (VPU) like the +5V line used to
The values of VOLmin, VOLmax and IL(off2) are available in
the Electrical Characteristics section.
Open Load detection in off state
V batt.
VPU
VCC
RPU
INPUT
DRIVER
+
LOGIC
IL(off2)
OUT
+
R
STATUS
VOL
RL
GROUND
9/18
1
VND810SP
High Level Input Current
Off State Output Current
IL(off1) (uA)
Iih (uA)
1.6
5
1.44
4.5
Off state
Vcc=36V
Vin=Vout=0V
1.28
1.12
Vin=3.25V
4
3.5
0.96
3
0.8
2.5
0.64
2
0.48
1.5
0.32
1
0.16
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
Tc (ºC)
75
100
125
150
175
Tc (°C)
Input Clamp Voltage
Status Leakage Current
Vicl (V)
Ilstat (uA)
8
0.05
7.8
Iin=1mA
7.6
0.04
7.4
Vstat=5V
0.03
7.2
7
6.8
0.02
6.6
6.4
0.01
6.2
6
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
Tc (°C)
50
75
100
125
150
175
Tc (°C)
Status Low Output Voltage
Status Clamp Voltage
Vscl (V)
Vstat (V)
8
0.8
7.8
0.7
Istat=1mA
Istat=1.6mA
7.6
0.6
7.4
0.5
7.2
7
0.4
6.8
0.3
6.6
0.2
6.4
0.1
6.2
6
0
-50
-25
0
25
50
75
Tc (°C)
10/18
1
100
125
150
175
-50
-25
0
25
50
75
Tc (°C)
100
125
150
175
VND810SP
On State Resistance Vs Tcase
On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
400
400
350
350
Iout=1A
Iout=1A
Vcc=8V; 13V & 36V
300
300
250
250
200
200
150
150
100
100
50
50
Tc= 125ºC
Tc= 25ºC
Tc= - 40ºC
0
0
-50
-25
0
25
50
75
100
125
150
175
5
10
15
20
Tc (ºC)
25
30
35
40
Vcc (V)
Openload On State Detection Threshold
Input High Level
Iol (mA)
Vih (V)
60
3.6
55
3.4
Vcc=13V
Vin=5V
50
3.2
45
3
40
2.8
35
30
2.6
25
2.4
20
2.2
15
2
10
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
100
125
150
175
Tc (°C)
Tc (°C)
Input Low Level
Input Hysteresis Voltage
Vil (V)
Vhyst (V)
2.6
1.5
1.4
2.4
1.3
2.2
1.2
2
1.1
1.8
1
0.9
1.6
0.8
1.4
0.7
1.2
0.6
1
0.5
-50
-25
0
25
50
75
Tc (°C)
100
125
150
175
-50
-25
0
25
50
75
Tc (°C)
11/18
1
VND810SP
Overvoltage Shutdown
Openload Off State Voltage Detection Threshold
Vov (V)
Vol (V)
50
5
48
4.5
46
4
44
3.5
Vin=0V
42
3
40
2.5
38
2
36
1.5
34
1
32
0.5
30
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
100
125
150
175
100
125
150
175
Turn-off Voltage Slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
1000
500
450
900
Vcc=13V
Rl=13Ohm
800
Vcc=13V
Rl=13Ohm
400
700
350
600
300
500
250
400
200
300
150
200
100
100
50
0
0
-50
-25
0
25
50
75
100
125
150
175
ILIM Vs Tcase
Ilim (A)
10
9
Vcc=13V
8
7
6
5
4
3
2
1
0
-50
-25
0
25
50
75
Tc (°C)
-50
-25
0
25
50
75
Tc (ºC)
Tc (ºC)
1
75
Tc (°C)
Turn-on Voltage Slope
12/18
50
100
125
150
175
VND810SP
Maximum turn off current versus load inductance
ILMAX (A)
10
A
B
C
1
0.01
0.1
1
L(mH)
10
100
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
13/18
VND810SP
PowerSO-10™ THERMAL DATA
PowerSO-10™ PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm2).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50
45
40
35
30
0
2
4
6
PCB Cu heatsink area (cm^2)
14/18
8
10
VND810SP
PowerSO-10 Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
1000
100
0.5 cm2
6 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
Thermal fitting model of a double channel HSD
in PowerSO-10
10
100
1000
Pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Thermal Parameter
Tj_1
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd1
Tj_2
C1
C2
R1
R2
Pd2
T_amb
Area/island (cm2)
R1 (°C/W)
R2 (°C/W)
R3( °C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.5
0.35
1.8
1.1
0.8
12
37
0.0001
7.00E-04
0.008
0.3
0.75
3
6
22
5
15/18
VND810SP
PowerSO-10™ MECHANICAL DATA
mm.
DIM.
MIN.
A
A (*)
A1
B
B (*)
C
C (*)
D
D1
E
E2
E2 (*)
E4
E4 (*)
e
F
F (*)
H
H (*)
h
L
L (*)
α
α (*)
inch
TYP
3.35
3.4
0.00
0.40
0.37
0.35
0.23
9.40
7.40
9.30
7.20
7.30
5.90
5.90
MAX.
MIN.
3.65
3.6
0.10
0.60
0.53
0.55
0.32
9.60
7.60
9.50
7.60
7.50
6.10
6.30
0.132
0.134
0.000
0.016
0.014
0.013
0.009
0.370
0.291
0.366
0.283
0.287
0.232
0.232
1.35
1.40
14.40
14.35
0.049
0.047
0.543
0.545
1.80
1.10
8º
8º
0.047
0.031
0º
2º
1.27
TYP.
MAX.
0.144
0.142
0.004
0.024
0.021
0.022
0.0126
0.378
0.300
0.374
300
0.295
0.240
0.248
0.050
1.25
1.20
13.80
13.85
0.50
0.053
0.055
0.567
0.565
0.002
1.20
0.80
0º
2º
0.070
0.043
8º
8º
(*) Muar only POA P013P
B
0.10 A B
10
H
E
E
E2
1
SEATING
PLANE
e
B
DETAIL "A"
A
C
0.25
h
E4
D
= D1 =
=
=
SEATING
PLANE
A
F
A1
A1
L
DETAIL "A"
α
P095A
16/18
1
VND810SP
PowerSO-10™ SUGGESTED PAD LAYOUT
TUBE SHIPMENT (no suffix)
14.6 - 14.9
CASABLANCA
B
10.8- 11
MUAR
C
6.30
C
A
A
0.67 - 0.73
10
9
1
9.5
2
3
B
0.54 - 0.6
All dimensions are in mm.
8
7
4
5
1.27
Base Q.ty Bulk Q.ty Tube length (± 0.5)
6
Casablanca
Muar
50
50
1000
1000
532
532
A
B
C (± 0.1)
10.4 16.4
4.9 17.2
0.8
0.8
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
600
600
330
1.5
13
20.2
24.4
60
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
24
4
24
1.5
1.5
11.5
6.5
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
17/18
1
VND810SP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 2002 STMicroelectronics - Printed in ITALY- All Rights Reserved.
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